flight/pios/stm32f0x/pios_tim.c

   1 #include "pios.h"
   2
   3 #ifdef PIOS_INCLUDE_TIM
   4
   5 #include "pios_tim_priv.h"
   6
   7 enum pios_tim_dev_magic {
   8     PIOS_TIM_DEV_MAGIC = 0x87654098,
   9 };
  10
  11 struct pios_tim_dev {
  12     enum pios_tim_dev_magic magic;
  13
  14     const struct pios_tim_channel   *channels;
  15     uint8_t num_channels;
  16
  17     const struct pios_tim_callbacks *callbacks;
  18     uint32_t context;
  19 };
  20
  21 #if 0
  22 static bool PIOS_TIM_validate(struct pios_tim_dev *tim_dev)
  23 {
  24     return tim_dev->magic == PIOS_TIM_DEV_MAGIC;
  25 }
  26 #endif
  27
  28 #if defined(PIOS_INCLUDE_FREERTOS) && 0
  29 static struct pios_tim_dev *PIOS_TIM_alloc(void)
  30 {
  31     struct pios_tim_dev *tim_dev;
  32
  33     tim_dev = (struct pios_tim_dev *)malloc(sizeof(*tim_dev));
  34     if (!tim_dev) {
  35         return NULL;
  36     }
  37
  38     tim_dev->magic = PIOS_TIM_DEV_MAGIC;
  39     return tim_dev;
  40 }
  41 #else
  42 static struct pios_tim_dev pios_tim_devs[PIOS_TIM_MAX_DEVS];
  43 static uint8_t pios_tim_num_devs;
  44 static struct pios_tim_dev *PIOS_TIM_alloc(void)
  45 {
  46     struct pios_tim_dev *tim_dev;
  47
  48     if (pios_tim_num_devs >= PIOS_TIM_MAX_DEVS) {
  49         return NULL;
  50     }
  51
  52     tim_dev = &pios_tim_devs[pios_tim_num_devs++];
  53     tim_dev->magic = PIOS_TIM_DEV_MAGIC;
  54
  55     return tim_dev;
  56 }
  57 #endif /* if defined(PIOS_INCLUDE_FREERTOS) && 0 */
  58
  59
  60 int32_t PIOS_TIM_InitClock(const struct pios_tim_clock_cfg *cfg)
  61 {
  62     PIOS_DEBUG_Assert(cfg);
  63
  64     /* Configure the dividers for this timer */
  65     TIM_TimeBaseInit(cfg->timer, cfg->time_base_init);
  66
  67     /* Configure internal timer clocks */
  68     TIM_InternalClockConfig(cfg->timer);
  69
  70     /* Enable timers */
  71     TIM_Cmd(cfg->timer, ENABLE);
  72
  73     /* Enable Interrupts */
  74     NVIC_Init(&cfg->irq.init);
  75
  76     return 0;
  77 }
  78
  79 int32_t PIOS_TIM_InitChannels(uint32_t *tim_id, const struct pios_tim_channel *channels, uint8_t num_channels, const struct pios_tim_callbacks *callbacks, uint32_t context)
  80 {
  81     PIOS_Assert(channels);
  82     PIOS_Assert(num_channels);
  83
  84     struct pios_tim_dev *tim_dev;
  85     tim_dev = (struct pios_tim_dev *)PIOS_TIM_alloc();
  86     if (!tim_dev) {
  87         goto out_fail;
  88     }
  89
  90     /* Bind the configuration to the device instance */
  91     tim_dev->channels     = channels;
  92     tim_dev->num_channels = num_channels;
  93     tim_dev->callbacks    = callbacks;
  94     tim_dev->context = context;
  95
  96     /* Configure the pins */
  97     for (uint8_t i = 0; i < num_channels; i++) {
  98         const struct pios_tim_channel *chan = &(channels[i]);
  99
 100         GPIO_Init(chan->pin.gpio, &chan->pin.init);
 101
 102         if (chan->remap) {
 103             GPIO_PinRemapConfig(chan->remap, ENABLE);
 104         }
 105     }
 106
 107     *tim_id = (uint32_t)tim_dev;
 108
 109     return 0;
 110
 111 out_fail:
 112     return -1;
 113 }
 114
 115 static void PIOS_TIM_generic_irq_handler(TIM_TypeDef *timer)
 116 {
 117     /* Iterate over all registered clients of the TIM layer to find channels on this timer */
 118     for (uint8_t i = 0; i < pios_tim_num_devs; i++) {
 119         const struct pios_tim_dev *tim_dev = &pios_tim_devs[i];
 120
 121         if (!tim_dev->channels || tim_dev->num_channels == 0) {
 122             /* No channels to process on this client */
 123             continue;
 124         }
 125
 126         /* Check for an overflow event on this timer */
 127         bool overflow_event;
 128         uint16_t overflow_count;
 129         if (TIM_GetITStatus(timer, TIM_IT_Update) == SET) {
 130             TIM_ClearITPendingBit(timer, TIM_IT_Update);
 131             overflow_count = timer->ARR;
 132             overflow_event = true;
 133         } else {
 134             overflow_count = 0;
 135             overflow_event = false;
 136         }
 137
 138         for (uint8_t j = 0; j < tim_dev->num_channels; j++) {
 139             const struct pios_tim_channel *chan = &tim_dev->channels[j];
 140
 141             if (chan->timer != timer) {
 142                 /* channel is not on this timer */
 143                 continue;
 144             }
 145
 146             /* Figure out which interrupt bit we should be looking at */
 147             uint16_t timer_it;
 148             switch (chan->timer_chan) {
 149             case TIM_Channel_1:
 150                 timer_it = TIM_IT_CC1;
 151                 break;
 152             case TIM_Channel_2:
 153                 timer_it = TIM_IT_CC2;
 154                 break;
 155             case TIM_Channel_3:
 156                 timer_it = TIM_IT_CC3;
 157                 break;
 158             case TIM_Channel_4:
 159                 timer_it = TIM_IT_CC4;
 160                 break;
 161             default:
 162                 PIOS_Assert(0);
 163                 break;
 164             }
 165
 166             bool edge_event;
 167             uint16_t edge_count;
 168             if (TIM_GetITStatus(chan->timer, timer_it) == SET) {
 169                 TIM_ClearITPendingBit(chan->timer, timer_it);
 170
 171                 /* Read the current counter */
 172                 switch (chan->timer_chan) {
 173                 case TIM_Channel_1:
 174                     edge_count = TIM_GetCapture1(chan->timer);
 175                     break;
 176                 case TIM_Channel_2:
 177                     edge_count = TIM_GetCapture2(chan->timer);
 178                     break;
 179                 case TIM_Channel_3:
 180                     edge_count = TIM_GetCapture3(chan->timer);
 181                     break;
 182                 case TIM_Channel_4:
 183                     edge_count = TIM_GetCapture4(chan->timer);
 184                     break;
 185                 default:
 186                     PIOS_Assert(0);
 187                     break;
 188                 }
 189                 edge_event = true;
 190             } else {
 191                 edge_event = false;
 192                 edge_count = 0;
 193             }
 194
 195             if (!tim_dev->callbacks) {
 196                 /* No callbacks registered, we're done with this channel */
 197                 continue;
 198             }
 199
 200             /* Generate the appropriate callbacks */
 201             if (overflow_event & edge_event) {
 202                 /*
 203                  * When both edge and overflow happen in the same interrupt, we
 204                  * need a heuristic to determine the order of the edge and overflow
 205                  * events so that the callbacks happen in the right order.  If we
 206                  * get the order wrong, our pulse width calculations could be off by up
 207                  * to ARR ticks.  That could be bad.
 208                  *
 209                  * Heuristic: If the edge_count is < 16 ticks above zero then we assume the
 210                  *            edge happened just after the overflow.
 211                  */
 212
 213                 if (edge_count < 16) {
 214                     /* Call the overflow callback first */
 215                     if (tim_dev->callbacks->overflow) {
 216                         (*tim_dev->callbacks->overflow)((uint32_t)tim_dev,
 217                                                         tim_dev->context,
 218                                                         j,
 219                                                         overflow_count);
 220                     }
 221                     /* Call the edge callback second */
 222                     if (tim_dev->callbacks->edge) {
 223                         (*tim_dev->callbacks->edge)((uint32_t)tim_dev,
 224                                                     tim_dev->context,
 225                                                     j,
 226                                                     edge_count);
 227                     }
 228                 } else {
 229                     /* Call the edge callback first */
 230                     if (tim_dev->callbacks->edge) {
 231                         (*tim_dev->callbacks->edge)((uint32_t)tim_dev,
 232                                                     tim_dev->context,
 233                                                     j,
 234                                                     edge_count);
 235                     }
 236                     /* Call the overflow callback second */
 237                     if (tim_dev->callbacks->overflow) {
 238                         (*tim_dev->callbacks->overflow)((uint32_t)tim_dev,
 239                                                         tim_dev->context,
 240                                                         j,
 241                                                         overflow_count);
 242                     }
 243                 }
 244             } else if (overflow_event && tim_dev->callbacks->overflow) {
 245                 (*tim_dev->callbacks->overflow)((uint32_t)tim_dev,
 246                                                 tim_dev->context,
 247                                                 j,
 248                                                 overflow_count);
 249             } else if (edge_event && tim_dev->callbacks->edge) {
 250                 (*tim_dev->callbacks->edge)((uint32_t)tim_dev,
 251                                             tim_dev->context,
 252                                             j,
 253                                             edge_count);
 254             }
 255         }
 256     }
 257 }
 258 #if 0
 259 uint16_t val = 0;
 260 for (uint8_t i = 0; i < pios_pwm_cfg.num_channels; i++) {
 261     struct pios_pwm_channel channel = pios_pwm_cfg.channels[i];
 262     if ((channel.timer == timer) && (TIM_GetITStatus(channel.timer, channel.ccr) == SET)) {
 263         TIM_ClearITPendingBit(channel.timer, channel.ccr);
 264
 265         switch (channel.channel) {
 266         case TIM_Channel_1:
 267             val = TIM_GetCapture1(channel.timer);
 268             break;
 269         case TIM_Channel_2:
 270             val = TIM_GetCapture2(channel.timer);
 271             break;
 272         case TIM_Channel_3:
 273             val = TIM_GetCapture3(channel.timer);
 274             break;
 275         case TIM_Channel_4:
 276             val = TIM_GetCapture4(channel.timer);
 277             break;
 278         }
 279
 280         if (CaptureState[i] == 0) {
 281             RiseValue[i] = val;
 282         } else {
 283             FallValue[i] = val;
 284         }
 285
 286         // flip state machine and capture value here
 287         /* Simple rise or fall state machine */
 288         TIM_ICInitTypeDef TIM_ICInitStructure = pios_pwm_cfg.tim_ic_init;
 289         if (CaptureState[i] == 0) {
 290             /* Switch states */
 291             CaptureState[i] = 1;
 292
 293             /* Switch polarity of input capture */
 294             TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Falling;
 295             TIM_ICInitStructure.TIM_Channel    = channel.channel;
 296             TIM_ICInit(channel.timer, &TIM_ICInitStructure);
 297         } else {
 298             /* Capture computation */
 299             if (FallValue[i] > RiseValue[i]) {
 300                 CaptureValue[i] = (FallValue[i] - RiseValue[i]);
 301             } else {
 302                 CaptureValue[i] = ((channel.timer->ARR - RiseValue[i]) + FallValue[i]);
 303             }
 304
 305             /* Switch states */
 306             CaptureState[i] = 0;
 307
 308             /* Increase supervisor counter */
 309             CapCounter[i]++;
 310
 311             /* Switch polarity of input capture */
 312             TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
 313             TIM_ICInitStructure.TIM_Channel    = channel.channel;
 314             TIM_ICInit(channel.timer, &TIM_ICInitStructure);
 315         }
 316     }
 317 }
 318 #endif /* if 0 */
 319
 320 /* Bind Interrupt Handlers
 321  *
 322  * Map all valid TIM IRQs to the common interrupt handler
 323  * and give it enough context to properly demux the various timers
 324  */
 325 void TIM1_UP_IRQHandler(void) __attribute__((alias("PIOS_TIM_1_UP_irq_handler")));
 326 static void PIOS_TIM_1_UP_irq_handler(void)
 327 {
 328     PIOS_TIM_generic_irq_handler(TIM1);
 329 }
 330
 331 void TIM1_CC_IRQHandler(void) __attribute__((alias("PIOS_TIM_1_CC_irq_handler")));
 332 static void PIOS_TIM_1_CC_irq_handler(void)
 333 {
 334     PIOS_TIM_generic_irq_handler(TIM1);
 335 }
 336
 337 void TIM2_IRQHandler(void) __attribute__((alias("PIOS_TIM_2_irq_handler")));
 338 static void PIOS_TIM_2_irq_handler(void)
 339 {
 340     PIOS_TIM_generic_irq_handler(TIM2);
 341 }
 342
 343 void TIM3_IRQHandler(void) __attribute__((alias("PIOS_TIM_3_irq_handler")));
 344 static void PIOS_TIM_3_irq_handler(void)
 345 {
 346     PIOS_TIM_generic_irq_handler(TIM3);
 347 }
 348
 349 void TIM4_IRQHandler(void) __attribute__((alias("PIOS_TIM_4_irq_handler")));
 350 static void PIOS_TIM_4_irq_handler(void)
 351 {
 352     PIOS_TIM_generic_irq_handler(TIM4);
 353 }
 354
 355 void TIM5_IRQHandler(void) __attribute__((alias("PIOS_TIM_5_irq_handler")));
 356 static void PIOS_TIM_5_irq_handler(void)
 357 {
 358     PIOS_TIM_generic_irq_handler(TIM5);
 359 }
 360
 361 void TIM6_IRQHandler(void) __attribute__((alias("PIOS_TIM_6_irq_handler")));
 362 static void PIOS_TIM_6_irq_handler(void)
 363 {
 364     PIOS_TIM_generic_irq_handler(TIM6);
 365 }
 366
 367 void TIM7_IRQHandler(void) __attribute__((alias("PIOS_TIM_7_irq_handler")));
 368 static void PIOS_TIM_7_irq_handler(void)
 369 {
 370     PIOS_TIM_generic_irq_handler(TIM7);
 371 }
 372
 373 void TIM8_UP_IRQHandler(void) __attribute__((alias("PIOS_TIM_8_UP_irq_handler")));
 374 static void PIOS_TIM_8_UP_irq_handler(void)
 375 {
 376     PIOS_TIM_generic_irq_handler(TIM8);
 377 }
 378
 379 void TIM8_CC_IRQHandler(void) __attribute__((alias("PIOS_TIM_8_CC_irq_handler")));
 380 static void PIOS_TIM_8_CC_irq_handler(void)
 381 {
 382     PIOS_TIM_generic_irq_handler(TIM8);
 383 }
 384
 385 #endif /* PIOS_INCLUDE_TIM */