2 ******************************************************************************
3 * @addtogroup PIOS PIOS Core hardware abstraction layer
5 * @addtogroup PIOS_BKP Backup SRAM functions
6 * @brief Hardware abstraction layer for backup sram
10 * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2013.
11 * @brief IAP functions
12 * @see The GNU Public License (GPL) Version 3
14 *****************************************************************************/
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 3 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33 #include <stm32f10x.h>
34 #include <stm32f10x_bkp.h>
35 #include <stm32f10x_pwr.h>
37 /****************************************************************************************
39 ****************************************************************************************/
41 /*****************************************************************************************
42 * Public Definitions/Macros
43 ****************************************************************************************/
45 /****************************************************************************************
47 ****************************************************************************************/
48 const uint32_t pios_bkp_registers_map
[] = {
69 #if FALSE /* Not enabled as stm32f4 needs some modifications to
70 * accomodate more than 20 registers (like storing 2 uint16_t
71 * regs in one uint32_t bkp location)
97 #define PIOS_BKP_REGISTERS_COUNT NELEMENTS(pios_bkp_registers_map)
99 void PIOS_BKP_Init(void)
101 /* Enable CRC clock */
102 RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC
, ENABLE
);
104 /* Enable PWR and BKP clock */
105 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR
| RCC_APB1Periph_BKP
, ENABLE
);
107 /* Clear Tamper pin Event(TE) pending flag */
111 uint16_t PIOS_BKP_ReadRegister(uint32_t regnumber
)
113 if (PIOS_BKP_REGISTERS_COUNT
< regnumber
) {
116 return (uint16_t)BKP_ReadBackupRegister(pios_bkp_registers_map
[regnumber
]);
120 void PIOS_BKP_WriteRegister(uint32_t regnumber
, uint16_t data
)
122 if (PIOS_BKP_REGISTERS_COUNT
< regnumber
) {
125 BKP_WriteBackupRegister(pios_bkp_registers_map
[regnumber
], (uint32_t)data
);
129 void PIOS_BKP_EnableWrite(void)
131 /* Enable write access to Backup domain */
132 PWR_BackupAccessCmd(ENABLE
);
135 void PIOS_BKP_DisableWrite(void)
137 /* Enable write access to Backup domain */
138 PWR_BackupAccessCmd(DISABLE
);
142 /****************************************************************************************
144 ****************************************************************************************/