flight/pios/stm32f4xx/inc/usb_conf.h

   1 /**
   2  ******************************************************************************
   3  * @file    usb_conf.h
   4  * @author  MCD Application Team
   5  * @version V2.1.0
   6  * @date    19-March-2012
   7  * @brief   General low level driver configuration
   8  ******************************************************************************
   9  * @attention
  10  *
  11  * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
  12  *
  13  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14  * You may not use this file except in compliance with the License.
  15  * You may obtain a copy of the License at:
  16  *
  17  *        http://www.st.com/software_license_agreement_liberty_v2
  18  *
  19  * Unless required by applicable law or agreed to in writing, software
  20  * distributed under the License is distributed on an "AS IS" BASIS,
  21  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22  * See the License for the specific language governing permissions and
  23  * limitations under the License.
  24  *
  25  ******************************************************************************
  26  */
  27
  28 /* Define to prevent recursive inclusion -------------------------------------*/
  29 #ifndef __USB_CONF__H__
  30 #define __USB_CONF__H__
  31
  32 /* Includes ------------------------------------------------------------------*/
  33 #include "stm32f4xx.h"
  34
  35 /** @addtogroup USB_OTG_DRIVER
  36  * @{
  37  */
  38
  39 /** @defgroup USB_CONF
  40  * @brief USB low level driver configuration file
  41  * @{
  42  */
  43
  44 /** @defgroup USB_CONF_Exported_Defines
  45  * @{
  46  */
  47
  48 /* USB Core and PHY interface configuration.
  49    Tip: To avoid modifying these defines each time you need to change the USB
  50         configuration, you can declare the needed define in your toolchain
  51         compiler preprocessor.
  52  */
  53 /****************** USB OTG FS PHY CONFIGURATION *******************************
  54 *  The USB OTG FS Core supports one on-chip Full Speed PHY.
  55 *
  56 *  The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
  57 *  when FS core is used.
  58 *******************************************************************************/
  59 #ifndef USE_USB_OTG_FS
  60 #define USE_USB_OTG_FS
  61 #endif /* USE_USB_OTG_FS */
  62
  63 #ifdef USE_USB_OTG_FS
  64 #define USB_OTG_FS_CORE
  65 #endif
  66
  67 /****************** USB OTG HS PHY CONFIGURATION *******************************
  68 *  The USB OTG HS Core supports two PHY interfaces:
  69 *   (i)  An ULPI interface for the external High Speed PHY: the USB HS Core will
  70 *        operate in High speed mode
  71 *   (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
  72 *
  73 *  You can select the PHY to be used using one of these two defines:
  74 *   (i)  USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
  75 *   (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
  76 *
  77 *  Notes:
  78 *   - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
  79 *     default PHY when HS core is used.
  80 *   - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
  81 *     Configuration (ii) need a different hardware, for more details refer to your
  82 *     STM32 device datasheet.
  83 *******************************************************************************/
  84 #ifndef USE_USB_OTG_HS
  85 // #define USE_USB_OTG_HS
  86 #endif /* USE_USB_OTG_HS */
  87
  88 #ifndef USE_ULPI_PHY
  89 // #define USE_ULPI_PHY
  90 #endif /* USE_ULPI_PHY */
  91
  92 #ifndef USE_EMBEDDED_PHY
  93  #define USE_EMBEDDED_PHY
  94 #endif /* USE_EMBEDDED_PHY */
  95
  96 #ifndef USE_I2C_PHY
  97 // #define USE_I2C_PHY
  98 #endif /* USE_I2C_PHY */
  99
 100
 101 #ifdef USE_USB_OTG_FS
 102  #define USB_OTG_FS_CORE
 103 #endif
 104
 105 #ifdef USE_USB_OTG_HS
 106  #define USB_OTG_HS_CORE
 107 #endif
 108
 109 /*******************************************************************************
 110 *                      FIFO Size Configuration in Device mode
 111 *
 112 *  (i) Receive data FIFO size = RAM for setup packets +
 113 *                   OUT endpoint control information +
 114 *                   data OUT packets + miscellaneous
 115 *      Space = ONE 32-bits words
 116 *     --> RAM for setup packets = 10 spaces
 117 *        (n is the nbr of CTRL EPs the device core supports)
 118 *     --> OUT EP CTRL info      = 1 space
 119 *        (one space for status information written to the FIFO along with each
 120 *        received packet)
 121 *     --> data OUT packets      = (Largest Packet Size / 4) + 1 spaces
 122 *        (MINIMUM to receive packets)
 123 *     --> OR data OUT packets  = at least 2*(Largest Packet Size / 4) + 1 spaces
 124 *        (if high-bandwidth EP is enabled or multiple isochronous EPs)
 125 *     --> miscellaneous = 1 space per OUT EP
 126 *        (one space for transfer complete status information also pushed to the
 127 *        FIFO with each endpoint's last packet)
 128 *
 129 *  (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
 130 *       that particular IN EP. More space allocated in the IN EP Tx FIFO results
 131 *       in a better performance on the USB and can hide latencies on the AHB.
 132 *
 133 *  (iii) TXn min size = 16 words. (n  : Transmit FIFO index)
 134 *   (iv) When a TxFIFO is not used, the Configuration should be as follows:
 135 *       case 1 :  n > m    and Txn is not used    (n,m  : Transmit FIFO indexes)
 136 *       --> Txm can use the space allocated for Txn.
 137 *       case2  :  n < m    and Txn is not used    (n,m  : Transmit FIFO indexes)
 138 *       --> Txn should be configured with the minimum space of 16 words
 139 *  (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
 140 *       of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
 141 *******************************************************************************/
 142
 143 /*******************************************************************************
 144 *                     FIFO Size Configuration in Host mode
 145 *
 146 *  (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
 147 *                             2x (Largest Packet Size / 4) + 1,  If a
 148 *                             high-bandwidth channel or multiple isochronous
 149 *                             channels are enabled
 150 *
 151 *  (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
 152 *      for all supported nonperiodic OUT channels. Typically, a space
 153 *      corresponding to two Largest Packet Size is recommended.
 154 *
 155 *  (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
 156 *        the largest maximum packet size for all supported periodic OUT channels.
 157 *        If there is at least one High Bandwidth Isochronous OUT endpoint,
 158 *        then the space must be at least two times the maximum packet size for
 159 *        that channel.
 160 *******************************************************************************/
 161
 162 /****************** USB OTG HS CONFIGURATION **********************************/
 163 #ifdef USB_OTG_HS_CORE
 164  #define RX_FIFO_HS_SIZE   512
 165  #define TX0_FIFO_HS_SIZE  512
 166  #define TX1_FIFO_HS_SIZE  512
 167  #define TX2_FIFO_HS_SIZE  0
 168  #define TX3_FIFO_HS_SIZE  0
 169  #define TX4_FIFO_HS_SIZE  0
 170  #define TX5_FIFO_HS_SIZE  0
 171  #define TXH_NP_HS_FIFOSIZ 96
 172  #define TXH_P_HS_FIFOSIZ  96
 173
 174 // #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
 175 // #define USB_OTG_HS_SOF_OUTPUT_ENABLED
 176
 177 // #define USB_OTG_INTERNAL_VBUS_ENABLED
 178  #define USB_OTG_EXTERNAL_VBUS_ENABLED
 179
 180  #ifdef USE_ULPI_PHY
 181   #define USB_OTG_ULPI_PHY_ENABLED
 182  #endif
 183  #ifdef USE_EMBEDDED_PHY
 184    #define USB_OTG_EMBEDDED_PHY_ENABLED
 185  #endif
 186  #define USB_OTG_HS_INTERNAL_DMA_ENABLED
 187  #define USB_OTG_HS_DEDICATED_EP1_ENABLED
 188 #endif // ifdef USB_OTG_HS_CORE
 189
 190 /****************** USB OTG FS CONFIGURATION **********************************/
 191 #ifdef USB_OTG_FS_CORE
 192  #define RX_FIFO_FS_SIZE   128
 193  #define TX0_FIFO_FS_SIZE  64
 194  #define TX1_FIFO_FS_SIZE  32
 195  #define TX2_FIFO_FS_SIZE  32
 196  #define TX3_FIFO_FS_SIZE  64
 197  #define TXH_NP_HS_FIFOSIZ 96
 198  #define TXH_P_HS_FIFOSIZ  96
 199
 200 // #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
 201 // #define USB_OTG_FS_SOF_OUTPUT_ENABLED
 202 #endif
 203 // #define VBUS_SENSING_ENABLED
 204 /****************** USB OTG MODE CONFIGURATION ********************************/
 205 // #define USE_HOST_MODE
 206
 207 /****************** USB OTG MODE CONFIGURATION ********************************/
 208 // #define USE_HOST_MODE
 209 #define USE_DEVICE_MODE
 210 // #define USE_OTG_MODE
 211
 212 #ifndef USB_OTG_FS_CORE
 213  #ifndef USB_OTG_HS_CORE
 214     #error  "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
 215  #endif
 216 #endif
 217
 218 #ifndef USE_DEVICE_MODE
 219  #ifndef USE_HOST_MODE
 220     #error  "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
 221  #endif
 222 #endif
 223
 224 #ifndef USE_USB_OTG_HS
 225  #ifndef USE_USB_OTG_FS
 226     #error  "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
 227  #endif
 228 #else // USE_USB_OTG_HS
 229  #ifndef USE_ULPI_PHY
 230   #ifndef USE_EMBEDDED_PHY
 231      #error  "USE_ULPI_PHY or USE_EMBEDDED_PHY should be defined"
 232   #endif
 233  #endif
 234 #endif
 235
 236 /****************** C Compilers dependant keywords ****************************/
 237 /* In HS mode and when the DMA is used, all variables and data structures dealing
 238    with the DMA during the transaction process should be 4-bytes aligned */
 239 #ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
 240   #if defined(__GNUC__) /* GNU Compiler */
 241     #define __ALIGN_END     __attribute__((aligned(4)))
 242     #define __ALIGN_BEGIN
 243   #else
 244     #define __ALIGN_END
 245     #if defined(__CC_ARM) /* ARM Compiler */
 246       #define __ALIGN_BEGIN __align(4)
 247     #elif defined(__ICCARM__) /* IAR Compiler */
 248       #define __ALIGN_BEGIN
 249     #elif defined(__TASKING__) /* TASKING Compiler */
 250       #define __ALIGN_BEGIN __align(4)
 251     #endif /* __CC_ARM */
 252   #endif /* __GNUC__ */
 253 #else
 254   #define __ALIGN_BEGIN
 255   #define __ALIGN_END
 256 #endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
 257
 258 /* __packed keyword used to decrease the data type alignment to 1-byte */
 259 #if defined(__CC_ARM) /* ARM Compiler */
 260   #define __packed __packed
 261 #elif defined(__ICCARM__) /* IAR Compiler */
 262   #define __packed __packed
 263 #elif defined(__GNUC__) /* GNU Compiler */
 264   #define __packed __attribute__((__packed__))
 265 #elif defined(__TASKING__) /* TASKING Compiler */
 266   #define __packed __unaligned
 267 #endif /* __CC_ARM */
 268
 269 /**
 270  * @}
 271  */
 272
 273
 274 /** @defgroup USB_CONF_Exported_Types
 275  * @{
 276  */
 277 /**
 278  * @}
 279  */
 280
 281
 282 /** @defgroup USB_CONF_Exported_Macros
 283  * @{
 284  */
 285 /**
 286  * @}
 287  */
 288
 289 /** @defgroup USB_CONF_Exported_Variables
 290  * @{
 291  */
 292 /**
 293  * @}
 294  */
 295
 296 /** @defgroup USB_CONF_Exported_FunctionsPrototype
 297  * @{
 298  */
 299 /**
 300  * @}
 301  */
 302
 303
 304 #endif // __USB_CONF__H__
 305
 306
 307 /**
 308  * @}
 309  */
 310
 311 /**
 312  * @}
 313  */
 314 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/