2 ******************************************************************************
3 * @addtogroup PIOS PIOS Core hardware abstraction layer
5 * @addtogroup PIOS_L3GD20 L3GD20 Functions
6 * @brief Deals with the hardware interface to the 3-axis gyro
10 * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
11 * @brief L3GD20 3-axis gyor function headers
12 * @see The GNU Public License (GPL) Version 3
14 ******************************************************************************
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 3 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
35 /* L3GD20 Addresses */
36 #define PIOS_L3GD20_WHOAMI 0x0F
37 #define PIOS_L3GD20_CTRL_REG1 0X20
38 #define PIOS_L3GD20_CTRL_REG2 0X21
39 #define PIOS_L3GD20_CTRL_REG3 0X22
40 #define PIOS_L3GD20_CTRL_REG4 0X23
41 #define PIOS_L3GD20_CTRL_REG5 0X24
42 #define PIOS_L3GD20_REFERENCE 0X25
43 #define PIOS_L3GD20_OUT_TEMP 0x26
44 #define PIOS_L3GD20_STATUS_REG 0x27
45 #define PIOS_L3GD20_GYRO_X_OUT_LSB 0x28
46 #define PIOS_L3GD20_GYRO_X_OUT_MSB 0x29
47 #define PIOS_L3GD20_GYRO_Y_OUT_LSB 0x2A
48 #define PIOS_L3GD20_GYRO_Y_OUT_MSB 0x2B
49 #define PIOS_L3GD20_GYRO_Z_OUT_LSB 0x2C
50 #define PIOS_L3GD20_GYRO_Z_OUT_MSB 0x2D
51 #define PIOS_L3GD20_FIFO_CTRL_REG 0x2E
52 #define PIOS_L3GD20_FIFO_SRC_REG 0x2F
53 #define PIOS_L3GD20_INT1_CFG 0x30
54 #define PIOS_L3GD20_INT1_SRC 0x31
55 #define PIOS_L3GD20_INT1_TSH_XH 0x32
56 #define PIOS_L3GD20_INT1_TSH_XL 0x33
57 #define PIOS_L3GD20_INT1_TSH_YH 0x34
58 #define PIOS_L3GD20_INT1_TSH_YL 0x35
59 #define PIOS_L3GD20_INT1_TSH_ZH 0x36
60 #define PIOS_L3GD20_INT1_TSH_ZL 0x37
61 #define PIOS_L3GD20_INT1_DURATION 0x38
64 #define PIOS_L3GD20_CTRL1_FASTEST 0xF0
65 #define PIOS_L3GD20_CTRL1_380HZ_100HZ 0xB0
66 #define PIOS_L3GD20_CTRL1_PD 0x08
67 #define PIOS_L3GD20_CTRL1_ZEN 0x04
68 #define PIOS_L3GD20_CTRL1_YEN 0x02
69 #define PIOS_L3GD20_CTRL1_XEN 0x01
71 /* FIFO enable for storing different values */
72 #define PIOS_L3GD20_FIFO_TEMP_OUT 0x80
73 #define PIOS_L3GD20_FIFO_GYRO_X_OUT 0x40
74 #define PIOS_L3GD20_FIFO_GYRO_Y_OUT 0x20
75 #define PIOS_L3GD20_FIFO_GYRO_Z_OUT 0x10
76 #define PIOS_L3GD20_ACCEL_OUT 0x08
78 /* Interrupt Configuration */
79 #define PIOS_L3GD20_INT_ACTL 0x80
80 #define PIOS_L3GD20_INT_OPEN 0x40
81 #define PIOS_L3GD20_INT_LATCH_EN 0x20
82 #define PIOS_L3GD20_INT_CLR_ANYRD 0x10
84 #define PIOS_L3GD20_INTEN_OVERFLOW 0x10
85 #define PIOS_L3GD20_INTEN_DATA_RDY 0x01
87 /* Interrupt status */
88 #define PIOS_L3GD20_INT_STATUS_FIFO_FULL 0x80
89 #define PIOS_L3GD20_INT_STATUS_IMU_RDY 0X04
90 #define PIOS_L3GD20_INT_STATUS_DATA_RDY 0X01
92 /* User control functionality */
93 #define PIOS_L3GD20_USERCTL_FIFO_EN 0X40
94 #define PIOS_L3GD20_USERCTL_FIFO_RST 0X02
95 #define PIOS_L3GD20_USERCTL_GYRO_RST 0X01
97 /* Power management and clock selection */
98 #define PIOS_L3GD20_PWRMGMT_IMU_RST 0X80
99 #define PIOS_L3GD20_PWRMGMT_INTERN_CLK 0X00
100 #define PIOS_L3GD20_PWRMGMT_PLL_X_CLK 0X01
101 #define PIOS_L3GD20_PWRMGMT_PLL_Y_CLK 0X02
102 #define PIOS_L3GD20_PWRMGMT_PLL_Z_CLK 0X03
103 #define PIOS_L3GD20_PWRMGMT_STOP_CLK 0X07
105 enum pios_l3gd20_range
{
106 PIOS_L3GD20_SCALE_250_DEG
= 0x00,
107 PIOS_L3GD20_SCALE_500_DEG
= 0x10,
108 PIOS_L3GD20_SCALE_2000_DEG
= 0x3
111 enum pios_l3gd20_filter
{
112 PIOS_L3GD20_LOWPASS_256_HZ
= 0x00,
113 PIOS_L3GD20_LOWPASS_188_HZ
= 0x01,
114 PIOS_L3GD20_LOWPASS_98_HZ
= 0x02,
115 PIOS_L3GD20_LOWPASS_42_HZ
= 0x03,
116 PIOS_L3GD20_LOWPASS_20_HZ
= 0x04,
117 PIOS_L3GD20_LOWPASS_10_HZ
= 0x05,
118 PIOS_L3GD20_LOWPASS_5_HZ
= 0x06
121 struct pios_l3gd20_data
{
128 struct pios_l3gd20_cfg
{
129 const struct pios_exti_cfg
*exti_cfg
; /* Pointer to the EXTI configuration */
131 enum pios_l3gd20_range range
;
134 /* Public Functions */
135 extern int32_t PIOS_L3GD20_Init(uint32_t spi_id
, uint32_t slave_num
, const struct pios_l3gd20_cfg
*cfg
);
136 extern xQueueHandle
PIOS_L3GD20_GetQueue();
137 extern int32_t PIOS_L3GD20_ReadGyros(struct pios_l3gd20_data
*buffer
);
138 extern int32_t PIOS_L3GD20_SetRange(enum pios_l3gd20_range range
);
139 extern float PIOS_L3GD20_GetScale();
140 extern int32_t PIOS_L3GD20_ReadID();
141 extern uint8_t PIOS_L3GD20_Test();
142 extern bool PIOS_L3GD20_IRQHandler();
144 #endif /* PIOS_L3GD20_H */