decoders/spiflash/lists.py

   1 ##
   2 ## This file is part of the libsigrokdecode project.
   3 ##
   4 ## Copyright (C) 2015-2020 Uwe Hermann <uwe@hermann-uwe.de>
   5 ##
   6 ## This program is free software; you can redistribute it and/or modify
   7 ## it under the terms of the GNU General Public License as published by
   8 ## the Free Software Foundation; either version 2 of the License, or
   9 ## (at your option) any later version.
  10 ##
  11 ## This program is distributed in the hope that it will be useful,
  12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ## GNU General Public License for more details.
  15 ##
  16 ## You should have received a copy of the GNU General Public License
  17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
  18 ##
  19
  20 from collections import OrderedDict
  21
  22 # OrderedDict which maps command IDs to their names and descriptions.
  23 # Please keep this sorted by command ID.
  24 cmds = OrderedDict([
  25     (0x01, ('WRSR', 'Write status register')),
  26     (0x02, ('PP', 'Page program')),
  27     (0x03, ('READ', 'Read data')),
  28     (0x04, ('WRDI', 'Write disable')),
  29     (0x05, ('RDSR', 'Read status register')),
  30     (0x06, ('WREN', 'Write enable')),
  31     (0x0b, ('FAST/READ', 'Fast read data')),
  32     (0x20, ('SE', 'Sector erase')),
  33     (0x2b, ('RDSCUR', 'Read security register')),
  34     (0x2f, ('WRSCUR', 'Write security register')),
  35     (0x35, ('RDSR2', 'Read status register 2')),
  36     (0x60, ('CE', 'Chip erase')),
  37     (0x70, ('ESRY', 'Enable SO to output RY/BY#')),
  38     (0x80, ('DSRY', 'Disable SO to output RY/BY#')),
  39     (0x82, ('WRITE1', 'Main memory page program through buffer 1 with built-in erase')),
  40     (0x85, ('WRITE2', 'Main memory page program through buffer 2 with built-in erase')),
  41     (0x90, ('REMS', 'Read electronic manufacturer & device ID')),
  42     (0x9f, ('RDID', 'Read identification')),
  43     (0xab, ('RDP/RES', 'Release from deep powerdown / Read electronic ID')),
  44     (0xad, ('CP', 'Continuously program mode')),
  45     (0xb1, ('ENSO', 'Enter secured OTP')),
  46     (0xb9, ('DP', 'Deep power down')),
  47     (0xbb, ('2READ', '2x I/O read')), # a.k.a. "Fast read dual I/O".
  48     (0xc1, ('EXSO', 'Exit secured OTP')),
  49     (0xc7, ('CE2', 'Chip erase 2')), # Alternative command ID
  50     (0xd7, ('STATUS', 'Status register read')),
  51     (0xd8, ('BE', 'Block erase')),
  52     (0xef, ('REMS2', 'Read ID for 2x I/O mode')),
  53 ])
  54
  55 device_name = {
  56     'adesto': {
  57         0x00: 'AT45Dxxx family, standard series',
  58     },
  59     'fidelix': {
  60         0x15: 'FM25Q32',
  61     },
  62     'macronix': {
  63         0x14: 'MX25L1605D',
  64         0x15: 'MX25L3205D',
  65         0x16: 'MX25L6405D',
  66     },
  67     'winbond': {
  68         0x13: 'W25Q80DV',
  69     },
  70 }
  71
  72 chips = {
  73     # Adesto
  74     'adesto_at45db161e': {
  75         'vendor': 'Adesto',
  76         'model': 'AT45DB161E',
  77         'res_id': None, # The chip doesn't emit an ID here.
  78         'rems_id': None, # Not supported by the chip.
  79         'rems2_id': None, # Not supported by the chip.
  80         'rdid_id': 0x1f26000100, # RDID and 2 extra "EDI" bytes.
  81         'page_size': 528, # Configurable, could also be 512 bytes.
  82         'sector_size': 128 * 1024,
  83         'block_size': 4 * 1024,
  84     },
  85     # Atmel
  86     'atmel_at25128': {
  87         'vendor': 'Atmel',
  88         'model': 'AT25128',
  89         'res_id': None, # Not supported by the chip.
  90         'rems_id': None, # Not supported by the chip.
  91         'rems2_id': None, # Not supported by the chip.
  92         'rdid_id': None, # Not supported by the chip.
  93         'page_size': 64,
  94         'sector_size': None, # The chip doesn't have sectors.
  95         'block_size': None, # The chip doesn't have blocks.
  96     },
  97     'atmel_at25256': {
  98         'vendor': 'Atmel',
  99         'model': 'AT25256',
 100         'res_id': None, # Not supported by the chip.
 101         'rems_id': None, # Not supported by the chip.
 102         'rems2_id': None, # Not supported by the chip.
 103         'rdid_id': None, # Not supported by the chip.
 104         'page_size': 64,
 105         'sector_size': None, # The chip doesn't have sectors.
 106         'block_size': None, # The chip doesn't have blocks.
 107     },
 108     # FIDELIX
 109     'fidelix_fm25q32': {
 110         'vendor': 'FIDELIX',
 111         'model': 'FM25Q32',
 112         'res_id': 0x15,
 113         'rems_id': 0xa115,
 114         'rems2_id': 0xa115,
 115         'rdid_id': 0xa14016,
 116         'page_size': 256,
 117         'sector_size': 4 * 1024,
 118         'block_size': 64 * 1024,
 119     },
 120     # Macronix
 121     'macronix_mx25l1605d': {
 122         'vendor': 'Macronix',
 123         'model': 'MX25L1605D',
 124         'res_id': 0x14,
 125         'rems_id': 0xc214,
 126         'rems2_id': 0xc214,
 127         'rdid_id': 0xc22015,
 128         'page_size': 256,
 129         'sector_size': 4 * 1024,
 130         'block_size': 64 * 1024,
 131     },
 132     'macronix_mx25l3205d': {
 133         'vendor': 'Macronix',
 134         'model': 'MX25L3205D',
 135         'res_id': 0x15,
 136         'rems_id': 0xc215,
 137         'rems2_id': 0xc215,
 138         'rdid_id': 0xc22016,
 139         'page_size': 256,
 140         'sector_size': 4 * 1024,
 141         'block_size': 64 * 1024,
 142     },
 143     'macronix_mx25l6405d': {
 144         'vendor': 'Macronix',
 145         'model': 'MX25L6405D',
 146         'res_id': 0x16,
 147         'rems_id': 0xc216,
 148         'rems2_id': 0xc216,
 149         'rdid_id': 0xc22017,
 150         'page_size': 256,
 151         'sector_size': 4 * 1024,
 152         'block_size': 64 * 1024,
 153     },
 154     # Winbond
 155     'winbond_w25q80dv': {
 156         'vendor': 'Winbond',
 157         'model': 'W25Q80DV',
 158         'res_id': 0x13,
 159         'rems_id': 0xef13,
 160         'rems2_id': None, # Not supported by the chip.
 161         'rdid_id': 0xef4014,
 162         'page_size': 256,
 163         'sector_size': 4 * 1024,
 164         'block_size': 64 * 1024, # Configurable, could also be 32 * 1024 bytes.
 165     },
 166 }