arch/arm/mach-atmel/irq.c

   1 /*
   2  *  linux/arch/armnommu/mach-atmel/irq.c
   3  *
   4  *  Copyright (C) 1999 ARM Limited
   5  *  Copyright (C) 2003 SAMSUNG ELECTRONICS
   6  *            Hyok S. Choi (hyok.choi@samsung.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22 #include <linux/types.h>
  23 #include <linux/sched.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/types.h>
  26 #include <linux/kernel.h>
  27 #include <linux/init.h>
  28 #include <linux/list.h>
  29 #include <linux/device.h>
  30 #include <linux/slab.h>
  31 #include <linux/string.h>
  32 #include <linux/sysdev.h>
  33
  34 #include <asm/hardware.h>
  35 #include <asm/io.h>
  36 #include <asm/irq.h>
  37 #include <asm/setup.h>
  38 #include <asm/mach-types.h>
  39
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/irq.h>
  42 #include <asm/mach/map.h>
  43
  44  /* Internal Sources */
  45 #define LevelSensitive  (0<<5)
  46 #define EdgeTriggered   (1<<5)
  47
  48  /* External Sources */
  49 #define LowLevel        (0<<5)
  50 #define NegativeEdge    (1<<5)
  51 #define HighLevel       (2<<5)
  52 #define PositiveEdge    (3<<5)
  53
  54 static unsigned char eb01_irq_prtable[32] = {
  55         7, /* FIQ */
  56         0, /* SWIRQ */
  57         0, /* US0IRQ */
  58         0, /* US1IRQ */
  59         2, /* TC0IRQ */
  60         2, /* TC1IRQ */
  61         2, /* TC2IRQ */
  62         0, /* WDIRQ */
  63         0, /* PIOAIRQ */
  64         0, /* reserved */
  65         0, /* reserved */
  66         0, /* reserved */
  67         0, /* reserved */
  68         0, /* reserved */
  69         0, /* reserved */
  70         0, /* reserved */
  71         1, /* IRQ0 */
  72         0, /* IRQ1 */
  73         0, /* IRQ2 */
  74 };
  75
  76 static unsigned char eb01_irq_type[32] = {
  77         EdgeTriggered,
  78         EdgeTriggered,
  79         EdgeTriggered,
  80         EdgeTriggered,
  81         EdgeTriggered,
  82         EdgeTriggered,
  83         EdgeTriggered,
  84         EdgeTriggered,
  85         EdgeTriggered,
  86         EdgeTriggered,
  87         EdgeTriggered,
  88         EdgeTriggered,
  89         EdgeTriggered,
  90         EdgeTriggered,
  91         EdgeTriggered,
  92         EdgeTriggered,
  93
  94         EdgeTriggered,  /* IRQ0 = neg. edge */
  95         EdgeTriggered,
  96         EdgeTriggered,
  97         EdgeTriggered,
  98         EdgeTriggered,
  99         EdgeTriggered,
 100         EdgeTriggered,
 101         EdgeTriggered,
 102         EdgeTriggered,
 103         EdgeTriggered,
 104         EdgeTriggered,
 105         EdgeTriggered,
 106         EdgeTriggered,
 107         EdgeTriggered,
 108         EdgeTriggered,
 109         EdgeTriggered,
 110 };
 111
 112 void __inline__ at91_mask_irq(unsigned int irq)
 113 {
 114         unsigned long mask = 1 << (irq);
 115         __raw_writel(mask, AIC_IDCR);
 116 }
 117
 118 void __inline__ at91_unmask_irq(unsigned int irq)
 119 {
 120         unsigned long mask = 1 << (irq);
 121         __raw_writel(mask, AIC_IECR);
 122 }
 123
 124 void __inline__ at91_mask_ack_irq(unsigned int irq)
 125 {
 126         at91_mask_irq(irq);
 127 }
 128
 129 void __inline__ at91_end_of_isr(void)
 130 {
 131         /* Indicates end of ISR to AIC */
 132         __raw_writel(0x1L, AIC_EOICR); /* AIC don't care the value */
 133 }
 134
 135 void __inline__ at91_unmask_and_eoi(unsigned int irq)
 136 {
 137         at91_unmask_irq(irq);
 138         at91_end_of_isr();
 139 }
 140
 141 static struct irqchip at91_chip = {
 142         .ack    = at91_mask_ack_irq,
 143         .mask   = at91_mask_irq,
 144         .unmask = at91_unmask_and_eoi,
 145 };
 146
 147 #ifdef CONFIG_PM
 148 static unsigned long ic_irq_enable;
 149
 150 static int irq_suspend(struct sys_device *dev, u32 state)
 151 {
 152         return 0;
 153 }
 154
 155 static int irq_resume(struct sys_device *dev)
 156 {
 157         /* disable all irq sources */
 158         return 0;
 159 }
 160 #else
 161 #define irq_suspend NULL
 162 #define irq_resume NULL
 163 #endif
 164
 165 static struct sysdev_class irq_class = {
 166         set_kset_name("irq"),
 167         .suspend        = irq_suspend,
 168         .resume         = irq_resume,
 169 };
 170
 171 static struct sys_device irq_device = {
 172         .id     = 0,
 173         .cls    = &irq_class,
 174 };
 175
 176 static int __init irq_init_sysfs(void)
 177 {
 178         int ret = sysdev_class_register(&irq_class);
 179         if (ret == 0)
 180                 ret = sysdev_register(&irq_device);
 181         return ret;
 182 }
 183
 184 device_initcall(irq_init_sysfs);
 185
 186 void __init atmel_init_irq(void)
 187 {
 188         int irq;
 189
 190         /* Disable all interrupts */
 191         __raw_writel(0xFFFFFFFF, AIC_IDCR);
 192
 193         /* Clear all interrupts */
 194         __raw_writel(0xFFFFFFFF, AIC_ICCR);
 195
 196         for ( irq = 0 ; irq < 32 ; irq++ ) {
 197                 __raw_writel(irq, AIC_EOICR);
 198         }
 199
 200         for ( irq = 0 ; irq < 32 ; irq++ ) {
 201                 __raw_writel(eb01_irq_prtable[irq] | eb01_irq_type[irq],
 202                         AIC_SMR(irq));
 203         }
 204
 205         for (irq = 0; irq < NR_IRQS; irq++) {
 206                 if (!VALID_IRQ(irq)) continue;
 207                 set_irq_chip(irq, &at91_chip);
 208                 set_irq_handler(irq, do_level_IRQ);
 209                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 210         }
 211 }