3 * Hyok S. Choi <hyok.choi@samsung.com>
4 * linux/arch/armnommu/mach-s3c44b0x/time.c
7 #include <linux/init.h>
8 #include <linux/time.h>
9 #include <linux/timex.h>
10 #include <linux/types.h>
11 #include <linux/sched.h>
12 #include <linux/interrupt.h>
14 #include <asm/arch/hardware.h>
15 #include <asm/uaccess.h>
16 #include <asm/hardware.h>
17 #include <asm/mach/time.h>
18 #include <asm/arch/timex.h>
20 #define S3C44B0X_SYSTIMER_DIVIDER 2
21 extern int s3c44b0x_fMHZ
;
22 extern int s3c44b0x_finMHZ
;
24 /* the system clock is in MHz unit, here I use the prescale value for 1 us resolution */
26 #if CONFIG_ARM_CLK_ADJUST
27 void s3c44b0x_systimer_setup(void)
29 void __init
s3c44b0x_systimer_setup(void)
32 int prescale
= s3c44b0x_fMHZ
/ S3C44B0X_SYSTIMER_DIVIDER
;
33 int cnt
= s3c44b0x_fMHZ
* 1000000 / prescale
/ S3C44B0X_SYSTIMER_DIVIDER
/ HZ
;
35 SYSREG_CLR (S3C44B0X_TCON
,0x7<<24); // stop timer 5
36 SYSREG_SET (S3C44B0X_TCNTB5
, cnt
);
37 SYSREG_OR_SET (S3C44B0X_TCON
, 2<<24); // update timer5 counter
39 SYSREG_OR_SET (S3C44B0X_TCFG0
, (prescale
- 1) << 16); // set prescale, bit 16-23
40 SYSREG_AND_SET (S3C44B0X_TCFG1
, 0xff0fffff); // set timer5 divider, bit 20-23. 0 for 1/2
43 void __inline__
s3c44b0x_systimer_start(void)
45 SYSREG_CLR (S3C44B0X_TCON
, 0x02<<24);
46 SYSREG_OR_SET (S3C44B0X_TCON
, 0x05<<24);
50 * Set up timer interrupt.
52 #if CONFIG_ARM_CLK_ADJUST
53 void s3c44b0x_led_off(int);
54 void s3c44b0x_led_on(int);
57 unsigned long s3c44b0x_gettimeoffset (void)
59 return SYSREG_GETW(S3C44B0X_TCNTB5
);
62 static irqreturn_t
s3c44b0x_timer_interrupt(int irq
, void *dev_id
)
64 #if CONFIG_DEBUG_NICKMIT
82 static struct irqaction s3c44b0x_timer_irq
= {
83 .name
= "S3C44B0X Timer Tick",
84 .flags
= IRQF_DISABLED
| IRQF_TIMER
,
85 .handler
= s3c44b0x_timer_interrupt
89 void __init
s3c44b0x_time_init(void)
91 s3c44b0x_systimer_setup();
93 * @todo do those really need to be function pointers ?
95 gettimeoffset
= s3c44b0x_gettimeoffset
;
96 s3c44b0x_timer_irq
.handler
= s3c44b0x_timer_interrupt
;
98 setup_irq(S3C44B0X_INTERRUPT_TIMER5
, &s3c44b0x_timer_irq
);
99 s3c44b0x_clear_pb(S3C44B0X_INTERRUPT_TIMER5
);
100 s3c44b0x_unmask_irq(S3C44B0X_INTERRUPT_TIMER5
);
102 s3c44b0x_systimer_start();