2 * linux/arch/m68knommu/platform/68360/config.c
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 * Copyright (C) 1993 Hamish Macdonald
6 * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
14 #include <linux/types.h>
15 #include <linux/kernel.h>
17 #include <linux/tty.h>
18 #include <linux/console.h>
20 #include <asm/setup.h>
21 #include <asm/system.h>
22 #include <asm/pgtable.h>
24 #include <asm/machdep.h>
25 #include <asm/m68360.h>
28 #include <asm/bootstd.h>
31 extern void m360_cpm_reset(void);
33 // Mask to select if the PLL prescaler is enabled.
34 #define MCU_PREEN ((unsigned short)(0x0001 << 13))
36 #if defined(CONFIG_UCQUICC)
37 #define OSCILLATOR (unsigned long int)33000000
40 unsigned long int system_clock
;
42 void M68360_init_IRQ(void);
46 /* TODO DON"T Hard Code this */
47 /* calculate properly using the right PLL and prescaller */
48 // unsigned int system_clock = 33000000l;
49 extern unsigned long int system_clock
; //In kernel setup.c
51 extern void config_M68360_irq(void);
53 void BSP_sched_init(void (*timer_routine
)(int, void *, struct pt_regs
*))
55 unsigned char prescaler
;
56 unsigned short tgcr_save
;
60 /* Restart mode, Enable int, 32KHz, Enable timer */
61 TCTL
= TCTL_OM
| TCTL_IRQEN
| TCTL_CLKSOURCE_32KHZ
| TCTL_TEN
;
62 /* Set prescaler (Divide 32KHz by 32)*/
64 /* Set compare register 32Khz / 32 / 10 = 100 */
67 request_irq(IRQ_MACHSPEC
| 1, timer_routine
, IRQ_FLG_LOCK
, "timer", NULL
);
70 /* General purpose quicc timers: MC68360UM p7-20 */
72 /* Set up timer 1 (in [1..4]) to do 100Hz */
73 tgcr_save
= pquicc
->timer_tgcr
& 0xfff0;
74 pquicc
->timer_tgcr
= tgcr_save
; /* stop and reset timer 1 */
75 /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
78 pquicc
->timer_tmr1
= 0x001a | /* or=1, frr=1, iclk=01b */
79 (unsigned short)((prescaler
- 1) << 8);
81 pquicc
->timer_tcn1
= 0x0000; /* initial count */
82 /* calculate interval for 100Hz based on the _system_clock: */
83 pquicc
->timer_trr1
= (system_clock
/ prescaler
) / HZ
; /* reference count */
85 pquicc
->timer_ter1
= 0x0003; /* clear timer events */
87 /* enable timer 1 interrupt in CIMR */
88 // request_irq(IRQ_MACHSPEC | CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
89 //return_value = request_irq( CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
90 return_value
= request_irq(CPMVEC_TIMER1
, timer_routine
, IRQ_FLG_LOCK
,
94 tgcr_save
= (pquicc
->timer_tgcr
& 0xfff0) | 0x0001;
95 pquicc
->timer_tgcr
= tgcr_save
;
104 pquicc
->timer_ter1
= 0x0002; /* clear timer event */
107 unsigned long BSP_gettimeoffset (void)
112 void BSP_gettod (int *yearp
, int *monp
, int *dayp
,
113 int *hourp
, int *minp
, int *secp
)
117 int BSP_hwclk(int op
, struct rtc_time
*t
)
127 int BSP_set_clock_mmss (unsigned long nowtime
)
130 short real_seconds
= nowtime
% 60, real_minutes
= (nowtime
/ 60) % 60;
132 tod
->second1
= real_seconds
/ 10;
133 tod
->second2
= real_seconds
% 10;
134 tod
->minute1
= real_minutes
/ 10;
135 tod
->minute2
= real_minutes
% 10;
140 void BSP_reset (void)
144 "moveal #_start, %a0;\n"
145 "moveb #0, 0xFFFFF300;\n"
146 "moveal 0(%a0), %sp;\n"
147 "moveal 4(%a0), %a0;\n"
152 unsigned char *scc1_hwaddr
;
155 #if defined (CONFIG_UCQUICC)
156 _bsc0(char *, getserialnum
)
157 _bsc1(unsigned char *, gethwaddr
, int, a
)
158 _bsc1(char *, getbenv
, char *, a
)
162 void config_BSP(char *command
, int len
)
168 /* Calculate the real system clock value. */
170 unsigned int local_pllcr
= (unsigned int)(pquicc
->sim_pllcr
);
171 if( local_pllcr
& MCU_PREEN
) // If the prescaler is dividing by 128
173 int mf
= (int)(pquicc
->sim_pllcr
& 0x0fff);
174 system_clock
= (OSCILLATOR
/ 128) * (mf
+ 1);
178 int mf
= (int)(pquicc
->sim_pllcr
& 0x0fff);
179 system_clock
= (OSCILLATOR
) * (mf
+ 1);
183 printk(KERN_INFO
"\n68360 QUICC support (C) 2000 Lineo Inc.\n");
185 #if defined(CONFIG_UCQUICC) && 0
186 printk(KERN_INFO
"uCquicc serial string [%s]\n",getserialnum());
187 p
= scc1_hwaddr
= gethwaddr(0);
188 printk(KERN_INFO
"uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
189 p
[0], p
[1], p
[2], p
[3], p
[4], p
[5]);
191 p
= getbenv("APPEND");
197 scc1_hwaddr
= "\00\01\02\03\04\05";
200 mach_sched_init
= BSP_sched_init
;
201 mach_tick
= BSP_tick
;
202 mach_gettimeoffset
= BSP_gettimeoffset
;
203 mach_gettod
= BSP_gettod
;
205 mach_set_clock_mmss
= NULL
;
206 mach_reset
= BSP_reset
;