drivers/net/ks8695/ks8695_ioctrl.h

   1 /*
   2  * ks8695_ictrol.h
   3  *      This header file defines the ioctrols supported by the driver.
   4  *
   5  *  Copyright (c) 2002-2003, Micrel Semiconductor. All rights reserved.
   6  *
   7  *  Modification History
   8  *
   9  *  Name        Date        Ver     Brief
  10  *  ----------- ----------- ------- --------------------------------------------
  11  *      RLQ     06/03/2003  1.0.0.6 Added new features for KS8695P
  12  *      RLQ     08/22/2002  1.0.0.0 First created for sharing among driver, this and web module
  13  */
  14 #ifndef __KS8695_IOCTRL_H
  15 #define __KS8695_IOCTRL_H
  16
  17 /*
  18  * local defines
  19  */
  20 enum {
  21         REG_DMA_DUMP,                   /* dump all base DMA registers (based on current driver is for) */
  22         REG_DMA_STATION_DUMP,           /* dump all DMA extra station registers */
  23         REG_UART_DUMP,                  /* dump all UART related registers */
  24         REG_INT_DUMP,                   /* dump all Interrupt related registers */
  25         REG_TIMER_DUMP,                 /* dump all Timer related registers */
  26         REG_GPIO_DUMP,                  /* dump all GPIO related registers */
  27         REG_SWITCH_DUMP,                /* dump all Switch related registers */
  28         REG_MISC_DUMP,                  /* dump all misc registers */
  29         REG_SNMP_DUMP,                  /* dump all SNMP registers */
  30
  31         DRV_VERSION,                    /* get driver version, (we need this since proc is removed from driver) */
  32
  33         DUMP_PCI_SPACE,                 /* dump PCI configuration space for KS8695P */
  34         DUMP_BRIDGE_REG,                /* dump bridge related register for KS8695P */
  35
  36         MEMORY_DUMP,                    /* to dump given memory */
  37         MEMORY_SEARCH,                  /* to search for given data pattern */
  38
  39         REG_WRITE,                      /* to write IO register */
  40
  41         DEBUG_DUMP_TX_PACKET,           /* to debug ethernet packet to transmit */
  42         DEBUG_DUMP_RX_PACKET,           /* to debug ethernet packet received */
  43
  44         DEBUG_RESET_DESC,               /* to reset Rx descriptors */
  45         DEBUG_STATISTICS,               /* debug statistics */
  46         DEBUG_DESCRIPTORS,              /* debug descriptors */
  47
  48         DEBUG_LINK_STATUS,              /* debug link status */
  49
  50         CONFIG_LINK_TYPE,               /* configure link media type */
  51         CONFIG_STATION_EX,              /* configure additional station */
  52
  53         /* switch configuration for web page */
  54         CONFIG_SWITCH_GET,              /* get switch configuration settings */
  55         CONFIG_SWITCH_SET,              /* set switch configuration settings */
  56 };
  57
  58 /* defined configured SWITCH SUBID */
  59 enum CONFIG_SWITCH_SUBID {
  60         /* configuration related to basic switch web page */
  61         CONFIG_SW_SUBID_ON,                             /* turn on/off switch for LAN */
  62         CONFIG_SW_SUBID_PORT_VLAN,                      /* configure port VLAN ID, and Engress mode */
  63         CONFIG_SW_SUBID_PRIORITY,                       /* configure port priority */
  64
  65         /* configuration related to advanced switch web page */
  66         CONFIG_SW_SUBID_ADV_LINK_SELECTION,             /* configure port link selection */
  67         CONFIG_SW_SUBID_ADV_CTRL,                       /* configure switch control register */
  68         CONFIG_SW_SUBID_ADV_MIRRORING,                  /* configure switch port mirroring */
  69         CONFIG_SW_SUBID_ADV_THRESHOLD,                  /* configure threshold for both 802.1p and broadcast storm protection */
  70         CONFIG_SW_SUBID_ADV_DSCP,                       /* configure switch DSCP priority */
  71
  72         /* configuration related to Switch internal web page */
  73         CONFIG_SW_SUBID_INTERNAL_LED,                   /* configure LED for all */
  74         CONFIG_SW_SUBID_INTERNAL_MISC,                  /* configure misc. */
  75         CONFIG_SW_SUBID_INTERNAL_SPANNINGTREE,          /* configure spanning tree */
  76
  77         /* configuration phy related features for KS8695P */
  78         CONFIG_SW_SUBID_PHY_IF,                         /* configure PHY interface, for KS8695P only */
  79         CONFIG_SW_SUBID_SEC1,                           /* configure Switch Engine Control 1 register 0xE804 */
  80
  81         /* for KS8695P only */
  82         CONFIG_SW_SUBID_GENERIC_DUMP,                   /* generic dump for KS8695), e.g. Dynamic Mac Table, or switch registers */
  83         CONFIG_SW_SUBID_RATE_CTRL,                      /* high/low priority rate control */
  84 };
  85
  86 enum  GENERIC_DUMP {
  87         GENERIC_DUMP_STATIC,            /* dump static Mac table */
  88         GENERIC_DUMP_DYNAMIC,           /* dump dynamic Mac table */
  89         GENERIC_DUMP_VLAN,              /* dump VLAN table */
  90         GENERIC_DUMP_SWITCH_REGS,       /* dump switch registers for KS8695P */
  91 };
  92
  93 /* defined configured SWITCH SUBID */
  94 enum _DEBUG_PACKET {            /* debug packet bit definition */
  95         DEBUG_PACKET_LEN        = 0x00000001,           /* debug packet length */
  96         DEBUG_PACKET_HEADER     = 0x00000002,           /* debug packet header */
  97         DEBUG_PACKET_CONTENT    = 0x00000004,           /* debug packet content */
  98         DEBUG_PACKET_OVSIZE     = 0x00000008,           /* dump rx over sized packet content */
  99         DEBUG_PACKET_UNDERSIZE  = 0x00000010,           /* prompt rx under sized packet */
 100 };
 101
 102 #define REG_DMA_MAX             8
 103 #define REG_DMA_STATION_MAX     32
 104 #define REG_UART_MAX            9
 105 #define REG_INT_MAX             14
 106 #define REG_TIMER_MAX           5
 107 #define REG_GPIO_MAX            3
 108 #define REG_SWITCH_MAX          21
 109 #define REG_MISC_MAX            7
 110 #define REG_SNMP_MAX            138
 111
 112 #define DUMP_BUFFER_MAX         1024
 113
 114 #define SW_PHY_AUTO             0   /* autosense */
 115 #define SW_PHY_10BASE_T         1   /* 10Base-T */
 116 #define SW_PHY_10BASE_T_FD      2   /* 10Base-T Full Duplex */
 117 #define SW_PHY_100BASE_TX       3   /* 100Base-TX */
 118 #define SW_PHY_100BASE_TX_FD    4   /* 100Base-TX Full Duplex */
 119
 120 /* use __packed in armcc later */
 121 typedef struct {
 122         uint8_t         byId;
 123         uint16_t        usLen;
 124         union {
 125                 uint32_t        uData[0];
 126                 uint16_t        usData[0];
 127                 uint8_t         byData[0];
 128         } u;
 129 } IOCTRL, *PIOCTRL;
 130
 131 typedef struct {
 132         uint8_t         byId;
 133         uint16_t        usLen;
 134         uint8_t         bySubId;
 135         union {
 136                 uint32_t        uData[0];
 137                 uint16_t        usData[0];
 138                 uint8_t         byData[0];
 139         } u;
 140 } IOCTRL_SWITCH, *PIOCTRL_SWITCH;
 141
 142 enum _LINK_SELECTION {
 143         LINK_SELECTION_FULL_AUTO = 0,           /* fully auto nego */
 144         LINK_SELECTION_FORCED,                          /* forced mode, no auto nego */
 145         LINK_SELECTION_PARTIAL_AUTO,            /* partial auto nego */
 146 };
 147
 148 /* The proprietary IOCTL code for PHY IO access */
 149 #define SIOC_KS8695_IOCTRL      (SIOCDEVPRIVATE + 15)
 150
 151 /* Used for mapping mii-tool -> KS8695 register def'ns */
 152 struct mii_reg {
 153         UINT reg;
 154         UINT shift;
 155 };
 156
 157 struct mii_regs {
 158         struct mii_reg config;
 159         struct mii_reg autonego;
 160         struct mii_reg power;
 161 };
 162
 163 #endif  /*__KS8695_IOCTRL_H*/