include/asm-arm/arch-moxart/cpe_time.h

   1 #ifndef _CPE_TIME_H_
   2 #define _CPE_TIME_H_
   3 //#include <asm/arch/moxa.h>
   4 //#include <asm/arch/cpe_int.h>
   5
   6 #define TIMER1_COUNT                0x0
   7 #define TIMER1_LOAD                 0x4
   8 #define TIMER1_MATCH1               0x8
   9 #define TIMER1_MATCH2               0xC
  10 #define TIMER2_COUNT                0x10
  11 #define TIMER2_LOAD                 0x14
  12 #define TIMER2_MATCH1               0x18
  13 #define TIMER2_MATCH2               0x1C
  14 #define TIMER3_COUNT                0x20
  15 #define TIMER3_LOAD                 0x24
  16 #define TIMER3_MATCH1               0x28
  17 #define TIMER3_MATCH2               0x2C
  18 #define TIMER_CR                    0x30
  19 #define TIMER_INTR_STATE        0x34
  20 #define TIMER_INTR_MASK         0x38
  21
  22 typedef struct
  23 {
  24         unsigned int Tm1En:1;           // Timer1 enable bit
  25         unsigned int Tm1Clock:1;        // Timer1 clock source (0: PCLK, 1: EXT1CLK)
  26         unsigned int Tm1OfEn:1;         // Timer1 over flow interrupt enable bit
  27         unsigned int Tm2En:1;
  28         unsigned int Tm2Clock:1;
  29         unsigned int Tm2OfEn:1;
  30         unsigned int Tm3En:1;
  31         unsigned int Tm3Clock:1;
  32         unsigned int Tm3OfEn:1;
  33         unsigned int Reserved;
  34 } cpe_time_ctrl_t;
  35
  36 typedef struct
  37 {
  38         unsigned int TimerValue;
  39         unsigned int TimerLoad;
  40         unsigned int TimerMatch1;
  41         unsigned int TimerMatch2;
  42 } cpe_time_reg_t;
  43
  44 extern cpe_time_reg_t *TimerBase[];
  45
  46 #if 0   // mask by Victor Yu. 01-31-2008
  47 extern unsigned int cpe_timer_enable(unsigned int timer);
  48 extern unsigned int cpe_timer_disable(unsigned int timer);
  49 extern void cpe_timer_set_counter(unsigned int timer, unsigned int value);
  50 extern void cpe_timer_set_reload(unsigned int timer, unsigned int value);
  51 extern unsigned int cpe_timer_get_counter(unsigned int timer);
  52 #endif
  53
  54 extern struct irqaction timer_irq;
  55 extern unsigned long cpe_gettimeoffset(void);
  56
  57 #if 0   // mask by Victor Yu. 11-17-2005
  58 static inline void cpe_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  59 {
  60     do_timer(regs);
  61 }
  62
  63 static inline void setup_timer(void)
  64 {
  65 #ifdef TIMER_INC_MODE
  66     cpe_timer_set_reload(1, 0xffffffff - APB_CLK/HZ);
  67     cpe_timer_set_counter(1, 0xffffffff - APB_CLK/HZ);
  68 #else
  69     cpe_timer_set_reload(1, APB_CLK/HZ);
  70     cpe_timer_set_counter(1, APB_CLK/HZ);
  71 #endif
  72
  73     if(!cpe_timer_enable(1))
  74     {
  75                 panic("can not enable timer\n");
  76         }
  77
  78         printk("IRQ timer at interrupt number 0x%x clock %d\r\n",IRQ_TIMER1,APB_CLK);
  79         cpe_int_set_irq(IRQ_TIMER1, EDGE,L_ACTIVE);
  80         timer_irq.handler = cpe_timer_interrupt;
  81         timer_irq.flags = SA_INTERRUPT; //ivan added
  82         setup_arm_irq(IRQ_TIMER1, &timer_irq);
  83 }
  84 #endif
  85
  86 #endif  // _CPE_TIME_H