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initial commit with v2.6.32.60
[linux-2.6.32.60-moxart.git] / drivers / net / benet / be_main.c
blob000e3776c99d1fb90db05e70bf9c8359efe1b575
1 /*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18 #include "be.h"
19 #include "be_cmds.h"
20 #include <asm/div64.h>
21
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
27
28 static unsigned int rx_frag_size = 2048;
29 module_param(rx_frag_size, uint, S_IRUGO);
30 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
32 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
34 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
36 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
37 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
38 { 0 }
39 };
40 MODULE_DEVICE_TABLE(pci, be_dev_ids);
41
42 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
43 {
44 struct be_dma_mem *mem = &q->dma_mem;
45 if (mem->va)
46 pci_free_consistent(adapter->pdev, mem->size,
47 mem->va, mem->dma);
48 }
49
50 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
51 u16 len, u16 entry_size)
52 {
53 struct be_dma_mem *mem = &q->dma_mem;
54
55 memset(q, 0, sizeof(*q));
56 q->len = len;
57 q->entry_size = entry_size;
58 mem->size = len * entry_size;
59 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
60 if (!mem->va)
61 return -1;
62 memset(mem->va, 0, mem->size);
63 return 0;
64 }
65
66 static void be_intr_set(struct be_adapter *adapter, bool enable)
67 {
68 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
69 u32 reg = ioread32(addr);
70 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
71
72 if (!enabled && enable)
73 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
74 else if (enabled && !enable)
75 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
76 else
77 return;
78
79 iowrite32(reg, addr);
80 }
81
82 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
83 {
84 u32 val = 0;
85 val |= qid & DB_RQ_RING_ID_MASK;
86 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
87 iowrite32(val, adapter->db + DB_RQ_OFFSET);
88 }
89
90 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
91 {
92 u32 val = 0;
93 val |= qid & DB_TXULP_RING_ID_MASK;
94 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
95 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
96 }
97
98 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
99 bool arm, bool clear_int, u16 num_popped)
100 {
101 u32 val = 0;
102 val |= qid & DB_EQ_RING_ID_MASK;
103 if (arm)
104 val |= 1 << DB_EQ_REARM_SHIFT;
105 if (clear_int)
106 val |= 1 << DB_EQ_CLR_SHIFT;
107 val |= 1 << DB_EQ_EVNT_SHIFT;
108 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
109 iowrite32(val, adapter->db + DB_EQ_OFFSET);
110 }
111
112 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
113 {
114 u32 val = 0;
115 val |= qid & DB_CQ_RING_ID_MASK;
116 if (arm)
117 val |= 1 << DB_CQ_REARM_SHIFT;
118 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
119 iowrite32(val, adapter->db + DB_CQ_OFFSET);
120 }
121
122 static int be_mac_addr_set(struct net_device *netdev, void *p)
123 {
124 struct be_adapter *adapter = netdev_priv(netdev);
125 struct sockaddr *addr = p;
126 int status = 0;
127
128 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
129 if (status)
130 return status;
131
132 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
133 adapter->if_handle, &adapter->pmac_id);
134 if (!status)
135 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
136
137 return status;
138 }
139
140 void netdev_stats_update(struct be_adapter *adapter)
141 {
142 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
143 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
144 struct be_port_rxf_stats *port_stats =
145 &rxf_stats->port[adapter->port_num];
146 struct net_device_stats *dev_stats = &adapter->stats.net_stats;
147 struct be_erx_stats *erx_stats = &hw_stats->erx;
148
149 dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
150 dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
151 dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
152 dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
153
154 /* bad pkts received */
155 dev_stats->rx_errors = port_stats->rx_crc_errors +
156 port_stats->rx_alignment_symbol_errors +
157 port_stats->rx_in_range_errors +
158 port_stats->rx_out_range_errors +
159 port_stats->rx_frame_too_long +
160 port_stats->rx_dropped_too_small +
161 port_stats->rx_dropped_too_short +
162 port_stats->rx_dropped_header_too_small +
163 port_stats->rx_dropped_tcp_length +
164 port_stats->rx_dropped_runt +
165 port_stats->rx_tcp_checksum_errs +
166 port_stats->rx_ip_checksum_errs +
167 port_stats->rx_udp_checksum_errs;
168
169 /* no space in linux buffers: best possible approximation */
170 dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
171
172 /* detailed rx errors */
173 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
174 port_stats->rx_out_range_errors +
175 port_stats->rx_frame_too_long;
176
177 /* receive ring buffer overflow */
178 dev_stats->rx_over_errors = 0;
179
180 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
181
182 /* frame alignment errors */
183 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
184
185 /* receiver fifo overrun */
186 /* drops_no_pbuf is no per i/f, it's per BE card */
187 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
188 port_stats->rx_input_fifo_overflow +
189 rxf_stats->rx_drops_no_pbuf;
190 /* receiver missed packetd */
191 dev_stats->rx_missed_errors = 0;
192
193 /* packet transmit problems */
194 dev_stats->tx_errors = 0;
195
196 /* no space available in linux */
197 dev_stats->tx_dropped = 0;
198
199 dev_stats->multicast = port_stats->rx_multicast_frames;
200 dev_stats->collisions = 0;
201
202 /* detailed tx_errors */
203 dev_stats->tx_aborted_errors = 0;
204 dev_stats->tx_carrier_errors = 0;
205 dev_stats->tx_fifo_errors = 0;
206 dev_stats->tx_heartbeat_errors = 0;
207 dev_stats->tx_window_errors = 0;
208 }
209
210 void be_link_status_update(struct be_adapter *adapter, bool link_up)
211 {
212 struct net_device *netdev = adapter->netdev;
213
214 /* If link came up or went down */
215 if (adapter->link_up != link_up) {
216 if (link_up) {
217 netif_start_queue(netdev);
218 netif_carrier_on(netdev);
219 printk(KERN_INFO "%s: Link up\n", netdev->name);
220 } else {
221 netif_stop_queue(netdev);
222 netif_carrier_off(netdev);
223 printk(KERN_INFO "%s: Link down\n", netdev->name);
224 }
225 adapter->link_up = link_up;
226 }
227 }
228
229 /* Update the EQ delay n BE based on the RX frags consumed / sec */
230 static void be_rx_eqd_update(struct be_adapter *adapter)
231 {
232 struct be_eq_obj *rx_eq = &adapter->rx_eq;
233 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
234 ulong now = jiffies;
235 u32 eqd;
236
237 if (!rx_eq->enable_aic)
238 return;
239
240 /* Wrapped around */
241 if (time_before(now, stats->rx_fps_jiffies)) {
242 stats->rx_fps_jiffies = now;
243 return;
244 }
245
246 /* Update once a second */
247 if ((now - stats->rx_fps_jiffies) < HZ)
248 return;
249
250 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
251 ((now - stats->rx_fps_jiffies) / HZ);
252
253 stats->rx_fps_jiffies = now;
254 stats->be_prev_rx_frags = stats->be_rx_frags;
255 eqd = stats->be_rx_fps / 110000;
256 eqd = eqd << 3;
257 if (eqd > rx_eq->max_eqd)
258 eqd = rx_eq->max_eqd;
259 if (eqd < rx_eq->min_eqd)
260 eqd = rx_eq->min_eqd;
261 if (eqd < 10)
262 eqd = 0;
263 if (eqd != rx_eq->cur_eqd)
264 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
265
266 rx_eq->cur_eqd = eqd;
267 }
268
269 static struct net_device_stats *be_get_stats(struct net_device *dev)
270 {
271 struct be_adapter *adapter = netdev_priv(dev);
272
273 return &adapter->stats.net_stats;
274 }
275
276 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
277 {
278 u64 rate = bytes;
279
280 do_div(rate, ticks / HZ);
281 rate <<= 3; /* bytes/sec -> bits/sec */
282 do_div(rate, 1000000ul); /* MB/Sec */
283
284 return rate;
285 }
286
287 static void be_tx_rate_update(struct be_adapter *adapter)
288 {
289 struct be_drvr_stats *stats = drvr_stats(adapter);
290 ulong now = jiffies;
291
292 /* Wrapped around? */
293 if (time_before(now, stats->be_tx_jiffies)) {
294 stats->be_tx_jiffies = now;
295 return;
296 }
297
298 /* Update tx rate once in two seconds */
299 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
300 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
301 - stats->be_tx_bytes_prev,
302 now - stats->be_tx_jiffies);
303 stats->be_tx_jiffies = now;
304 stats->be_tx_bytes_prev = stats->be_tx_bytes;
305 }
306 }
307
308 static void be_tx_stats_update(struct be_adapter *adapter,
309 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
310 {
311 struct be_drvr_stats *stats = drvr_stats(adapter);
312 stats->be_tx_reqs++;
313 stats->be_tx_wrbs += wrb_cnt;
314 stats->be_tx_bytes += copied;
315 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
316 if (stopped)
317 stats->be_tx_stops++;
318 }
319
320 /* Determine number of WRB entries needed to xmit data in an skb */
321 static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
322 {
323 int cnt = (skb->len > skb->data_len);
324
325 cnt += skb_shinfo(skb)->nr_frags;
326
327 /* to account for hdr wrb */
328 cnt++;
329 if (cnt & 1) {
330 /* add a dummy to make it an even num */
331 cnt++;
332 *dummy = true;
333 } else
334 *dummy = false;
335 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
336 return cnt;
337 }
338
339 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
340 {
341 wrb->frag_pa_hi = upper_32_bits(addr);
342 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
343 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
344 }
345
346 static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
347 bool vlan, u32 wrb_cnt, u32 len)
348 {
349 memset(hdr, 0, sizeof(*hdr));
350
351 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
352
353 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
354 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
355 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
356 hdr, skb_shinfo(skb)->gso_size);
357 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
358 if (is_tcp_pkt(skb))
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
360 else if (is_udp_pkt(skb))
361 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
362 }
363
364 if (vlan && vlan_tx_tag_present(skb)) {
365 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
366 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
367 hdr, vlan_tx_tag_get(skb));
368 }
369
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
371 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
372 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
373 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
374 }
375
376
377 static int make_tx_wrbs(struct be_adapter *adapter,
378 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
379 {
380 u64 busaddr;
381 u32 i, copied = 0;
382 struct pci_dev *pdev = adapter->pdev;
383 struct sk_buff *first_skb = skb;
384 struct be_queue_info *txq = &adapter->tx_obj.q;
385 struct be_eth_wrb *wrb;
386 struct be_eth_hdr_wrb *hdr;
387
388 hdr = queue_head_node(txq);
389 atomic_add(wrb_cnt, &txq->used);
390 queue_head_inc(txq);
391
392 if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
393 dev_err(&pdev->dev, "TX DMA mapping failed\n");
394 return 0;
395 }
396
397 if (skb->len > skb->data_len) {
398 int len = skb->len - skb->data_len;
399 wrb = queue_head_node(txq);
400 busaddr = skb_shinfo(skb)->dma_head;
401 wrb_fill(wrb, busaddr, len);
402 be_dws_cpu_to_le(wrb, sizeof(*wrb));
403 queue_head_inc(txq);
404 copied += len;
405 }
406
407 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
408 struct skb_frag_struct *frag =
409 &skb_shinfo(skb)->frags[i];
410
411 busaddr = skb_shinfo(skb)->dma_maps[i];
412 wrb = queue_head_node(txq);
413 wrb_fill(wrb, busaddr, frag->size);
414 be_dws_cpu_to_le(wrb, sizeof(*wrb));
415 queue_head_inc(txq);
416 copied += frag->size;
417 }
418
419 if (dummy_wrb) {
420 wrb = queue_head_node(txq);
421 wrb_fill(wrb, 0, 0);
422 be_dws_cpu_to_le(wrb, sizeof(*wrb));
423 queue_head_inc(txq);
424 }
425
426 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
427 wrb_cnt, copied);
428 be_dws_cpu_to_le(hdr, sizeof(*hdr));
429
430 return copied;
431 }
432
433 static netdev_tx_t be_xmit(struct sk_buff *skb,
434 struct net_device *netdev)
435 {
436 struct be_adapter *adapter = netdev_priv(netdev);
437 struct be_tx_obj *tx_obj = &adapter->tx_obj;
438 struct be_queue_info *txq = &tx_obj->q;
439 u32 wrb_cnt = 0, copied = 0;
440 u32 start = txq->head;
441 bool dummy_wrb, stopped = false;
442
443 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
444
445 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
446 if (copied) {
447 /* record the sent skb in the sent_skb table */
448 BUG_ON(tx_obj->sent_skb_list[start]);
449 tx_obj->sent_skb_list[start] = skb;
450
451 /* Ensure txq has space for the next skb; Else stop the queue
452 * *BEFORE* ringing the tx doorbell, so that we serialze the
453 * tx compls of the current transmit which'll wake up the queue
454 */
455 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
456 txq->len) {
457 netif_stop_queue(netdev);
458 stopped = true;
459 }
460
461 be_txq_notify(adapter, txq->id, wrb_cnt);
462
463 be_tx_stats_update(adapter, wrb_cnt, copied,
464 skb_shinfo(skb)->gso_segs, stopped);
465 } else {
466 txq->head = start;
467 dev_kfree_skb_any(skb);
468 }
469 return NETDEV_TX_OK;
470 }
471
472 static int be_change_mtu(struct net_device *netdev, int new_mtu)
473 {
474 struct be_adapter *adapter = netdev_priv(netdev);
475 if (new_mtu < BE_MIN_MTU ||
476 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
477 dev_info(&adapter->pdev->dev,
478 "MTU must be between %d and %d bytes\n",
479 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
480 return -EINVAL;
481 }
482 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
483 netdev->mtu, new_mtu);
484 netdev->mtu = new_mtu;
485 return 0;
486 }
487
488 /*
489 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
490 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
491 * set the BE in promiscuous VLAN mode.
492 */
493 static int be_vid_config(struct be_adapter *adapter)
494 {
495 u16 vtag[BE_NUM_VLANS_SUPPORTED];
496 u16 ntags = 0, i;
497 int status;
498
499 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
500 /* Construct VLAN Table to give to HW */
501 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
502 if (adapter->vlan_tag[i]) {
503 vtag[ntags] = cpu_to_le16(i);
504 ntags++;
505 }
506 }
507 status = be_cmd_vlan_config(adapter, adapter->if_handle,
508 vtag, ntags, 1, 0);
509 } else {
510 status = be_cmd_vlan_config(adapter, adapter->if_handle,
511 NULL, 0, 1, 1);
512 }
513 return status;
514 }
515
516 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
517 {
518 struct be_adapter *adapter = netdev_priv(netdev);
519 struct be_eq_obj *rx_eq = &adapter->rx_eq;
520 struct be_eq_obj *tx_eq = &adapter->tx_eq;
521
522 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
523 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
524 adapter->vlan_grp = grp;
525 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
526 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
527 }
528
529 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
530 {
531 struct be_adapter *adapter = netdev_priv(netdev);
532
533 adapter->num_vlans++;
534 adapter->vlan_tag[vid] = 1;
535
536 be_vid_config(adapter);
537 }
538
539 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
540 {
541 struct be_adapter *adapter = netdev_priv(netdev);
542
543 adapter->num_vlans--;
544 adapter->vlan_tag[vid] = 0;
545
546 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
547 be_vid_config(adapter);
548 }
549
550 static void be_set_multicast_list(struct net_device *netdev)
551 {
552 struct be_adapter *adapter = netdev_priv(netdev);
553
554 if (netdev->flags & IFF_PROMISC) {
555 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
556 adapter->promiscuous = true;
557 goto done;
558 }
559
560 /* BE was previously in promiscous mode; disable it */
561 if (adapter->promiscuous) {
562 adapter->promiscuous = false;
563 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
564 }
565
566 if (netdev->flags & IFF_ALLMULTI) {
567 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
568 goto done;
569 }
570
571 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
572 netdev->mc_count);
573 done:
574 return;
575 }
576
577 static void be_rx_rate_update(struct be_adapter *adapter)
578 {
579 struct be_drvr_stats *stats = drvr_stats(adapter);
580 ulong now = jiffies;
581
582 /* Wrapped around */
583 if (time_before(now, stats->be_rx_jiffies)) {
584 stats->be_rx_jiffies = now;
585 return;
586 }
587
588 /* Update the rate once in two seconds */
589 if ((now - stats->be_rx_jiffies) < 2 * HZ)
590 return;
591
592 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
593 - stats->be_rx_bytes_prev,
594 now - stats->be_rx_jiffies);
595 stats->be_rx_jiffies = now;
596 stats->be_rx_bytes_prev = stats->be_rx_bytes;
597 }
598
599 static void be_rx_stats_update(struct be_adapter *adapter,
600 u32 pktsize, u16 numfrags)
601 {
602 struct be_drvr_stats *stats = drvr_stats(adapter);
603
604 stats->be_rx_compl++;
605 stats->be_rx_frags += numfrags;
606 stats->be_rx_bytes += pktsize;
607 stats->be_rx_pkts++;
608 }
609
610 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
611 {
612 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
613
614 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
615 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
616 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
617 if (ip_version) {
618 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
619 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
620 }
621 ipv6_chk = (ip_version && (tcpf || udpf));
622
623 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
624 }
625
626 static struct be_rx_page_info *
627 get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
628 {
629 struct be_rx_page_info *rx_page_info;
630 struct be_queue_info *rxq = &adapter->rx_obj.q;
631
632 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
633 BUG_ON(!rx_page_info->page);
634
635 if (rx_page_info->last_page_user)
636 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
637 adapter->big_page_size, PCI_DMA_FROMDEVICE);
638
639 atomic_dec(&rxq->used);
640 return rx_page_info;
641 }
642
643 /* Throwaway the data in the Rx completion */
644 static void be_rx_compl_discard(struct be_adapter *adapter,
645 struct be_eth_rx_compl *rxcp)
646 {
647 struct be_queue_info *rxq = &adapter->rx_obj.q;
648 struct be_rx_page_info *page_info;
649 u16 rxq_idx, i, num_rcvd;
650
651 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
652 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
653
654 for (i = 0; i < num_rcvd; i++) {
655 page_info = get_rx_page_info(adapter, rxq_idx);
656 put_page(page_info->page);
657 memset(page_info, 0, sizeof(*page_info));
658 index_inc(&rxq_idx, rxq->len);
659 }
660 }
661
662 /*
663 * skb_fill_rx_data forms a complete skb for an ether frame
664 * indicated by rxcp.
665 */
666 static void skb_fill_rx_data(struct be_adapter *adapter,
667 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
668 {
669 struct be_queue_info *rxq = &adapter->rx_obj.q;
670 struct be_rx_page_info *page_info;
671 u16 rxq_idx, i, num_rcvd, j;
672 u32 pktsize, hdr_len, curr_frag_len, size;
673 u8 *start;
674
675 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
676 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
677 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
678
679 page_info = get_rx_page_info(adapter, rxq_idx);
680
681 start = page_address(page_info->page) + page_info->page_offset;
682 prefetch(start);
683
684 /* Copy data in the first descriptor of this completion */
685 curr_frag_len = min(pktsize, rx_frag_size);
686
687 /* Copy the header portion into skb_data */
688 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
689 memcpy(skb->data, start, hdr_len);
690 skb->len = curr_frag_len;
691 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
692 /* Complete packet has now been moved to data */
693 put_page(page_info->page);
694 skb->data_len = 0;
695 skb->tail += curr_frag_len;
696 } else {
697 skb_shinfo(skb)->nr_frags = 1;
698 skb_shinfo(skb)->frags[0].page = page_info->page;
699 skb_shinfo(skb)->frags[0].page_offset =
700 page_info->page_offset + hdr_len;
701 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
702 skb->data_len = curr_frag_len - hdr_len;
703 skb->tail += hdr_len;
704 }
705 memset(page_info, 0, sizeof(*page_info));
706
707 if (pktsize <= rx_frag_size) {
708 BUG_ON(num_rcvd != 1);
709 goto done;
710 }
711
712 /* More frags present for this completion */
713 size = pktsize;
714 for (i = 1, j = 0; i < num_rcvd; i++) {
715 size -= curr_frag_len;
716 index_inc(&rxq_idx, rxq->len);
717 page_info = get_rx_page_info(adapter, rxq_idx);
718
719 curr_frag_len = min(size, rx_frag_size);
720
721 /* Coalesce all frags from the same physical page in one slot */
722 if (page_info->page_offset == 0) {
723 /* Fresh page */
724 j++;
725 skb_shinfo(skb)->frags[j].page = page_info->page;
726 skb_shinfo(skb)->frags[j].page_offset =
727 page_info->page_offset;
728 skb_shinfo(skb)->frags[j].size = 0;
729 skb_shinfo(skb)->nr_frags++;
730 } else {
731 put_page(page_info->page);
732 }
733
734 skb_shinfo(skb)->frags[j].size += curr_frag_len;
735 skb->len += curr_frag_len;
736 skb->data_len += curr_frag_len;
737
738 memset(page_info, 0, sizeof(*page_info));
739 }
740 BUG_ON(j > MAX_SKB_FRAGS);
741
742 done:
743 be_rx_stats_update(adapter, pktsize, num_rcvd);
744 return;
745 }
746
747 /* Process the RX completion indicated by rxcp when GRO is disabled */
748 static void be_rx_compl_process(struct be_adapter *adapter,
749 struct be_eth_rx_compl *rxcp)
750 {
751 struct sk_buff *skb;
752 u32 vlanf, vid;
753 u8 vtm;
754
755 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
756 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
757
758 /* vlanf could be wrongly set in some cards.
759 * ignore if vtm is not set */
760 if ((adapter->cap == 0x400) && !vtm)
761 vlanf = 0;
762
763 skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
764 if (!skb) {
765 if (net_ratelimit())
766 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
767 be_rx_compl_discard(adapter, rxcp);
768 return;
769 }
770
771 skb_reserve(skb, NET_IP_ALIGN);
772
773 skb_fill_rx_data(adapter, skb, rxcp);
774
775 if (do_pkt_csum(rxcp, adapter->rx_csum))
776 skb->ip_summed = CHECKSUM_NONE;
777 else
778 skb->ip_summed = CHECKSUM_UNNECESSARY;
779
780 skb->truesize = skb->len + sizeof(struct sk_buff);
781 skb->protocol = eth_type_trans(skb, adapter->netdev);
782 skb->dev = adapter->netdev;
783
784 if (vlanf) {
785 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
786 kfree_skb(skb);
787 return;
788 }
789 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
790 vid = be16_to_cpu(vid);
791 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
792 } else {
793 netif_receive_skb(skb);
794 }
795
796 return;
797 }
798
799 /* Process the RX completion indicated by rxcp when GRO is enabled */
800 static void be_rx_compl_process_gro(struct be_adapter *adapter,
801 struct be_eth_rx_compl *rxcp)
802 {
803 struct be_rx_page_info *page_info;
804 struct sk_buff *skb = NULL;
805 struct be_queue_info *rxq = &adapter->rx_obj.q;
806 struct be_eq_obj *eq_obj = &adapter->rx_eq;
807 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
808 u16 i, rxq_idx = 0, vid, j;
809 u8 vtm;
810
811 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
812 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
813 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
814 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
815 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
816
817 /* vlanf could be wrongly set in some cards.
818 * ignore if vtm is not set */
819 if ((adapter->cap == 0x400) && !vtm)
820 vlanf = 0;
821
822 skb = napi_get_frags(&eq_obj->napi);
823 if (!skb) {
824 be_rx_compl_discard(adapter, rxcp);
825 return;
826 }
827
828 remaining = pkt_size;
829 for (i = 0, j = -1; i < num_rcvd; i++) {
830 page_info = get_rx_page_info(adapter, rxq_idx);
831
832 curr_frag_len = min(remaining, rx_frag_size);
833
834 /* Coalesce all frags from the same physical page in one slot */
835 if (i == 0 || page_info->page_offset == 0) {
836 /* First frag or Fresh page */
837 j++;
838 skb_shinfo(skb)->frags[j].page = page_info->page;
839 skb_shinfo(skb)->frags[j].page_offset =
840 page_info->page_offset;
841 skb_shinfo(skb)->frags[j].size = 0;
842 } else {
843 put_page(page_info->page);
844 }
845 skb_shinfo(skb)->frags[j].size += curr_frag_len;
846
847 remaining -= curr_frag_len;
848 index_inc(&rxq_idx, rxq->len);
849 memset(page_info, 0, sizeof(*page_info));
850 }
851 BUG_ON(j > MAX_SKB_FRAGS);
852
853 skb_shinfo(skb)->nr_frags = j + 1;
854 skb->len = pkt_size;
855 skb->data_len = pkt_size;
856 skb->truesize += pkt_size;
857 skb->ip_summed = CHECKSUM_UNNECESSARY;
858
859 if (likely(!vlanf)) {
860 napi_gro_frags(&eq_obj->napi);
861 } else {
862 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
863 vid = be16_to_cpu(vid);
864
865 if (!adapter->vlan_grp || adapter->num_vlans == 0)
866 return;
867
868 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
869 }
870
871 be_rx_stats_update(adapter, pkt_size, num_rcvd);
872 return;
873 }
874
875 static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
876 {
877 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
878
879 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
880 return NULL;
881
882 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
883
884 queue_tail_inc(&adapter->rx_obj.cq);
885 return rxcp;
886 }
887
888 /* To reset the valid bit, we need to reset the whole word as
889 * when walking the queue the valid entries are little-endian
890 * and invalid entries are host endian
891 */
892 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
893 {
894 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
895 }
896
897 static inline struct page *be_alloc_pages(u32 size)
898 {
899 gfp_t alloc_flags = GFP_ATOMIC;
900 u32 order = get_order(size);
901 if (order > 0)
902 alloc_flags |= __GFP_COMP;
903 return alloc_pages(alloc_flags, order);
904 }
905
906 /*
907 * Allocate a page, split it to fragments of size rx_frag_size and post as
908 * receive buffers to BE
909 */
910 static void be_post_rx_frags(struct be_adapter *adapter)
911 {
912 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
913 struct be_rx_page_info *page_info = NULL;
914 struct be_queue_info *rxq = &adapter->rx_obj.q;
915 struct page *pagep = NULL;
916 struct be_eth_rx_d *rxd;
917 u64 page_dmaaddr = 0, frag_dmaaddr;
918 u32 posted, page_offset = 0;
919
920 page_info = &page_info_tbl[rxq->head];
921 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
922 if (!pagep) {
923 pagep = be_alloc_pages(adapter->big_page_size);
924 if (unlikely(!pagep)) {
925 drvr_stats(adapter)->be_ethrx_post_fail++;
926 break;
927 }
928 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
929 adapter->big_page_size,
930 PCI_DMA_FROMDEVICE);
931 page_info->page_offset = 0;
932 } else {
933 get_page(pagep);
934 page_info->page_offset = page_offset + rx_frag_size;
935 }
936 page_offset = page_info->page_offset;
937 page_info->page = pagep;
938 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
939 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
940
941 rxd = queue_head_node(rxq);
942 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
943 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
944 queue_head_inc(rxq);
945
946 /* Any space left in the current big page for another frag? */
947 if ((page_offset + rx_frag_size + rx_frag_size) >
948 adapter->big_page_size) {
949 pagep = NULL;
950 page_info->last_page_user = true;
951 }
952 page_info = &page_info_tbl[rxq->head];
953 }
954 if (pagep)
955 page_info->last_page_user = true;
956
957 if (posted) {
958 atomic_add(posted, &rxq->used);
959 be_rxq_notify(adapter, rxq->id, posted);
960 } else if (atomic_read(&rxq->used) == 0) {
961 /* Let be_worker replenish when memory is available */
962 adapter->rx_post_starved = true;
963 }
964
965 return;
966 }
967
968 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
969 {
970 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
971
972 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
973 return NULL;
974
975 be_dws_le_to_cpu(txcp, sizeof(*txcp));
976
977 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
978
979 queue_tail_inc(tx_cq);
980 return txcp;
981 }
982
983 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
984 {
985 struct be_queue_info *txq = &adapter->tx_obj.q;
986 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
987 struct sk_buff *sent_skb;
988 u16 cur_index, num_wrbs = 0;
989
990 cur_index = txq->tail;
991 sent_skb = sent_skbs[cur_index];
992 BUG_ON(!sent_skb);
993 sent_skbs[cur_index] = NULL;
994
995 do {
996 cur_index = txq->tail;
997 num_wrbs++;
998 queue_tail_inc(txq);
999 } while (cur_index != last_index);
1000
1001 atomic_sub(num_wrbs, &txq->used);
1002 skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
1003 kfree_skb(sent_skb);
1004 }
1005
1006 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1007 {
1008 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1009
1010 if (!eqe->evt)
1011 return NULL;
1012
1013 eqe->evt = le32_to_cpu(eqe->evt);
1014 queue_tail_inc(&eq_obj->q);
1015 return eqe;
1016 }
1017
1018 static int event_handle(struct be_adapter *adapter,
1019 struct be_eq_obj *eq_obj)
1020 {
1021 struct be_eq_entry *eqe;
1022 u16 num = 0;
1023
1024 while ((eqe = event_get(eq_obj)) != NULL) {
1025 eqe->evt = 0;
1026 num++;
1027 }
1028
1029 /* Deal with any spurious interrupts that come
1030 * without events
1031 */
1032 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1033 if (num)
1034 napi_schedule(&eq_obj->napi);
1035
1036 return num;
1037 }
1038
1039 /* Just read and notify events without processing them.
1040 * Used at the time of destroying event queues */
1041 static void be_eq_clean(struct be_adapter *adapter,
1042 struct be_eq_obj *eq_obj)
1043 {
1044 struct be_eq_entry *eqe;
1045 u16 num = 0;
1046
1047 while ((eqe = event_get(eq_obj)) != NULL) {
1048 eqe->evt = 0;
1049 num++;
1050 }
1051
1052 if (num)
1053 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1054 }
1055
1056 static void be_rx_q_clean(struct be_adapter *adapter)
1057 {
1058 struct be_rx_page_info *page_info;
1059 struct be_queue_info *rxq = &adapter->rx_obj.q;
1060 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1061 struct be_eth_rx_compl *rxcp;
1062 u16 tail;
1063
1064 /* First cleanup pending rx completions */
1065 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1066 be_rx_compl_discard(adapter, rxcp);
1067 be_rx_compl_reset(rxcp);
1068 be_cq_notify(adapter, rx_cq->id, true, 1);
1069 }
1070
1071 /* Then free posted rx buffer that were not used */
1072 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1073 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1074 page_info = get_rx_page_info(adapter, tail);
1075 put_page(page_info->page);
1076 memset(page_info, 0, sizeof(*page_info));
1077 }
1078 BUG_ON(atomic_read(&rxq->used));
1079 }
1080
1081 static void be_tx_compl_clean(struct be_adapter *adapter)
1082 {
1083 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1084 struct be_queue_info *txq = &adapter->tx_obj.q;
1085 struct be_eth_tx_compl *txcp;
1086 u16 end_idx, cmpl = 0, timeo = 0;
1087
1088 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1089 do {
1090 while ((txcp = be_tx_compl_get(tx_cq))) {
1091 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1092 wrb_index, txcp);
1093 be_tx_compl_process(adapter, end_idx);
1094 cmpl++;
1095 }
1096 if (cmpl) {
1097 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1098 cmpl = 0;
1099 }
1100
1101 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1102 break;
1103
1104 mdelay(1);
1105 } while (true);
1106
1107 if (atomic_read(&txq->used))
1108 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1109 atomic_read(&txq->used));
1110 }
1111
1112 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1113 {
1114 struct be_queue_info *q;
1115
1116 q = &adapter->mcc_obj.q;
1117 if (q->created)
1118 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1119 be_queue_free(adapter, q);
1120
1121 q = &adapter->mcc_obj.cq;
1122 if (q->created)
1123 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1124 be_queue_free(adapter, q);
1125 }
1126
1127 /* Must be called only after TX qs are created as MCC shares TX EQ */
1128 static int be_mcc_queues_create(struct be_adapter *adapter)
1129 {
1130 struct be_queue_info *q, *cq;
1131
1132 /* Alloc MCC compl queue */
1133 cq = &adapter->mcc_obj.cq;
1134 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1135 sizeof(struct be_mcc_compl)))
1136 goto err;
1137
1138 /* Ask BE to create MCC compl queue; share TX's eq */
1139 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1140 goto mcc_cq_free;
1141
1142 /* Alloc MCC queue */
1143 q = &adapter->mcc_obj.q;
1144 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1145 goto mcc_cq_destroy;
1146
1147 /* Ask BE to create MCC queue */
1148 if (be_cmd_mccq_create(adapter, q, cq))
1149 goto mcc_q_free;
1150
1151 return 0;
1152
1153 mcc_q_free:
1154 be_queue_free(adapter, q);
1155 mcc_cq_destroy:
1156 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1157 mcc_cq_free:
1158 be_queue_free(adapter, cq);
1159 err:
1160 return -1;
1161 }
1162
1163 static void be_tx_queues_destroy(struct be_adapter *adapter)
1164 {
1165 struct be_queue_info *q;
1166
1167 q = &adapter->tx_obj.q;
1168 if (q->created)
1169 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1170 be_queue_free(adapter, q);
1171
1172 q = &adapter->tx_obj.cq;
1173 if (q->created)
1174 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1175 be_queue_free(adapter, q);
1176
1177 /* Clear any residual events */
1178 be_eq_clean(adapter, &adapter->tx_eq);
1179
1180 q = &adapter->tx_eq.q;
1181 if (q->created)
1182 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1183 be_queue_free(adapter, q);
1184 }
1185
1186 static int be_tx_queues_create(struct be_adapter *adapter)
1187 {
1188 struct be_queue_info *eq, *q, *cq;
1189
1190 adapter->tx_eq.max_eqd = 0;
1191 adapter->tx_eq.min_eqd = 0;
1192 adapter->tx_eq.cur_eqd = 96;
1193 adapter->tx_eq.enable_aic = false;
1194 /* Alloc Tx Event queue */
1195 eq = &adapter->tx_eq.q;
1196 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1197 return -1;
1198
1199 /* Ask BE to create Tx Event queue */
1200 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1201 goto tx_eq_free;
1202 /* Alloc TX eth compl queue */
1203 cq = &adapter->tx_obj.cq;
1204 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1205 sizeof(struct be_eth_tx_compl)))
1206 goto tx_eq_destroy;
1207
1208 /* Ask BE to create Tx eth compl queue */
1209 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1210 goto tx_cq_free;
1211
1212 /* Alloc TX eth queue */
1213 q = &adapter->tx_obj.q;
1214 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1215 goto tx_cq_destroy;
1216
1217 /* Ask BE to create Tx eth queue */
1218 if (be_cmd_txq_create(adapter, q, cq))
1219 goto tx_q_free;
1220 return 0;
1221
1222 tx_q_free:
1223 be_queue_free(adapter, q);
1224 tx_cq_destroy:
1225 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1226 tx_cq_free:
1227 be_queue_free(adapter, cq);
1228 tx_eq_destroy:
1229 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1230 tx_eq_free:
1231 be_queue_free(adapter, eq);
1232 return -1;
1233 }
1234
1235 static void be_rx_queues_destroy(struct be_adapter *adapter)
1236 {
1237 struct be_queue_info *q;
1238
1239 q = &adapter->rx_obj.q;
1240 if (q->created) {
1241 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1242 be_rx_q_clean(adapter);
1243 }
1244 be_queue_free(adapter, q);
1245
1246 q = &adapter->rx_obj.cq;
1247 if (q->created)
1248 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1249 be_queue_free(adapter, q);
1250
1251 /* Clear any residual events */
1252 be_eq_clean(adapter, &adapter->rx_eq);
1253
1254 q = &adapter->rx_eq.q;
1255 if (q->created)
1256 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1257 be_queue_free(adapter, q);
1258 }
1259
1260 static int be_rx_queues_create(struct be_adapter *adapter)
1261 {
1262 struct be_queue_info *eq, *q, *cq;
1263 int rc;
1264
1265 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1266 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1267 adapter->rx_eq.min_eqd = 0;
1268 adapter->rx_eq.cur_eqd = 0;
1269 adapter->rx_eq.enable_aic = true;
1270
1271 /* Alloc Rx Event queue */
1272 eq = &adapter->rx_eq.q;
1273 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1274 sizeof(struct be_eq_entry));
1275 if (rc)
1276 return rc;
1277
1278 /* Ask BE to create Rx Event queue */
1279 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
1280 if (rc)
1281 goto rx_eq_free;
1282
1283 /* Alloc RX eth compl queue */
1284 cq = &adapter->rx_obj.cq;
1285 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1286 sizeof(struct be_eth_rx_compl));
1287 if (rc)
1288 goto rx_eq_destroy;
1289
1290 /* Ask BE to create Rx eth compl queue */
1291 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1292 if (rc)
1293 goto rx_cq_free;
1294
1295 /* Alloc RX eth queue */
1296 q = &adapter->rx_obj.q;
1297 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1298 if (rc)
1299 goto rx_cq_destroy;
1300
1301 /* Ask BE to create Rx eth queue */
1302 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1303 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1304 if (rc)
1305 goto rx_q_free;
1306
1307 return 0;
1308 rx_q_free:
1309 be_queue_free(adapter, q);
1310 rx_cq_destroy:
1311 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1312 rx_cq_free:
1313 be_queue_free(adapter, cq);
1314 rx_eq_destroy:
1315 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1316 rx_eq_free:
1317 be_queue_free(adapter, eq);
1318 return rc;
1319 }
1320
1321 /* There are 8 evt ids per func. Retruns the evt id's bit number */
1322 static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1323 {
1324 return eq_id - 8 * be_pci_func(adapter);
1325 }
1326
1327 static irqreturn_t be_intx(int irq, void *dev)
1328 {
1329 struct be_adapter *adapter = dev;
1330 int isr;
1331
1332 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1333 be_pci_func(adapter) * CEV_ISR_SIZE);
1334 if (!isr)
1335 return IRQ_NONE;
1336
1337 event_handle(adapter, &adapter->tx_eq);
1338 event_handle(adapter, &adapter->rx_eq);
1339
1340 return IRQ_HANDLED;
1341 }
1342
1343 static irqreturn_t be_msix_rx(int irq, void *dev)
1344 {
1345 struct be_adapter *adapter = dev;
1346
1347 event_handle(adapter, &adapter->rx_eq);
1348
1349 return IRQ_HANDLED;
1350 }
1351
1352 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1353 {
1354 struct be_adapter *adapter = dev;
1355
1356 event_handle(adapter, &adapter->tx_eq);
1357
1358 return IRQ_HANDLED;
1359 }
1360
1361 static inline bool do_gro(struct be_adapter *adapter,
1362 struct be_eth_rx_compl *rxcp)
1363 {
1364 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1365 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1366
1367 if (err)
1368 drvr_stats(adapter)->be_rxcp_err++;
1369
1370 return (tcp_frame && !err) ? true : false;
1371 }
1372
1373 int be_poll_rx(struct napi_struct *napi, int budget)
1374 {
1375 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1376 struct be_adapter *adapter =
1377 container_of(rx_eq, struct be_adapter, rx_eq);
1378 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1379 struct be_eth_rx_compl *rxcp;
1380 u32 work_done;
1381
1382 for (work_done = 0; work_done < budget; work_done++) {
1383 rxcp = be_rx_compl_get(adapter);
1384 if (!rxcp)
1385 break;
1386
1387 if (do_gro(adapter, rxcp))
1388 be_rx_compl_process_gro(adapter, rxcp);
1389 else
1390 be_rx_compl_process(adapter, rxcp);
1391
1392 be_rx_compl_reset(rxcp);
1393 }
1394
1395 /* Refill the queue */
1396 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1397 be_post_rx_frags(adapter);
1398
1399 /* All consumed */
1400 if (work_done < budget) {
1401 napi_complete(napi);
1402 be_cq_notify(adapter, rx_cq->id, true, work_done);
1403 } else {
1404 /* More to be consumed; continue with interrupts disabled */
1405 be_cq_notify(adapter, rx_cq->id, false, work_done);
1406 }
1407 return work_done;
1408 }
1409
1410 void be_process_tx(struct be_adapter *adapter)
1411 {
1412 struct be_queue_info *txq = &adapter->tx_obj.q;
1413 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1414 struct be_eth_tx_compl *txcp;
1415 u32 num_cmpl = 0;
1416 u16 end_idx;
1417
1418 while ((txcp = be_tx_compl_get(tx_cq))) {
1419 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1420 wrb_index, txcp);
1421 be_tx_compl_process(adapter, end_idx);
1422 num_cmpl++;
1423 }
1424
1425 if (num_cmpl) {
1426 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
1427
1428 /* As Tx wrbs have been freed up, wake up netdev queue if
1429 * it was stopped due to lack of tx wrbs.
1430 */
1431 if (netif_queue_stopped(adapter->netdev) &&
1432 atomic_read(&txq->used) < txq->len / 2) {
1433 netif_wake_queue(adapter->netdev);
1434 }
1435
1436 drvr_stats(adapter)->be_tx_events++;
1437 drvr_stats(adapter)->be_tx_compl += num_cmpl;
1438 }
1439 }
1440
1441 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1442 * For TX/MCC we don't honour budget; consume everything
1443 */
1444 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1445 {
1446 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1447 struct be_adapter *adapter =
1448 container_of(tx_eq, struct be_adapter, tx_eq);
1449
1450 napi_complete(napi);
1451
1452 be_process_tx(adapter);
1453
1454 be_process_mcc(adapter);
1455
1456 return 1;
1457 }
1458
1459 static void be_worker(struct work_struct *work)
1460 {
1461 struct be_adapter *adapter =
1462 container_of(work, struct be_adapter, work.work);
1463
1464 be_cmd_get_stats(adapter, &adapter->stats.cmd);
1465
1466 /* Set EQ delay */
1467 be_rx_eqd_update(adapter);
1468
1469 be_tx_rate_update(adapter);
1470 be_rx_rate_update(adapter);
1471
1472 if (adapter->rx_post_starved) {
1473 adapter->rx_post_starved = false;
1474 be_post_rx_frags(adapter);
1475 }
1476
1477 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1478 }
1479
1480 static void be_msix_enable(struct be_adapter *adapter)
1481 {
1482 int i, status;
1483
1484 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1485 adapter->msix_entries[i].entry = i;
1486
1487 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1488 BE_NUM_MSIX_VECTORS);
1489 if (status == 0)
1490 adapter->msix_enabled = true;
1491 return;
1492 }
1493
1494 static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1495 {
1496 return adapter->msix_entries[
1497 be_evt_bit_get(adapter, eq_id)].vector;
1498 }
1499
1500 static int be_request_irq(struct be_adapter *adapter,
1501 struct be_eq_obj *eq_obj,
1502 void *handler, char *desc)
1503 {
1504 struct net_device *netdev = adapter->netdev;
1505 int vec;
1506
1507 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1508 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1509 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1510 }
1511
1512 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1513 {
1514 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1515 free_irq(vec, adapter);
1516 }
1517
1518 static int be_msix_register(struct be_adapter *adapter)
1519 {
1520 int status;
1521
1522 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
1523 if (status)
1524 goto err;
1525
1526 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1527 if (status)
1528 goto free_tx_irq;
1529
1530 return 0;
1531
1532 free_tx_irq:
1533 be_free_irq(adapter, &adapter->tx_eq);
1534 err:
1535 dev_warn(&adapter->pdev->dev,
1536 "MSIX Request IRQ failed - err %d\n", status);
1537 pci_disable_msix(adapter->pdev);
1538 adapter->msix_enabled = false;
1539 return status;
1540 }
1541
1542 static int be_irq_register(struct be_adapter *adapter)
1543 {
1544 struct net_device *netdev = adapter->netdev;
1545 int status;
1546
1547 if (adapter->msix_enabled) {
1548 status = be_msix_register(adapter);
1549 if (status == 0)
1550 goto done;
1551 }
1552
1553 /* INTx */
1554 netdev->irq = adapter->pdev->irq;
1555 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1556 adapter);
1557 if (status) {
1558 dev_err(&adapter->pdev->dev,
1559 "INTx request IRQ failed - err %d\n", status);
1560 return status;
1561 }
1562 done:
1563 adapter->isr_registered = true;
1564 return 0;
1565 }
1566
1567 static void be_irq_unregister(struct be_adapter *adapter)
1568 {
1569 struct net_device *netdev = adapter->netdev;
1570
1571 if (!adapter->isr_registered)
1572 return;
1573
1574 /* INTx */
1575 if (!adapter->msix_enabled) {
1576 free_irq(netdev->irq, adapter);
1577 goto done;
1578 }
1579
1580 /* MSIx */
1581 be_free_irq(adapter, &adapter->tx_eq);
1582 be_free_irq(adapter, &adapter->rx_eq);
1583 done:
1584 adapter->isr_registered = false;
1585 return;
1586 }
1587
1588 static int be_open(struct net_device *netdev)
1589 {
1590 struct be_adapter *adapter = netdev_priv(netdev);
1591 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1592 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1593 bool link_up;
1594 int status;
1595
1596 /* First time posting */
1597 be_post_rx_frags(adapter);
1598
1599 napi_enable(&rx_eq->napi);
1600 napi_enable(&tx_eq->napi);
1601
1602 be_irq_register(adapter);
1603
1604 be_intr_set(adapter, true);
1605
1606 /* The evt queues are created in unarmed state; arm them */
1607 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1608 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
1609
1610 /* Rx compl queue may be in unarmed state; rearm it */
1611 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
1612
1613 status = be_cmd_link_status_query(adapter, &link_up);
1614 if (status)
1615 goto ret_sts;
1616 be_link_status_update(adapter, link_up);
1617
1618 status = be_vid_config(adapter);
1619 if (status)
1620 goto ret_sts;
1621
1622 status = be_cmd_set_flow_control(adapter,
1623 adapter->tx_fc, adapter->rx_fc);
1624 if (status)
1625 goto ret_sts;
1626
1627 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1628 ret_sts:
1629 return status;
1630 }
1631
1632 static int be_setup(struct be_adapter *adapter)
1633 {
1634 struct net_device *netdev = adapter->netdev;
1635 u32 cap_flags, en_flags;
1636 int status;
1637
1638 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1639 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1640 BE_IF_FLAGS_PROMISCUOUS |
1641 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1642 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1643 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1644
1645 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1646 netdev->dev_addr, false/* pmac_invalid */,
1647 &adapter->if_handle, &adapter->pmac_id);
1648 if (status != 0)
1649 goto do_none;
1650
1651 status = be_tx_queues_create(adapter);
1652 if (status != 0)
1653 goto if_destroy;
1654
1655 status = be_rx_queues_create(adapter);
1656 if (status != 0)
1657 goto tx_qs_destroy;
1658
1659 status = be_mcc_queues_create(adapter);
1660 if (status != 0)
1661 goto rx_qs_destroy;
1662
1663 return 0;
1664
1665 rx_qs_destroy:
1666 be_rx_queues_destroy(adapter);
1667 tx_qs_destroy:
1668 be_tx_queues_destroy(adapter);
1669 if_destroy:
1670 be_cmd_if_destroy(adapter, adapter->if_handle);
1671 do_none:
1672 return status;
1673 }
1674
1675 static int be_clear(struct be_adapter *adapter)
1676 {
1677 be_mcc_queues_destroy(adapter);
1678 be_rx_queues_destroy(adapter);
1679 be_tx_queues_destroy(adapter);
1680
1681 be_cmd_if_destroy(adapter, adapter->if_handle);
1682
1683 return 0;
1684 }
1685
1686 static int be_close(struct net_device *netdev)
1687 {
1688 struct be_adapter *adapter = netdev_priv(netdev);
1689 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1690 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1691 int vec;
1692
1693 cancel_delayed_work_sync(&adapter->work);
1694
1695 netif_stop_queue(netdev);
1696 netif_carrier_off(netdev);
1697 adapter->link_up = false;
1698
1699 be_intr_set(adapter, false);
1700
1701 if (adapter->msix_enabled) {
1702 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1703 synchronize_irq(vec);
1704 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1705 synchronize_irq(vec);
1706 } else {
1707 synchronize_irq(netdev->irq);
1708 }
1709 be_irq_unregister(adapter);
1710
1711 napi_disable(&rx_eq->napi);
1712 napi_disable(&tx_eq->napi);
1713
1714 /* Wait for all pending tx completions to arrive so that
1715 * all tx skbs are freed.
1716 */
1717 be_tx_compl_clean(adapter);
1718
1719 return 0;
1720 }
1721
1722 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1723 char flash_cookie[2][16] = {"*** SE FLAS",
1724 "H DIRECTORY *** "};
1725 static int be_flash_image(struct be_adapter *adapter,
1726 const struct firmware *fw,
1727 struct be_dma_mem *flash_cmd, u32 flash_type)
1728 {
1729 int status;
1730 u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
1731 int num_bytes;
1732 const u8 *p = fw->data;
1733 struct be_cmd_write_flashrom *req = flash_cmd->va;
1734
1735 switch (flash_type) {
1736 case FLASHROM_TYPE_ISCSI_ACTIVE:
1737 image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
1738 image_size = FLASH_IMAGE_MAX_SIZE;
1739 break;
1740 case FLASHROM_TYPE_ISCSI_BACKUP:
1741 image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
1742 image_size = FLASH_IMAGE_MAX_SIZE;
1743 break;
1744 case FLASHROM_TYPE_FCOE_FW_ACTIVE:
1745 image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
1746 image_size = FLASH_IMAGE_MAX_SIZE;
1747 break;
1748 case FLASHROM_TYPE_FCOE_FW_BACKUP:
1749 image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
1750 image_size = FLASH_IMAGE_MAX_SIZE;
1751 break;
1752 case FLASHROM_TYPE_BIOS:
1753 image_offset = FLASH_iSCSI_BIOS_START;
1754 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1755 break;
1756 case FLASHROM_TYPE_FCOE_BIOS:
1757 image_offset = FLASH_FCoE_BIOS_START;
1758 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1759 break;
1760 case FLASHROM_TYPE_PXE_BIOS:
1761 image_offset = FLASH_PXE_BIOS_START;
1762 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1763 break;
1764 default:
1765 return 0;
1766 }
1767
1768 p += sizeof(struct flash_file_hdr) + image_offset;
1769 if (p + image_size > fw->data + fw->size)
1770 return -1;
1771
1772 total_bytes = image_size;
1773
1774 while (total_bytes) {
1775 if (total_bytes > 32*1024)
1776 num_bytes = 32*1024;
1777 else
1778 num_bytes = total_bytes;
1779 total_bytes -= num_bytes;
1780
1781 if (!total_bytes)
1782 flash_op = FLASHROM_OPER_FLASH;
1783 else
1784 flash_op = FLASHROM_OPER_SAVE;
1785 memcpy(req->params.data_buf, p, num_bytes);
1786 p += num_bytes;
1787 status = be_cmd_write_flashrom(adapter, flash_cmd,
1788 flash_type, flash_op, num_bytes);
1789 if (status) {
1790 dev_err(&adapter->pdev->dev,
1791 "cmd to write to flash rom failed. type/op %d/%d\n",
1792 flash_type, flash_op);
1793 return -1;
1794 }
1795 yield();
1796 }
1797
1798 return 0;
1799 }
1800
1801 int be_load_fw(struct be_adapter *adapter, u8 *func)
1802 {
1803 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1804 const struct firmware *fw;
1805 struct flash_file_hdr *fhdr;
1806 struct flash_section_info *fsec = NULL;
1807 struct be_dma_mem flash_cmd;
1808 int status;
1809 const u8 *p;
1810 bool entry_found = false;
1811 int flash_type;
1812 char fw_ver[FW_VER_LEN];
1813 char fw_cfg;
1814
1815 status = be_cmd_get_fw_ver(adapter, fw_ver);
1816 if (status)
1817 return status;
1818
1819 fw_cfg = *(fw_ver + 2);
1820 if (fw_cfg == '0')
1821 fw_cfg = '1';
1822 strcpy(fw_file, func);
1823
1824 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1825 if (status)
1826 goto fw_exit;
1827
1828 p = fw->data;
1829 fhdr = (struct flash_file_hdr *) p;
1830 if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
1831 dev_err(&adapter->pdev->dev,
1832 "Firmware(%s) load error (signature did not match)\n",
1833 fw_file);
1834 status = -1;
1835 goto fw_exit;
1836 }
1837
1838 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1839
1840 p += sizeof(struct flash_file_hdr);
1841 while (p < (fw->data + fw->size)) {
1842 fsec = (struct flash_section_info *)p;
1843 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
1844 entry_found = true;
1845 break;
1846 }
1847 p += 32;
1848 }
1849
1850 if (!entry_found) {
1851 status = -1;
1852 dev_err(&adapter->pdev->dev,
1853 "Flash cookie not found in firmware image\n");
1854 goto fw_exit;
1855 }
1856
1857 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1858 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1859 &flash_cmd.dma);
1860 if (!flash_cmd.va) {
1861 status = -ENOMEM;
1862 dev_err(&adapter->pdev->dev,
1863 "Memory allocation failure while flashing\n");
1864 goto fw_exit;
1865 }
1866
1867 for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
1868 flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
1869 status = be_flash_image(adapter, fw, &flash_cmd,
1870 flash_type);
1871 if (status)
1872 break;
1873 }
1874
1875 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1876 flash_cmd.dma);
1877 if (status) {
1878 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1879 goto fw_exit;
1880 }
1881
1882 dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
1883
1884 fw_exit:
1885 release_firmware(fw);
1886 return status;
1887 }
1888
1889 static struct net_device_ops be_netdev_ops = {
1890 .ndo_open = be_open,
1891 .ndo_stop = be_close,
1892 .ndo_start_xmit = be_xmit,
1893 .ndo_get_stats = be_get_stats,
1894 .ndo_set_rx_mode = be_set_multicast_list,
1895 .ndo_set_mac_address = be_mac_addr_set,
1896 .ndo_change_mtu = be_change_mtu,
1897 .ndo_validate_addr = eth_validate_addr,
1898 .ndo_vlan_rx_register = be_vlan_register,
1899 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
1900 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
1901 };
1902
1903 static void be_netdev_init(struct net_device *netdev)
1904 {
1905 struct be_adapter *adapter = netdev_priv(netdev);
1906
1907 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
1908 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
1909 NETIF_F_GRO;
1910
1911 netdev->flags |= IFF_MULTICAST;
1912
1913 adapter->rx_csum = true;
1914
1915 /* Default settings for Rx and Tx flow control */
1916 adapter->rx_fc = true;
1917 adapter->tx_fc = true;
1918
1919 netif_set_gso_max_size(netdev, 65535);
1920
1921 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
1922
1923 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
1924
1925 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
1926 BE_NAPI_WEIGHT);
1927 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
1928 BE_NAPI_WEIGHT);
1929
1930 netif_carrier_off(netdev);
1931 netif_stop_queue(netdev);
1932 }
1933
1934 static void be_unmap_pci_bars(struct be_adapter *adapter)
1935 {
1936 if (adapter->csr)
1937 iounmap(adapter->csr);
1938 if (adapter->db)
1939 iounmap(adapter->db);
1940 if (adapter->pcicfg)
1941 iounmap(adapter->pcicfg);
1942 }
1943
1944 static int be_map_pci_bars(struct be_adapter *adapter)
1945 {
1946 u8 __iomem *addr;
1947 int pcicfg_reg;
1948
1949 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
1950 pci_resource_len(adapter->pdev, 2));
1951 if (addr == NULL)
1952 return -ENOMEM;
1953 adapter->csr = addr;
1954
1955 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
1956 128 * 1024);
1957 if (addr == NULL)
1958 goto pci_map_err;
1959 adapter->db = addr;
1960
1961 if (adapter->generation == BE_GEN2)
1962 pcicfg_reg = 1;
1963 else
1964 pcicfg_reg = 0;
1965
1966 addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
1967 pci_resource_len(adapter->pdev, pcicfg_reg));
1968 if (addr == NULL)
1969 goto pci_map_err;
1970 adapter->pcicfg = addr;
1971
1972 return 0;
1973 pci_map_err:
1974 be_unmap_pci_bars(adapter);
1975 return -ENOMEM;
1976 }
1977
1978
1979 static void be_ctrl_cleanup(struct be_adapter *adapter)
1980 {
1981 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
1982
1983 be_unmap_pci_bars(adapter);
1984
1985 if (mem->va)
1986 pci_free_consistent(adapter->pdev, mem->size,
1987 mem->va, mem->dma);
1988 }
1989
1990 static int be_ctrl_init(struct be_adapter *adapter)
1991 {
1992 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
1993 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
1994 int status;
1995
1996 status = be_map_pci_bars(adapter);
1997 if (status)
1998 return status;
1999
2000 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2001 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2002 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2003 if (!mbox_mem_alloc->va) {
2004 be_unmap_pci_bars(adapter);
2005 return -1;
2006 }
2007 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2008 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2009 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2010 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2011 spin_lock_init(&adapter->mbox_lock);
2012 spin_lock_init(&adapter->mcc_lock);
2013 spin_lock_init(&adapter->mcc_cq_lock);
2014
2015 return 0;
2016 }
2017
2018 static void be_stats_cleanup(struct be_adapter *adapter)
2019 {
2020 struct be_stats_obj *stats = &adapter->stats;
2021 struct be_dma_mem *cmd = &stats->cmd;
2022
2023 if (cmd->va)
2024 pci_free_consistent(adapter->pdev, cmd->size,
2025 cmd->va, cmd->dma);
2026 }
2027
2028 static int be_stats_init(struct be_adapter *adapter)
2029 {
2030 struct be_stats_obj *stats = &adapter->stats;
2031 struct be_dma_mem *cmd = &stats->cmd;
2032
2033 cmd->size = sizeof(struct be_cmd_req_get_stats);
2034 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2035 if (cmd->va == NULL)
2036 return -1;
2037 memset(cmd->va, 0, cmd->size);
2038 return 0;
2039 }
2040
2041 static void __devexit be_remove(struct pci_dev *pdev)
2042 {
2043 struct be_adapter *adapter = pci_get_drvdata(pdev);
2044 if (!adapter)
2045 return;
2046
2047 unregister_netdev(adapter->netdev);
2048
2049 be_clear(adapter);
2050
2051 be_stats_cleanup(adapter);
2052
2053 be_ctrl_cleanup(adapter);
2054
2055 if (adapter->msix_enabled) {
2056 pci_disable_msix(adapter->pdev);
2057 adapter->msix_enabled = false;
2058 }
2059
2060 pci_set_drvdata(pdev, NULL);
2061 pci_release_regions(pdev);
2062 pci_disable_device(pdev);
2063
2064 free_netdev(adapter->netdev);
2065 }
2066
2067 static int be_hw_up(struct be_adapter *adapter)
2068 {
2069 int status;
2070
2071 status = be_cmd_POST(adapter);
2072 if (status)
2073 return status;
2074
2075 status = be_cmd_reset_function(adapter);
2076 if (status)
2077 return status;
2078
2079 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2080 if (status)
2081 return status;
2082
2083 status = be_cmd_query_fw_cfg(adapter,
2084 &adapter->port_num, &adapter->cap);
2085 return status;
2086 }
2087
2088 static int __devinit be_probe(struct pci_dev *pdev,
2089 const struct pci_device_id *pdev_id)
2090 {
2091 int status = 0;
2092 struct be_adapter *adapter;
2093 struct net_device *netdev;
2094 u8 mac[ETH_ALEN];
2095
2096 status = pci_enable_device(pdev);
2097 if (status)
2098 goto do_none;
2099
2100 status = pci_request_regions(pdev, DRV_NAME);
2101 if (status)
2102 goto disable_dev;
2103 pci_set_master(pdev);
2104
2105 netdev = alloc_etherdev(sizeof(struct be_adapter));
2106 if (netdev == NULL) {
2107 status = -ENOMEM;
2108 goto rel_reg;
2109 }
2110 adapter = netdev_priv(netdev);
2111
2112 switch (pdev->device) {
2113 case BE_DEVICE_ID1:
2114 case OC_DEVICE_ID1:
2115 adapter->generation = BE_GEN2;
2116 break;
2117 case BE_DEVICE_ID2:
2118 case OC_DEVICE_ID2:
2119 adapter->generation = BE_GEN3;
2120 break;
2121 default:
2122 adapter->generation = 0;
2123 }
2124
2125 adapter->pdev = pdev;
2126 pci_set_drvdata(pdev, adapter);
2127 adapter->netdev = netdev;
2128
2129 be_msix_enable(adapter);
2130
2131 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2132 if (!status) {
2133 netdev->features |= NETIF_F_HIGHDMA;
2134 } else {
2135 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2136 if (status) {
2137 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2138 goto free_netdev;
2139 }
2140 }
2141
2142 status = be_ctrl_init(adapter);
2143 if (status)
2144 goto free_netdev;
2145
2146 status = be_stats_init(adapter);
2147 if (status)
2148 goto ctrl_clean;
2149
2150 status = be_hw_up(adapter);
2151 if (status)
2152 goto stats_clean;
2153
2154 status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
2155 true /* permanent */, 0);
2156 if (status)
2157 goto stats_clean;
2158 memcpy(netdev->dev_addr, mac, ETH_ALEN);
2159
2160 INIT_DELAYED_WORK(&adapter->work, be_worker);
2161 be_netdev_init(netdev);
2162 SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
2163
2164 status = be_setup(adapter);
2165 if (status)
2166 goto stats_clean;
2167 status = register_netdev(netdev);
2168 if (status != 0)
2169 goto unsetup;
2170
2171 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2172 return 0;
2173
2174 unsetup:
2175 be_clear(adapter);
2176 stats_clean:
2177 be_stats_cleanup(adapter);
2178 ctrl_clean:
2179 be_ctrl_cleanup(adapter);
2180 free_netdev:
2181 free_netdev(adapter->netdev);
2182 rel_reg:
2183 pci_release_regions(pdev);
2184 disable_dev:
2185 pci_disable_device(pdev);
2186 do_none:
2187 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2188 return status;
2189 }
2190
2191 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2192 {
2193 struct be_adapter *adapter = pci_get_drvdata(pdev);
2194 struct net_device *netdev = adapter->netdev;
2195
2196 netif_device_detach(netdev);
2197 if (netif_running(netdev)) {
2198 rtnl_lock();
2199 be_close(netdev);
2200 rtnl_unlock();
2201 }
2202 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2203 be_clear(adapter);
2204
2205 pci_save_state(pdev);
2206 pci_disable_device(pdev);
2207 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2208 return 0;
2209 }
2210
2211 static int be_resume(struct pci_dev *pdev)
2212 {
2213 int status = 0;
2214 struct be_adapter *adapter = pci_get_drvdata(pdev);
2215 struct net_device *netdev = adapter->netdev;
2216
2217 netif_device_detach(netdev);
2218
2219 status = pci_enable_device(pdev);
2220 if (status)
2221 return status;
2222
2223 pci_set_power_state(pdev, 0);
2224 pci_restore_state(pdev);
2225
2226 be_setup(adapter);
2227 if (netif_running(netdev)) {
2228 rtnl_lock();
2229 be_open(netdev);
2230 rtnl_unlock();
2231 }
2232 netif_device_attach(netdev);
2233 return 0;
2234 }
2235
2236 static struct pci_driver be_driver = {
2237 .name = DRV_NAME,
2238 .id_table = be_dev_ids,
2239 .probe = be_probe,
2240 .remove = be_remove,
2241 .suspend = be_suspend,
2242 .resume = be_resume
2243 };
2244
2245 static int __init be_init_module(void)
2246 {
2247 if (rx_frag_size != 8192 && rx_frag_size != 4096
2248 && rx_frag_size != 2048) {
2249 printk(KERN_WARNING DRV_NAME
2250 " : Module param rx_frag_size must be 2048/4096/8192."
2251 " Using 2048\n");
2252 rx_frag_size = 2048;
2253 }
2254
2255 return pci_register_driver(&be_driver);
2256 }
2257 module_init(be_init_module);
2258
2259 static void __exit be_exit_module(void)
2260 {
2261 pci_unregister_driver(&be_driver);
2262 }
2263 module_exit(be_exit_module);
Linux ARM platform port for MOXA ART SoC