1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux.
3 Copyright 2000,2001 The Linux Kernel Team
4 Written/copyright 1994-2001 by Donald Becker.
6 This software may be used and distributed according to the terms
7 of the GNU General Public License, incorporated herein by reference.
9 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
10 for more information on this driver.
12 Please submit bugs to http://bugzilla.kernel.org/ .
16 #define DRV_NAME "tulip"
17 #ifdef CONFIG_TULIP_NAPI
18 #define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */
20 #define DRV_VERSION "1.1.15"
22 #define DRV_RELDATE "Feb 27, 2007"
25 #include <linux/module.h>
26 #include <linux/pci.h>
28 #include <linux/init.h>
29 #include <linux/etherdevice.h>
30 #include <linux/delay.h>
31 #include <linux/mii.h>
32 #include <linux/ethtool.h>
33 #include <linux/crc32.h>
34 #include <asm/unaligned.h>
35 #include <asm/uaccess.h>
41 static char version
[] __devinitdata
=
42 "Linux Tulip driver version " DRV_VERSION
" (" DRV_RELDATE
")\n";
45 /* A few user-configurable values. */
47 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
48 static unsigned int max_interrupt_work
= 25;
51 /* Used to pass the full-duplex flag, etc. */
52 static int full_duplex
[MAX_UNITS
];
53 static int options
[MAX_UNITS
];
54 static int mtu
[MAX_UNITS
]; /* Jumbo MTU for interfaces. */
56 /* The possible media types that can be set in options[] are: */
57 const char * const medianame
[32] = {
58 "10baseT", "10base2", "AUI", "100baseTx",
59 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx",
60 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII",
61 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4",
62 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19",
63 "","","","", "","","","", "","","","Transceiver reset",
66 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
67 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) \
68 || defined(CONFIG_SPARC) || defined(__ia64__) \
69 || defined(__sh__) || defined(__mips__)
70 static int rx_copybreak
= 1518;
72 static int rx_copybreak
= 100;
76 Set the bus performance register.
77 Typical: Set 16 longword cache alignment, no burst limit.
78 Cache alignment bits 15:14 Burst length 13:8
79 0000 No alignment 0x00000000 unlimited 0800 8 longwords
80 4000 8 longwords 0100 1 longword 1000 16 longwords
81 8000 16 longwords 0200 2 longwords 2000 32 longwords
82 C000 32 longwords 0400 4 longwords
83 Warning: many older 486 systems are broken and require setting 0x00A04800
84 8 longword cache alignment, 8 longword burst.
85 ToDo: Non-Intel setting could be better.
88 #if defined(__alpha__) || defined(__ia64__)
89 static int csr0
= 0x01A00000 | 0xE000;
90 #elif defined(__i386__) || defined(__powerpc__) || defined(__x86_64__)
91 static int csr0
= 0x01A00000 | 0x8000;
92 #elif defined(CONFIG_SPARC) || defined(__hppa__)
93 /* The UltraSparc PCI controllers will disconnect at every 64-byte
94 * crossing anyways so it makes no sense to tell Tulip to burst
97 static int csr0
= 0x01A00000 | 0x9000;
98 #elif defined(__arm__) || defined(__sh__)
99 static int csr0
= 0x01A00000 | 0x4800;
100 #elif defined(__mips__)
101 static int csr0
= 0x00200000 | 0x4000;
103 #warning Processor architecture undefined!
104 static int csr0
= 0x00A00000 | 0x4800;
107 /* Operational parameters that usually are not changed. */
108 /* Time in jiffies before concluding the transmitter is hung. */
109 #define TX_TIMEOUT (4*HZ)
112 MODULE_AUTHOR("The Linux Kernel Team");
113 MODULE_DESCRIPTION("Digital 21*4* Tulip ethernet driver");
114 MODULE_LICENSE("GPL");
115 MODULE_VERSION(DRV_VERSION
);
116 module_param(tulip_debug
, int, 0);
117 module_param(max_interrupt_work
, int, 0);
118 module_param(rx_copybreak
, int, 0);
119 module_param(csr0
, int, 0);
120 module_param_array(options
, int, NULL
, 0);
121 module_param_array(full_duplex
, int, NULL
, 0);
123 #define PFX DRV_NAME ": "
126 int tulip_debug
= TULIP_DEBUG
;
131 static void tulip_timer(unsigned long data
)
133 struct net_device
*dev
= (struct net_device
*)data
;
134 struct tulip_private
*tp
= netdev_priv(dev
);
136 if (netif_running(dev
))
137 schedule_work(&tp
->media_work
);
141 * This table use during operation for capabilities and media timer.
143 * It is indexed via the values in 'enum chips'
146 struct tulip_chip_table tulip_tbl
[] = {
147 { }, /* placeholder for array, slot unused currently */
148 { }, /* placeholder for array, slot unused currently */
151 { "Digital DS21140 Tulip", 128, 0x0001ebef,
152 HAS_MII
| HAS_MEDIA_TABLE
| CSR12_IN_SROM
| HAS_PCI_MWI
, tulip_timer
,
155 /* DC21142, DC21143 */
156 { "Digital DS21142/43 Tulip", 128, 0x0801fbff,
157 HAS_MII
| HAS_MEDIA_TABLE
| ALWAYS_CHECK_MII
| HAS_ACPI
| HAS_NWAY
158 | HAS_INTR_MITIGATION
| HAS_PCI_MWI
, tulip_timer
, t21142_media_task
},
161 { "Lite-On 82c168 PNIC", 256, 0x0001fbef,
162 HAS_MII
| HAS_PNICNWAY
, pnic_timer
, },
165 { "Macronix 98713 PMAC", 128, 0x0001ebef,
166 HAS_MII
| HAS_MEDIA_TABLE
| CSR12_IN_SROM
, mxic_timer
, },
169 { "Macronix 98715 PMAC", 256, 0x0001ebef,
170 HAS_MEDIA_TABLE
, mxic_timer
, },
173 { "Macronix 98725 PMAC", 256, 0x0001ebef,
174 HAS_MEDIA_TABLE
, mxic_timer
, },
177 { "ASIX AX88140", 128, 0x0001fbff,
178 HAS_MII
| HAS_MEDIA_TABLE
| CSR12_IN_SROM
| MC_HASH_ONLY
179 | IS_ASIX
, tulip_timer
, tulip_media_task
},
182 { "Lite-On PNIC-II", 256, 0x0801fbff,
183 HAS_MII
| HAS_NWAY
| HAS_8023X
| HAS_PCI_MWI
, pnic2_timer
, },
186 { "ADMtek Comet", 256, 0x0001abef,
187 HAS_MII
| MC_HASH_ONLY
| COMET_MAC_ADDR
, comet_timer
, },
190 { "Compex 9881 PMAC", 128, 0x0001ebef,
191 HAS_MII
| HAS_MEDIA_TABLE
| CSR12_IN_SROM
, mxic_timer
, },
194 { "Intel DS21145 Tulip", 128, 0x0801fbff,
195 HAS_MII
| HAS_MEDIA_TABLE
| ALWAYS_CHECK_MII
| HAS_ACPI
196 | HAS_NWAY
| HAS_PCI_MWI
, tulip_timer
, tulip_media_task
},
199 #ifdef CONFIG_TULIP_DM910X
200 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
201 HAS_MII
| HAS_MEDIA_TABLE
| CSR12_IN_SROM
| HAS_ACPI
,
202 tulip_timer
, tulip_media_task
},
208 { "Conexant LANfinity", 256, 0x0001ebef,
209 HAS_MII
| HAS_ACPI
, tulip_timer
, tulip_media_task
},
214 static struct pci_device_id tulip_pci_tbl
[] = {
215 { 0x1011, 0x0009, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, DC21140
},
216 { 0x1011, 0x0019, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, DC21143
},
217 { 0x11AD, 0x0002, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, LC82C168
},
218 { 0x10d9, 0x0512, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, MX98713
},
219 { 0x10d9, 0x0531, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, MX98715
},
220 /* { 0x10d9, 0x0531, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98725 },*/
221 { 0x125B, 0x1400, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, AX88140
},
222 { 0x11AD, 0xc115, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, PNIC2
},
223 { 0x1317, 0x0981, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
224 { 0x1317, 0x0985, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
225 { 0x1317, 0x1985, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
226 { 0x1317, 0x9511, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
227 { 0x13D1, 0xAB02, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
228 { 0x13D1, 0xAB03, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
229 { 0x13D1, 0xAB08, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
230 { 0x104A, 0x0981, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
231 { 0x104A, 0x2774, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
232 { 0x1259, 0xa120, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
233 { 0x11F6, 0x9881, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMPEX9881
},
234 { 0x8086, 0x0039, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, I21145
},
235 #ifdef CONFIG_TULIP_DM910X
236 { 0x1282, 0x9100, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, DM910X
},
237 { 0x1282, 0x9102, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, DM910X
},
239 { 0x1113, 0x1216, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
240 { 0x1113, 0x1217, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, MX98715
},
241 { 0x1113, 0x9511, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
242 { 0x1186, 0x1541, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
243 { 0x1186, 0x1561, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
244 { 0x1186, 0x1591, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
245 { 0x14f1, 0x1803, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, CONEXANT
},
246 { 0x1626, 0x8410, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
247 { 0x1737, 0xAB09, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
248 { 0x1737, 0xAB08, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
249 { 0x17B3, 0xAB08, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
250 { 0x10b7, 0x9300, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
}, /* 3Com 3CSOHO100B-TX */
251 { 0x14ea, 0xab08, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
}, /* Planex FNW-3602-TX */
252 { 0x1414, 0x0001, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
}, /* Microsoft MN-120 */
253 { 0x1414, 0x0002, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, COMET
},
254 { } /* terminate list */
256 MODULE_DEVICE_TABLE(pci
, tulip_pci_tbl
);
259 /* A full-duplex map for media types. */
260 const char tulip_media_cap
[32] =
261 {0,0,0,16, 3,19,16,24, 27,4,7,5, 0,20,23,20, 28,31,0,0, };
263 static void tulip_tx_timeout(struct net_device
*dev
);
264 static void tulip_init_ring(struct net_device
*dev
);
265 static void tulip_free_ring(struct net_device
*dev
);
266 static netdev_tx_t
tulip_start_xmit(struct sk_buff
*skb
,
267 struct net_device
*dev
);
268 static int tulip_open(struct net_device
*dev
);
269 static int tulip_close(struct net_device
*dev
);
270 static void tulip_up(struct net_device
*dev
);
271 static void tulip_down(struct net_device
*dev
);
272 static struct net_device_stats
*tulip_get_stats(struct net_device
*dev
);
273 static int private_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
);
274 static void set_rx_mode(struct net_device
*dev
);
275 #ifdef CONFIG_NET_POLL_CONTROLLER
276 static void poll_tulip(struct net_device
*dev
);
279 static void tulip_set_power_state (struct tulip_private
*tp
,
280 int sleep
, int snooze
)
282 if (tp
->flags
& HAS_ACPI
) {
284 pci_read_config_dword (tp
->pdev
, CFDD
, &tmp
);
285 newtmp
= tmp
& ~(CFDD_Sleep
| CFDD_Snooze
);
287 newtmp
|= CFDD_Sleep
;
289 newtmp
|= CFDD_Snooze
;
291 pci_write_config_dword (tp
->pdev
, CFDD
, newtmp
);
297 static void tulip_up(struct net_device
*dev
)
299 struct tulip_private
*tp
= netdev_priv(dev
);
300 void __iomem
*ioaddr
= tp
->base_addr
;
301 int next_tick
= 3*HZ
;
305 #ifdef CONFIG_TULIP_NAPI
306 napi_enable(&tp
->napi
);
309 /* Wake the chip from sleep/snooze mode. */
310 tulip_set_power_state (tp
, 0, 0);
312 /* On some chip revs we must set the MII/SYM port before the reset!? */
313 if (tp
->mii_cnt
|| (tp
->mtable
&& tp
->mtable
->has_mii
))
314 iowrite32(0x00040000, ioaddr
+ CSR6
);
316 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
317 iowrite32(0x00000001, ioaddr
+ CSR0
);
318 pci_read_config_dword(tp
->pdev
, PCI_COMMAND
, ®
); /* flush write */
322 Wait the specified 50 PCI cycles after a reset by initializing
323 Tx and Rx queues and the address filter list. */
324 iowrite32(tp
->csr0
, ioaddr
+ CSR0
);
325 pci_read_config_dword(tp
->pdev
, PCI_COMMAND
, ®
); /* flush write */
329 printk(KERN_DEBUG
"%s: tulip_up(), irq==%d.\n", dev
->name
, dev
->irq
);
331 iowrite32(tp
->rx_ring_dma
, ioaddr
+ CSR3
);
332 iowrite32(tp
->tx_ring_dma
, ioaddr
+ CSR4
);
333 tp
->cur_rx
= tp
->cur_tx
= 0;
334 tp
->dirty_rx
= tp
->dirty_tx
= 0;
336 if (tp
->flags
& MC_HASH_ONLY
) {
337 u32 addr_low
= get_unaligned_le32(dev
->dev_addr
);
338 u32 addr_high
= get_unaligned_le16(dev
->dev_addr
+ 4);
339 if (tp
->chip_id
== AX88140
) {
340 iowrite32(0, ioaddr
+ CSR13
);
341 iowrite32(addr_low
, ioaddr
+ CSR14
);
342 iowrite32(1, ioaddr
+ CSR13
);
343 iowrite32(addr_high
, ioaddr
+ CSR14
);
344 } else if (tp
->flags
& COMET_MAC_ADDR
) {
345 iowrite32(addr_low
, ioaddr
+ 0xA4);
346 iowrite32(addr_high
, ioaddr
+ 0xA8);
347 iowrite32(0, ioaddr
+ 0xAC);
348 iowrite32(0, ioaddr
+ 0xB0);
351 /* This is set_rx_mode(), but without starting the transmitter. */
352 u16
*eaddrs
= (u16
*)dev
->dev_addr
;
353 u16
*setup_frm
= &tp
->setup_frame
[15*6];
356 /* 21140 bug: you must add the broadcast address. */
357 memset(tp
->setup_frame
, 0xff, sizeof(tp
->setup_frame
));
358 /* Fill the final entry of the table with our physical address. */
359 *setup_frm
++ = eaddrs
[0]; *setup_frm
++ = eaddrs
[0];
360 *setup_frm
++ = eaddrs
[1]; *setup_frm
++ = eaddrs
[1];
361 *setup_frm
++ = eaddrs
[2]; *setup_frm
++ = eaddrs
[2];
363 mapping
= pci_map_single(tp
->pdev
, tp
->setup_frame
,
364 sizeof(tp
->setup_frame
),
366 tp
->tx_buffers
[tp
->cur_tx
].skb
= NULL
;
367 tp
->tx_buffers
[tp
->cur_tx
].mapping
= mapping
;
369 /* Put the setup frame on the Tx list. */
370 tp
->tx_ring
[tp
->cur_tx
].length
= cpu_to_le32(0x08000000 | 192);
371 tp
->tx_ring
[tp
->cur_tx
].buffer1
= cpu_to_le32(mapping
);
372 tp
->tx_ring
[tp
->cur_tx
].status
= cpu_to_le32(DescOwned
);
377 tp
->saved_if_port
= dev
->if_port
;
378 if (dev
->if_port
== 0)
379 dev
->if_port
= tp
->default_port
;
381 /* Allow selecting a default media. */
383 if (tp
->mtable
== NULL
)
386 int looking_for
= tulip_media_cap
[dev
->if_port
] & MediaIsMII
? 11 :
387 (dev
->if_port
== 12 ? 0 : dev
->if_port
);
388 for (i
= 0; i
< tp
->mtable
->leafcount
; i
++)
389 if (tp
->mtable
->mleaf
[i
].media
== looking_for
) {
390 printk(KERN_INFO
"%s: Using user-specified media %s.\n",
391 dev
->name
, medianame
[dev
->if_port
]);
395 if ((tp
->mtable
->defaultmedia
& 0x0800) == 0) {
396 int looking_for
= tp
->mtable
->defaultmedia
& MEDIA_MASK
;
397 for (i
= 0; i
< tp
->mtable
->leafcount
; i
++)
398 if (tp
->mtable
->mleaf
[i
].media
== looking_for
) {
399 printk(KERN_INFO
"%s: Using EEPROM-set media %s.\n",
400 dev
->name
, medianame
[looking_for
]);
404 /* Start sensing first non-full-duplex media. */
405 for (i
= tp
->mtable
->leafcount
- 1;
406 (tulip_media_cap
[tp
->mtable
->mleaf
[i
].media
] & MediaAlwaysFD
) && i
> 0; i
--)
415 if (tp
->chip_id
== DC21143
&&
416 (tulip_media_cap
[dev
->if_port
] & MediaIsMII
)) {
417 /* We must reset the media CSRs when we force-select MII mode. */
418 iowrite32(0x0000, ioaddr
+ CSR13
);
419 iowrite32(0x0000, ioaddr
+ CSR14
);
420 iowrite32(0x0008, ioaddr
+ CSR15
);
422 tulip_select_media(dev
, 1);
423 } else if (tp
->chip_id
== DC21142
) {
425 tulip_select_media(dev
, 1);
427 printk(KERN_INFO
"%s: Using MII transceiver %d, status "
429 dev
->name
, tp
->phys
[0], tulip_mdio_read(dev
, tp
->phys
[0], 1));
430 iowrite32(csr6_mask_defstate
, ioaddr
+ CSR6
);
431 tp
->csr6
= csr6_mask_hdcap
;
433 iowrite32(0x0000, ioaddr
+ CSR13
);
434 iowrite32(0x0000, ioaddr
+ CSR14
);
436 t21142_start_nway(dev
);
437 } else if (tp
->chip_id
== PNIC2
) {
438 /* for initial startup advertise 10/100 Full and Half */
439 tp
->sym_advertise
= 0x01E0;
440 /* enable autonegotiate end interrupt */
441 iowrite32(ioread32(ioaddr
+CSR5
)| 0x00008010, ioaddr
+ CSR5
);
442 iowrite32(ioread32(ioaddr
+CSR7
)| 0x00008010, ioaddr
+ CSR7
);
443 pnic2_start_nway(dev
);
444 } else if (tp
->chip_id
== LC82C168
&& ! tp
->medialock
) {
447 tp
->csr6
= 0x814C0000 | (tp
->full_duplex
? 0x0200 : 0);
448 iowrite32(0x0001, ioaddr
+ CSR15
);
449 } else if (ioread32(ioaddr
+ CSR5
) & TPLnkPass
)
452 /* Start with 10mbps to do autonegotiation. */
453 iowrite32(0x32, ioaddr
+ CSR12
);
454 tp
->csr6
= 0x00420000;
455 iowrite32(0x0001B078, ioaddr
+ 0xB8);
456 iowrite32(0x0201B078, ioaddr
+ 0xB8);
459 } else if ((tp
->chip_id
== MX98713
|| tp
->chip_id
== COMPEX9881
)
460 && ! tp
->medialock
) {
462 tp
->csr6
= 0x01880000 | (tp
->full_duplex
? 0x0200 : 0);
463 iowrite32(0x0f370000 | ioread16(ioaddr
+ 0x80), ioaddr
+ 0x80);
464 } else if (tp
->chip_id
== MX98715
|| tp
->chip_id
== MX98725
) {
465 /* Provided by BOLO, Macronix - 12/10/1998. */
467 tp
->csr6
= 0x01a80200;
468 iowrite32(0x0f370000 | ioread16(ioaddr
+ 0x80), ioaddr
+ 0x80);
469 iowrite32(0x11000 | ioread16(ioaddr
+ 0xa0), ioaddr
+ 0xa0);
470 } else if (tp
->chip_id
== COMET
|| tp
->chip_id
== CONEXANT
) {
471 /* Enable automatic Tx underrun recovery. */
472 iowrite32(ioread32(ioaddr
+ 0x88) | 1, ioaddr
+ 0x88);
473 dev
->if_port
= tp
->mii_cnt
? 11 : 0;
474 tp
->csr6
= 0x00040000;
475 } else if (tp
->chip_id
== AX88140
) {
476 tp
->csr6
= tp
->mii_cnt
? 0x00040100 : 0x00000100;
478 tulip_select_media(dev
, 1);
480 /* Start the chip's Tx to process setup frame. */
484 iowrite32(tp
->csr6
| TxOn
, ioaddr
+ CSR6
);
486 /* Enable interrupts by setting the interrupt mask. */
487 iowrite32(tulip_tbl
[tp
->chip_id
].valid_intrs
, ioaddr
+ CSR5
);
488 iowrite32(tulip_tbl
[tp
->chip_id
].valid_intrs
, ioaddr
+ CSR7
);
489 tulip_start_rxtx(tp
);
490 iowrite32(0, ioaddr
+ CSR2
); /* Rx poll demand */
492 if (tulip_debug
> 2) {
493 printk(KERN_DEBUG
"%s: Done tulip_up(), CSR0 %8.8x, CSR5 %8.8x CSR6 %8.8x.\n",
494 dev
->name
, ioread32(ioaddr
+ CSR0
), ioread32(ioaddr
+ CSR5
),
495 ioread32(ioaddr
+ CSR6
));
498 /* Set the timer to switch to check for link beat and perhaps switch
499 to an alternate media type. */
500 tp
->timer
.expires
= RUN_AT(next_tick
);
501 add_timer(&tp
->timer
);
502 #ifdef CONFIG_TULIP_NAPI
503 init_timer(&tp
->oom_timer
);
504 tp
->oom_timer
.data
= (unsigned long)dev
;
505 tp
->oom_timer
.function
= oom_timer
;
510 tulip_open(struct net_device
*dev
)
514 tulip_init_ring (dev
);
516 retval
= request_irq(dev
->irq
, &tulip_interrupt
, IRQF_SHARED
, dev
->name
, dev
);
522 netif_start_queue (dev
);
527 tulip_free_ring (dev
);
532 static void tulip_tx_timeout(struct net_device
*dev
)
534 struct tulip_private
*tp
= netdev_priv(dev
);
535 void __iomem
*ioaddr
= tp
->base_addr
;
538 spin_lock_irqsave (&tp
->lock
, flags
);
540 if (tulip_media_cap
[dev
->if_port
] & MediaIsMII
) {
541 /* Do nothing -- the media monitor should handle this. */
543 printk(KERN_WARNING
"%s: Transmit timeout using MII device.\n",
545 } else if (tp
->chip_id
== DC21140
|| tp
->chip_id
== DC21142
546 || tp
->chip_id
== MX98713
|| tp
->chip_id
== COMPEX9881
547 || tp
->chip_id
== DM910X
) {
548 printk(KERN_WARNING
"%s: 21140 transmit timed out, status %8.8x, "
549 "SIA %8.8x %8.8x %8.8x %8.8x, resetting...\n",
550 dev
->name
, ioread32(ioaddr
+ CSR5
), ioread32(ioaddr
+ CSR12
),
551 ioread32(ioaddr
+ CSR13
), ioread32(ioaddr
+ CSR14
), ioread32(ioaddr
+ CSR15
));
552 tp
->timeout_recovery
= 1;
553 schedule_work(&tp
->media_work
);
555 } else if (tp
->chip_id
== PNIC2
) {
556 printk(KERN_WARNING
"%s: PNIC2 transmit timed out, status %8.8x, "
557 "CSR6/7 %8.8x / %8.8x CSR12 %8.8x, resetting...\n",
558 dev
->name
, (int)ioread32(ioaddr
+ CSR5
), (int)ioread32(ioaddr
+ CSR6
),
559 (int)ioread32(ioaddr
+ CSR7
), (int)ioread32(ioaddr
+ CSR12
));
561 printk(KERN_WARNING
"%s: Transmit timed out, status %8.8x, CSR12 "
562 "%8.8x, resetting...\n",
563 dev
->name
, ioread32(ioaddr
+ CSR5
), ioread32(ioaddr
+ CSR12
));
567 #if defined(way_too_many_messages)
568 if (tulip_debug
> 3) {
570 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
571 u8
*buf
= (u8
*)(tp
->rx_ring
[i
].buffer1
);
573 printk(KERN_DEBUG
"%2d: %8.8x %8.8x %8.8x %8.8x "
574 "%2.2x %2.2x %2.2x.\n",
575 i
, (unsigned int)tp
->rx_ring
[i
].status
,
576 (unsigned int)tp
->rx_ring
[i
].length
,
577 (unsigned int)tp
->rx_ring
[i
].buffer1
,
578 (unsigned int)tp
->rx_ring
[i
].buffer2
,
579 buf
[0], buf
[1], buf
[2]);
580 for (j
= 0; buf
[j
] != 0xee && j
< 1600; j
++)
582 printk(KERN_CONT
" %2.2x", buf
[j
]);
583 printk(KERN_CONT
" j=%d.\n", j
);
585 printk(KERN_DEBUG
" Rx ring %8.8x: ", (int)tp
->rx_ring
);
586 for (i
= 0; i
< RX_RING_SIZE
; i
++)
587 printk(KERN_CONT
" %8.8x",
588 (unsigned int)tp
->rx_ring
[i
].status
);
589 printk(KERN_DEBUG
" Tx ring %8.8x: ", (int)tp
->tx_ring
);
590 for (i
= 0; i
< TX_RING_SIZE
; i
++)
591 printk(KERN_CONT
" %8.8x", (unsigned int)tp
->tx_ring
[i
].status
);
592 printk(KERN_CONT
"\n");
596 tulip_tx_timeout_complete(tp
, ioaddr
);
599 spin_unlock_irqrestore (&tp
->lock
, flags
);
600 dev
->trans_start
= jiffies
;
601 netif_wake_queue (dev
);
605 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
606 static void tulip_init_ring(struct net_device
*dev
)
608 struct tulip_private
*tp
= netdev_priv(dev
);
615 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
616 tp
->rx_ring
[i
].status
= 0x00000000;
617 tp
->rx_ring
[i
].length
= cpu_to_le32(PKT_BUF_SZ
);
618 tp
->rx_ring
[i
].buffer2
= cpu_to_le32(tp
->rx_ring_dma
+ sizeof(struct tulip_rx_desc
) * (i
+ 1));
619 tp
->rx_buffers
[i
].skb
= NULL
;
620 tp
->rx_buffers
[i
].mapping
= 0;
622 /* Mark the last entry as wrapping the ring. */
623 tp
->rx_ring
[i
-1].length
= cpu_to_le32(PKT_BUF_SZ
| DESC_RING_WRAP
);
624 tp
->rx_ring
[i
-1].buffer2
= cpu_to_le32(tp
->rx_ring_dma
);
626 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
629 /* Note the receive buffer must be longword aligned.
630 dev_alloc_skb() provides 16 byte alignment. But do *not*
631 use skb_reserve() to align the IP header! */
632 struct sk_buff
*skb
= dev_alloc_skb(PKT_BUF_SZ
);
633 tp
->rx_buffers
[i
].skb
= skb
;
636 mapping
= pci_map_single(tp
->pdev
, skb
->data
,
637 PKT_BUF_SZ
, PCI_DMA_FROMDEVICE
);
638 tp
->rx_buffers
[i
].mapping
= mapping
;
639 skb
->dev
= dev
; /* Mark as being used by this device. */
640 tp
->rx_ring
[i
].status
= cpu_to_le32(DescOwned
); /* Owned by Tulip chip */
641 tp
->rx_ring
[i
].buffer1
= cpu_to_le32(mapping
);
643 tp
->dirty_rx
= (unsigned int)(i
- RX_RING_SIZE
);
645 /* The Tx buffer descriptor is filled in as needed, but we
646 do need to clear the ownership bit. */
647 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
648 tp
->tx_buffers
[i
].skb
= NULL
;
649 tp
->tx_buffers
[i
].mapping
= 0;
650 tp
->tx_ring
[i
].status
= 0x00000000;
651 tp
->tx_ring
[i
].buffer2
= cpu_to_le32(tp
->tx_ring_dma
+ sizeof(struct tulip_tx_desc
) * (i
+ 1));
653 tp
->tx_ring
[i
-1].buffer2
= cpu_to_le32(tp
->tx_ring_dma
);
657 tulip_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
659 struct tulip_private
*tp
= netdev_priv(dev
);
665 spin_lock_irqsave(&tp
->lock
, flags
);
667 /* Calculate the next Tx descriptor entry. */
668 entry
= tp
->cur_tx
% TX_RING_SIZE
;
670 tp
->tx_buffers
[entry
].skb
= skb
;
671 mapping
= pci_map_single(tp
->pdev
, skb
->data
,
672 skb
->len
, PCI_DMA_TODEVICE
);
673 tp
->tx_buffers
[entry
].mapping
= mapping
;
674 tp
->tx_ring
[entry
].buffer1
= cpu_to_le32(mapping
);
676 if (tp
->cur_tx
- tp
->dirty_tx
< TX_RING_SIZE
/2) {/* Typical path */
677 flag
= 0x60000000; /* No interrupt */
678 } else if (tp
->cur_tx
- tp
->dirty_tx
== TX_RING_SIZE
/2) {
679 flag
= 0xe0000000; /* Tx-done intr. */
680 } else if (tp
->cur_tx
- tp
->dirty_tx
< TX_RING_SIZE
- 2) {
681 flag
= 0x60000000; /* No Tx-done intr. */
682 } else { /* Leave room for set_rx_mode() to fill entries. */
683 flag
= 0xe0000000; /* Tx-done intr. */
684 netif_stop_queue(dev
);
686 if (entry
== TX_RING_SIZE
-1)
687 flag
= 0xe0000000 | DESC_RING_WRAP
;
689 tp
->tx_ring
[entry
].length
= cpu_to_le32(skb
->len
| flag
);
690 /* if we were using Transmit Automatic Polling, we would need a
692 tp
->tx_ring
[entry
].status
= cpu_to_le32(DescOwned
);
697 /* Trigger an immediate transmit demand. */
698 iowrite32(0, tp
->base_addr
+ CSR1
);
700 spin_unlock_irqrestore(&tp
->lock
, flags
);
702 dev
->trans_start
= jiffies
;
707 static void tulip_clean_tx_ring(struct tulip_private
*tp
)
709 unsigned int dirty_tx
;
711 for (dirty_tx
= tp
->dirty_tx
; tp
->cur_tx
- dirty_tx
> 0;
713 int entry
= dirty_tx
% TX_RING_SIZE
;
714 int status
= le32_to_cpu(tp
->tx_ring
[entry
].status
);
717 tp
->stats
.tx_errors
++; /* It wasn't Txed */
718 tp
->tx_ring
[entry
].status
= 0;
721 /* Check for Tx filter setup frames. */
722 if (tp
->tx_buffers
[entry
].skb
== NULL
) {
723 /* test because dummy frames not mapped */
724 if (tp
->tx_buffers
[entry
].mapping
)
725 pci_unmap_single(tp
->pdev
,
726 tp
->tx_buffers
[entry
].mapping
,
727 sizeof(tp
->setup_frame
),
732 pci_unmap_single(tp
->pdev
, tp
->tx_buffers
[entry
].mapping
,
733 tp
->tx_buffers
[entry
].skb
->len
,
736 /* Free the original skb. */
737 dev_kfree_skb_irq(tp
->tx_buffers
[entry
].skb
);
738 tp
->tx_buffers
[entry
].skb
= NULL
;
739 tp
->tx_buffers
[entry
].mapping
= 0;
743 static void tulip_down (struct net_device
*dev
)
745 struct tulip_private
*tp
= netdev_priv(dev
);
746 void __iomem
*ioaddr
= tp
->base_addr
;
749 cancel_work_sync(&tp
->media_work
);
751 #ifdef CONFIG_TULIP_NAPI
752 napi_disable(&tp
->napi
);
755 del_timer_sync (&tp
->timer
);
756 #ifdef CONFIG_TULIP_NAPI
757 del_timer_sync (&tp
->oom_timer
);
759 spin_lock_irqsave (&tp
->lock
, flags
);
761 /* Disable interrupts by clearing the interrupt mask. */
762 iowrite32 (0x00000000, ioaddr
+ CSR7
);
764 /* Stop the Tx and Rx processes. */
767 /* prepare receive buffers */
768 tulip_refill_rx(dev
);
770 /* release any unconsumed transmit buffers */
771 tulip_clean_tx_ring(tp
);
773 if (ioread32 (ioaddr
+ CSR6
) != 0xffffffff)
774 tp
->stats
.rx_missed_errors
+= ioread32 (ioaddr
+ CSR8
) & 0xffff;
776 spin_unlock_irqrestore (&tp
->lock
, flags
);
778 init_timer(&tp
->timer
);
779 tp
->timer
.data
= (unsigned long)dev
;
780 tp
->timer
.function
= tulip_tbl
[tp
->chip_id
].media_timer
;
782 dev
->if_port
= tp
->saved_if_port
;
784 /* Leave the driver in snooze, not sleep, mode. */
785 tulip_set_power_state (tp
, 0, 1);
788 static void tulip_free_ring (struct net_device
*dev
)
790 struct tulip_private
*tp
= netdev_priv(dev
);
793 /* Free all the skbuffs in the Rx queue. */
794 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
795 struct sk_buff
*skb
= tp
->rx_buffers
[i
].skb
;
796 dma_addr_t mapping
= tp
->rx_buffers
[i
].mapping
;
798 tp
->rx_buffers
[i
].skb
= NULL
;
799 tp
->rx_buffers
[i
].mapping
= 0;
801 tp
->rx_ring
[i
].status
= 0; /* Not owned by Tulip chip. */
802 tp
->rx_ring
[i
].length
= 0;
803 /* An invalid address. */
804 tp
->rx_ring
[i
].buffer1
= cpu_to_le32(0xBADF00D0);
806 pci_unmap_single(tp
->pdev
, mapping
, PKT_BUF_SZ
,
812 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
813 struct sk_buff
*skb
= tp
->tx_buffers
[i
].skb
;
816 pci_unmap_single(tp
->pdev
, tp
->tx_buffers
[i
].mapping
,
817 skb
->len
, PCI_DMA_TODEVICE
);
820 tp
->tx_buffers
[i
].skb
= NULL
;
821 tp
->tx_buffers
[i
].mapping
= 0;
825 static int tulip_close (struct net_device
*dev
)
827 struct tulip_private
*tp
= netdev_priv(dev
);
828 void __iomem
*ioaddr
= tp
->base_addr
;
830 netif_stop_queue (dev
);
835 printk (KERN_DEBUG
"%s: Shutting down ethercard, status was %2.2x.\n",
836 dev
->name
, ioread32 (ioaddr
+ CSR5
));
838 free_irq (dev
->irq
, dev
);
840 tulip_free_ring (dev
);
845 static struct net_device_stats
*tulip_get_stats(struct net_device
*dev
)
847 struct tulip_private
*tp
= netdev_priv(dev
);
848 void __iomem
*ioaddr
= tp
->base_addr
;
850 if (netif_running(dev
)) {
853 spin_lock_irqsave (&tp
->lock
, flags
);
855 tp
->stats
.rx_missed_errors
+= ioread32(ioaddr
+ CSR8
) & 0xffff;
857 spin_unlock_irqrestore(&tp
->lock
, flags
);
864 static void tulip_get_drvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
866 struct tulip_private
*np
= netdev_priv(dev
);
867 strcpy(info
->driver
, DRV_NAME
);
868 strcpy(info
->version
, DRV_VERSION
);
869 strcpy(info
->bus_info
, pci_name(np
->pdev
));
872 static const struct ethtool_ops ops
= {
873 .get_drvinfo
= tulip_get_drvinfo
876 /* Provide ioctl() calls to examine the MII xcvr state. */
877 static int private_ioctl (struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
879 struct tulip_private
*tp
= netdev_priv(dev
);
880 void __iomem
*ioaddr
= tp
->base_addr
;
881 struct mii_ioctl_data
*data
= if_mii(rq
);
882 const unsigned int phy_idx
= 0;
883 int phy
= tp
->phys
[phy_idx
] & 0x1f;
884 unsigned int regnum
= data
->reg_num
;
887 case SIOCGMIIPHY
: /* Get address of MII PHY in use. */
890 else if (tp
->flags
& HAS_NWAY
)
892 else if (tp
->chip_id
== COMET
)
897 case SIOCGMIIREG
: /* Read MII PHY register. */
898 if (data
->phy_id
== 32 && (tp
->flags
& HAS_NWAY
)) {
899 int csr12
= ioread32 (ioaddr
+ CSR12
);
900 int csr14
= ioread32 (ioaddr
+ CSR14
);
903 if (((csr14
<<5) & 0x1000) ||
904 (dev
->if_port
== 5 && tp
->nwayset
))
905 data
->val_out
= 0x1000;
907 data
->val_out
= (tulip_media_cap
[dev
->if_port
]&MediaIs100
? 0x2000 : 0)
908 | (tulip_media_cap
[dev
->if_port
]&MediaIsFD
? 0x0100 : 0);
913 ((csr12
&0x7000) == 0x5000 ? 0x20 : 0) +
914 ((csr12
&0x06) == 6 ? 0 : 4);
915 data
->val_out
|= 0x6048;
918 /* Advertised value, bogus 10baseTx-FD value from CSR6. */
920 ((ioread32(ioaddr
+ CSR6
) >> 3) & 0x0040) +
921 ((csr14
>> 1) & 0x20) + 1;
922 data
->val_out
|= ((csr14
>> 9) & 0x03C0);
924 case 5: data
->val_out
= tp
->lpar
; break;
925 default: data
->val_out
= 0; break;
928 data
->val_out
= tulip_mdio_read (dev
, data
->phy_id
& 0x1f, regnum
);
932 case SIOCSMIIREG
: /* Write MII PHY register. */
935 if (data
->phy_id
== phy
) {
936 u16 value
= data
->val_in
;
938 case 0: /* Check for autonegotiation on or reset. */
939 tp
->full_duplex_lock
= (value
& 0x9000) ? 0 : 1;
940 if (tp
->full_duplex_lock
)
941 tp
->full_duplex
= (value
& 0x0100) ? 1 : 0;
944 tp
->advertising
[phy_idx
] =
945 tp
->mii_advertise
= data
->val_in
;
949 if (data
->phy_id
== 32 && (tp
->flags
& HAS_NWAY
)) {
950 u16 value
= data
->val_in
;
952 if ((value
& 0x1200) == 0x1200) {
953 if (tp
->chip_id
== PNIC2
) {
954 pnic2_start_nway (dev
);
956 t21142_start_nway (dev
);
959 } else if (regnum
== 4)
960 tp
->sym_advertise
= value
;
962 tulip_mdio_write (dev
, data
->phy_id
& 0x1f, regnum
, data
->val_in
);
973 /* Set or clear the multicast filter for this adaptor.
974 Note that we only use exclusion around actually queueing the
975 new frame, not around filling tp->setup_frame. This is non-deterministic
976 when re-entered but still correct. */
979 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
981 static void build_setup_frame_hash(u16
*setup_frm
, struct net_device
*dev
)
983 struct tulip_private
*tp
= netdev_priv(dev
);
985 struct dev_mc_list
*mclist
;
989 memset(hash_table
, 0, sizeof(hash_table
));
990 set_bit_le(255, hash_table
); /* Broadcast entry */
991 /* This should work on big-endian machines as well. */
992 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
993 i
++, mclist
= mclist
->next
) {
994 int index
= ether_crc_le(ETH_ALEN
, mclist
->dmi_addr
) & 0x1ff;
996 set_bit_le(index
, hash_table
);
999 for (i
= 0; i
< 32; i
++) {
1000 *setup_frm
++ = hash_table
[i
];
1001 *setup_frm
++ = hash_table
[i
];
1003 setup_frm
= &tp
->setup_frame
[13*6];
1005 /* Fill the final entry with our physical address. */
1006 eaddrs
= (u16
*)dev
->dev_addr
;
1007 *setup_frm
++ = eaddrs
[0]; *setup_frm
++ = eaddrs
[0];
1008 *setup_frm
++ = eaddrs
[1]; *setup_frm
++ = eaddrs
[1];
1009 *setup_frm
++ = eaddrs
[2]; *setup_frm
++ = eaddrs
[2];
1012 static void build_setup_frame_perfect(u16
*setup_frm
, struct net_device
*dev
)
1014 struct tulip_private
*tp
= netdev_priv(dev
);
1015 struct dev_mc_list
*mclist
;
1019 /* We have <= 14 addresses so we can use the wonderful
1020 16 address perfect filtering of the Tulip. */
1021 for (i
= 0, mclist
= dev
->mc_list
; i
< dev
->mc_count
;
1022 i
++, mclist
= mclist
->next
) {
1023 eaddrs
= (u16
*)mclist
->dmi_addr
;
1024 *setup_frm
++ = *eaddrs
; *setup_frm
++ = *eaddrs
++;
1025 *setup_frm
++ = *eaddrs
; *setup_frm
++ = *eaddrs
++;
1026 *setup_frm
++ = *eaddrs
; *setup_frm
++ = *eaddrs
++;
1028 /* Fill the unused entries with the broadcast address. */
1029 memset(setup_frm
, 0xff, (15-i
)*12);
1030 setup_frm
= &tp
->setup_frame
[15*6];
1032 /* Fill the final entry with our physical address. */
1033 eaddrs
= (u16
*)dev
->dev_addr
;
1034 *setup_frm
++ = eaddrs
[0]; *setup_frm
++ = eaddrs
[0];
1035 *setup_frm
++ = eaddrs
[1]; *setup_frm
++ = eaddrs
[1];
1036 *setup_frm
++ = eaddrs
[2]; *setup_frm
++ = eaddrs
[2];
1040 static void set_rx_mode(struct net_device
*dev
)
1042 struct tulip_private
*tp
= netdev_priv(dev
);
1043 void __iomem
*ioaddr
= tp
->base_addr
;
1046 csr6
= ioread32(ioaddr
+ CSR6
) & ~0x00D5;
1048 tp
->csr6
&= ~0x00D5;
1049 if (dev
->flags
& IFF_PROMISC
) { /* Set promiscuous. */
1050 tp
->csr6
|= AcceptAllMulticast
| AcceptAllPhys
;
1051 csr6
|= AcceptAllMulticast
| AcceptAllPhys
;
1052 } else if ((dev
->mc_count
> 1000) || (dev
->flags
& IFF_ALLMULTI
)) {
1053 /* Too many to filter well -- accept all multicasts. */
1054 tp
->csr6
|= AcceptAllMulticast
;
1055 csr6
|= AcceptAllMulticast
;
1056 } else if (tp
->flags
& MC_HASH_ONLY
) {
1057 /* Some work-alikes have only a 64-entry hash filter table. */
1058 /* Should verify correctness on big-endian/__powerpc__ */
1059 struct dev_mc_list
*mclist
;
1061 if (dev
->mc_count
> 64) { /* Arbitrary non-effective limit. */
1062 tp
->csr6
|= AcceptAllMulticast
;
1063 csr6
|= AcceptAllMulticast
;
1065 u32 mc_filter
[2] = {0, 0}; /* Multicast hash filter */
1067 for (i
= 0, mclist
= dev
->mc_list
; mclist
&& i
< dev
->mc_count
;
1068 i
++, mclist
= mclist
->next
) {
1069 if (tp
->flags
& COMET_MAC_ADDR
)
1070 filterbit
= ether_crc_le(ETH_ALEN
, mclist
->dmi_addr
);
1072 filterbit
= ether_crc(ETH_ALEN
, mclist
->dmi_addr
) >> 26;
1074 mc_filter
[filterbit
>> 5] |= 1 << (filterbit
& 31);
1075 if (tulip_debug
> 2)
1076 printk(KERN_INFO
"%s: Added filter for %pM"
1078 dev
->name
, mclist
->dmi_addr
,
1079 ether_crc(ETH_ALEN
, mclist
->dmi_addr
), filterbit
);
1081 if (mc_filter
[0] == tp
->mc_filter
[0] &&
1082 mc_filter
[1] == tp
->mc_filter
[1])
1084 else if (tp
->flags
& IS_ASIX
) {
1085 iowrite32(2, ioaddr
+ CSR13
);
1086 iowrite32(mc_filter
[0], ioaddr
+ CSR14
);
1087 iowrite32(3, ioaddr
+ CSR13
);
1088 iowrite32(mc_filter
[1], ioaddr
+ CSR14
);
1089 } else if (tp
->flags
& COMET_MAC_ADDR
) {
1090 iowrite32(mc_filter
[0], ioaddr
+ 0xAC);
1091 iowrite32(mc_filter
[1], ioaddr
+ 0xB0);
1093 tp
->mc_filter
[0] = mc_filter
[0];
1094 tp
->mc_filter
[1] = mc_filter
[1];
1097 unsigned long flags
;
1098 u32 tx_flags
= 0x08000000 | 192;
1100 /* Note that only the low-address shortword of setup_frame is valid!
1101 The values are doubled for big-endian architectures. */
1102 if (dev
->mc_count
> 14) { /* Must use a multicast hash table. */
1103 build_setup_frame_hash(tp
->setup_frame
, dev
);
1104 tx_flags
= 0x08400000 | 192;
1106 build_setup_frame_perfect(tp
->setup_frame
, dev
);
1109 spin_lock_irqsave(&tp
->lock
, flags
);
1111 if (tp
->cur_tx
- tp
->dirty_tx
> TX_RING_SIZE
- 2) {
1112 /* Same setup recently queued, we need not add it. */
1117 /* Now add this frame to the Tx list. */
1119 entry
= tp
->cur_tx
++ % TX_RING_SIZE
;
1122 /* Avoid a chip errata by prefixing a dummy entry. */
1123 tp
->tx_buffers
[entry
].skb
= NULL
;
1124 tp
->tx_buffers
[entry
].mapping
= 0;
1125 tp
->tx_ring
[entry
].length
=
1126 (entry
== TX_RING_SIZE
-1) ? cpu_to_le32(DESC_RING_WRAP
) : 0;
1127 tp
->tx_ring
[entry
].buffer1
= 0;
1128 /* Must set DescOwned later to avoid race with chip */
1130 entry
= tp
->cur_tx
++ % TX_RING_SIZE
;
1134 tp
->tx_buffers
[entry
].skb
= NULL
;
1135 tp
->tx_buffers
[entry
].mapping
=
1136 pci_map_single(tp
->pdev
, tp
->setup_frame
,
1137 sizeof(tp
->setup_frame
),
1139 /* Put the setup frame on the Tx list. */
1140 if (entry
== TX_RING_SIZE
-1)
1141 tx_flags
|= DESC_RING_WRAP
; /* Wrap ring. */
1142 tp
->tx_ring
[entry
].length
= cpu_to_le32(tx_flags
);
1143 tp
->tx_ring
[entry
].buffer1
=
1144 cpu_to_le32(tp
->tx_buffers
[entry
].mapping
);
1145 tp
->tx_ring
[entry
].status
= cpu_to_le32(DescOwned
);
1147 tp
->tx_ring
[dummy
].status
= cpu_to_le32(DescOwned
);
1148 if (tp
->cur_tx
- tp
->dirty_tx
>= TX_RING_SIZE
- 2)
1149 netif_stop_queue(dev
);
1151 /* Trigger an immediate transmit demand. */
1152 iowrite32(0, ioaddr
+ CSR1
);
1155 spin_unlock_irqrestore(&tp
->lock
, flags
);
1158 iowrite32(csr6
, ioaddr
+ CSR6
);
1161 #ifdef CONFIG_TULIP_MWI
1162 static void __devinit
tulip_mwi_config (struct pci_dev
*pdev
,
1163 struct net_device
*dev
)
1165 struct tulip_private
*tp
= netdev_priv(dev
);
1170 if (tulip_debug
> 3)
1171 printk(KERN_DEBUG
"%s: tulip_mwi_config()\n", pci_name(pdev
));
1173 tp
->csr0
= csr0
= 0;
1175 /* if we have any cache line size at all, we can do MRM and MWI */
1178 /* Enable MWI in the standard PCI command bit.
1179 * Check for the case where MWI is desired but not available
1181 pci_try_set_mwi(pdev
);
1183 /* read result from hardware (in case bit refused to enable) */
1184 pci_read_config_word(pdev
, PCI_COMMAND
, &pci_command
);
1185 if ((csr0
& MWI
) && (!(pci_command
& PCI_COMMAND_INVALIDATE
)))
1188 /* if cache line size hardwired to zero, no MWI */
1189 pci_read_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, &cache
);
1190 if ((csr0
& MWI
) && (cache
== 0)) {
1192 pci_clear_mwi(pdev
);
1195 /* assign per-cacheline-size cache alignment and
1196 * burst length values
1200 csr0
|= MRL
| (1 << CALShift
) | (16 << BurstLenShift
);
1203 csr0
|= MRL
| (2 << CALShift
) | (16 << BurstLenShift
);
1206 csr0
|= MRL
| (3 << CALShift
) | (32 << BurstLenShift
);
1213 /* if we have a good cache line size, we by now have a good
1214 * csr0, so save it and exit
1219 /* we don't have a good csr0 or cache line size, disable MWI */
1221 pci_clear_mwi(pdev
);
1225 /* sane defaults for burst length and cache alignment
1226 * originally from de4x5 driver
1228 csr0
|= (8 << BurstLenShift
) | (1 << CALShift
);
1232 if (tulip_debug
> 2)
1233 printk(KERN_DEBUG
"%s: MWI config cacheline=%d, csr0=%08x\n",
1234 pci_name(pdev
), cache
, csr0
);
1239 * Chips that have the MRM/reserved bit quirk and the burst quirk. That
1240 * is the DM910X and the on chip ULi devices
1243 static int tulip_uli_dm_quirk(struct pci_dev
*pdev
)
1245 if (pdev
->vendor
== 0x1282 && pdev
->device
== 0x9102)
1250 static const struct net_device_ops tulip_netdev_ops
= {
1251 .ndo_open
= tulip_open
,
1252 .ndo_start_xmit
= tulip_start_xmit
,
1253 .ndo_tx_timeout
= tulip_tx_timeout
,
1254 .ndo_stop
= tulip_close
,
1255 .ndo_get_stats
= tulip_get_stats
,
1256 .ndo_do_ioctl
= private_ioctl
,
1257 .ndo_set_multicast_list
= set_rx_mode
,
1258 .ndo_change_mtu
= eth_change_mtu
,
1259 .ndo_set_mac_address
= eth_mac_addr
,
1260 .ndo_validate_addr
= eth_validate_addr
,
1261 #ifdef CONFIG_NET_POLL_CONTROLLER
1262 .ndo_poll_controller
= poll_tulip
,
1266 static int __devinit
tulip_init_one (struct pci_dev
*pdev
,
1267 const struct pci_device_id
*ent
)
1269 struct tulip_private
*tp
;
1270 /* See note below on the multiport cards. */
1271 static unsigned char last_phys_addr
[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
1272 static struct pci_device_id early_486_chipsets
[] = {
1273 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82424
) },
1274 { PCI_DEVICE(PCI_VENDOR_ID_SI
, PCI_DEVICE_ID_SI_496
) },
1277 static int last_irq
;
1278 static int multiport_cnt
; /* For four-port boards w/one EEPROM */
1281 unsigned char *ee_data
;
1282 struct net_device
*dev
;
1283 void __iomem
*ioaddr
;
1284 static int board_idx
= -1;
1285 int chip_idx
= ent
->driver_data
;
1286 const char *chip_name
= tulip_tbl
[chip_idx
].chip_name
;
1287 unsigned int eeprom_missing
= 0;
1288 unsigned int force_csr0
= 0;
1291 static int did_version
; /* Already printed version info. */
1292 if (tulip_debug
> 0 && did_version
++ == 0)
1293 printk (KERN_INFO
"%s", version
);
1299 * Lan media wire a tulip chip to a wan interface. Needs a very
1300 * different driver (lmc driver)
1303 if (pdev
->subsystem_vendor
== PCI_VENDOR_ID_LMC
) {
1304 printk (KERN_ERR PFX
"skipping LMC card.\n");
1309 * DM910x chips should be handled by the dmfe driver, except
1310 * on-board chips on SPARC systems. Also, early DM9100s need
1311 * software CRC which only the dmfe driver supports.
1314 #ifdef CONFIG_TULIP_DM910X
1315 if (chip_idx
== DM910X
) {
1316 struct device_node
*dp
;
1318 if (pdev
->vendor
== 0x1282 && pdev
->device
== 0x9100 &&
1319 pdev
->revision
< 0x30) {
1320 printk(KERN_INFO PFX
1321 "skipping early DM9100 with Crc bug (use dmfe)\n");
1325 dp
= pci_device_to_OF_node(pdev
);
1326 if (!(dp
&& of_get_property(dp
, "local-mac-address", NULL
))) {
1327 printk(KERN_INFO PFX
1328 "skipping DM910x expansion card (use dmfe)\n");
1335 * Looks for early PCI chipsets where people report hangs
1336 * without the workarounds being on.
1339 /* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
1340 aligned. Aries might need this too. The Saturn errata are not
1341 pretty reading but thankfully it's an old 486 chipset.
1343 2. The dreaded SiS496 486 chipset. Same workaround as Intel
1347 if (pci_dev_present(early_486_chipsets
)) {
1348 csr0
= MRL
| MRM
| (8 << BurstLenShift
) | (1 << CALShift
);
1352 /* bugfix: the ASIX must have a burst limit or horrible things happen. */
1353 if (chip_idx
== AX88140
) {
1354 if ((csr0
& 0x3f00) == 0)
1358 /* PNIC doesn't have MWI/MRL/MRM... */
1359 if (chip_idx
== LC82C168
)
1360 csr0
&= ~0xfff10000; /* zero reserved bits 31:20, 16 */
1362 /* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
1363 if (tulip_uli_dm_quirk(pdev
)) {
1364 csr0
&= ~0x01f100ff;
1365 #if defined(CONFIG_SPARC)
1366 csr0
= (csr0
& ~0xff00) | 0xe000;
1370 * And back to business
1373 i
= pci_enable_device(pdev
);
1375 printk (KERN_ERR PFX
1376 "Cannot enable tulip board #%d, aborting\n",
1383 /* alloc_etherdev ensures aligned and zeroed private structures */
1384 dev
= alloc_etherdev (sizeof (*tp
));
1386 printk (KERN_ERR PFX
"ether device alloc failed, aborting\n");
1390 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1391 if (pci_resource_len (pdev
, 0) < tulip_tbl
[chip_idx
].io_size
) {
1392 printk (KERN_ERR PFX
"%s: I/O region (0x%llx@0x%llx) too small, "
1393 "aborting\n", pci_name(pdev
),
1394 (unsigned long long)pci_resource_len (pdev
, 0),
1395 (unsigned long long)pci_resource_start (pdev
, 0));
1396 goto err_out_free_netdev
;
1399 /* grab all resources from both PIO and MMIO regions, as we
1400 * don't want anyone else messing around with our hardware */
1401 if (pci_request_regions (pdev
, "tulip"))
1402 goto err_out_free_netdev
;
1404 ioaddr
= pci_iomap(pdev
, TULIP_BAR
, tulip_tbl
[chip_idx
].io_size
);
1407 goto err_out_free_res
;
1410 * initialize private data structure 'tp'
1411 * it is zeroed and aligned in alloc_etherdev
1413 tp
= netdev_priv(dev
);
1416 tp
->rx_ring
= pci_alloc_consistent(pdev
,
1417 sizeof(struct tulip_rx_desc
) * RX_RING_SIZE
+
1418 sizeof(struct tulip_tx_desc
) * TX_RING_SIZE
,
1421 goto err_out_mtable
;
1422 tp
->tx_ring
= (struct tulip_tx_desc
*)(tp
->rx_ring
+ RX_RING_SIZE
);
1423 tp
->tx_ring_dma
= tp
->rx_ring_dma
+ sizeof(struct tulip_rx_desc
) * RX_RING_SIZE
;
1425 tp
->chip_id
= chip_idx
;
1426 tp
->flags
= tulip_tbl
[chip_idx
].flags
;
1428 tp
->base_addr
= ioaddr
;
1429 tp
->revision
= pdev
->revision
;
1431 spin_lock_init(&tp
->lock
);
1432 spin_lock_init(&tp
->mii_lock
);
1433 init_timer(&tp
->timer
);
1434 tp
->timer
.data
= (unsigned long)dev
;
1435 tp
->timer
.function
= tulip_tbl
[tp
->chip_id
].media_timer
;
1437 INIT_WORK(&tp
->media_work
, tulip_tbl
[tp
->chip_id
].media_task
);
1439 dev
->base_addr
= (unsigned long)ioaddr
;
1441 #ifdef CONFIG_TULIP_MWI
1442 if (!force_csr0
&& (tp
->flags
& HAS_PCI_MWI
))
1443 tulip_mwi_config (pdev
, dev
);
1446 /* Stop the chip's Tx and Rx processes. */
1447 tulip_stop_rxtx(tp
);
1449 pci_set_master(pdev
);
1452 if (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
) {
1453 switch (pdev
->subsystem_device
) {
1462 tp
->flags
|= HAS_SWAPPED_SEEPROM
| NEEDS_FAKE_MEDIA_TABLE
;
1463 chip_name
= "GSC DS21140 Tulip";
1468 /* Clear the missed-packet counter. */
1469 ioread32(ioaddr
+ CSR8
);
1471 /* The station address ROM is read byte serially. The register must
1472 be polled, waiting for the value to be read bit serially from the
1475 ee_data
= tp
->eeprom
;
1476 memset(ee_data
, 0, sizeof(tp
->eeprom
));
1478 if (chip_idx
== LC82C168
) {
1479 for (i
= 0; i
< 3; i
++) {
1480 int value
, boguscnt
= 100000;
1481 iowrite32(0x600 | i
, ioaddr
+ 0x98);
1483 value
= ioread32(ioaddr
+ CSR9
);
1484 } while (value
< 0 && --boguscnt
> 0);
1485 put_unaligned_le16(value
, ((__le16
*)dev
->dev_addr
) + i
);
1486 sum
+= value
& 0xffff;
1488 } else if (chip_idx
== COMET
) {
1489 /* No need to read the EEPROM. */
1490 put_unaligned_le32(ioread32(ioaddr
+ 0xA4), dev
->dev_addr
);
1491 put_unaligned_le16(ioread32(ioaddr
+ 0xA8), dev
->dev_addr
+ 4);
1492 for (i
= 0; i
< 6; i
++)
1493 sum
+= dev
->dev_addr
[i
];
1495 /* A serial EEPROM interface, we read now and sort it out later. */
1497 int ee_addr_size
= tulip_read_eeprom(dev
, 0xff, 8) & 0x40000 ? 8 : 6;
1498 int ee_max_addr
= ((1 << ee_addr_size
) - 1) * sizeof(u16
);
1500 if (ee_max_addr
> sizeof(tp
->eeprom
))
1501 ee_max_addr
= sizeof(tp
->eeprom
);
1503 for (i
= 0; i
< ee_max_addr
; i
+= sizeof(u16
)) {
1504 u16 data
= tulip_read_eeprom(dev
, i
/2, ee_addr_size
);
1505 ee_data
[i
] = data
& 0xff;
1506 ee_data
[i
+ 1] = data
>> 8;
1509 /* DEC now has a specification (see Notes) but early board makers
1510 just put the address in the first EEPROM locations. */
1511 /* This does memcmp(ee_data, ee_data+16, 8) */
1512 for (i
= 0; i
< 8; i
++)
1513 if (ee_data
[i
] != ee_data
[16+i
])
1515 if (chip_idx
== CONEXANT
) {
1516 /* Check that the tuple type and length is correct. */
1517 if (ee_data
[0x198] == 0x04 && ee_data
[0x199] == 6)
1519 } else if (ee_data
[0] == 0xff && ee_data
[1] == 0xff &&
1521 sa_offset
= 2; /* Grrr, damn Matrox boards. */
1524 #ifdef CONFIG_MIPS_COBALT
1525 if ((pdev
->bus
->number
== 0) &&
1526 ((PCI_SLOT(pdev
->devfn
) == 7) ||
1527 (PCI_SLOT(pdev
->devfn
) == 12))) {
1528 /* Cobalt MAC address in first EEPROM locations. */
1530 /* Ensure our media table fixup get's applied */
1531 memcpy(ee_data
+ 16, ee_data
, 8);
1535 /* Check to see if we have a broken srom */
1536 if (ee_data
[0] == 0x61 && ee_data
[1] == 0x10) {
1537 /* pci_vendor_id and subsystem_id are swapped */
1538 ee_data
[0] = ee_data
[2];
1539 ee_data
[1] = ee_data
[3];
1543 /* HSC-PCI boards need to be byte-swaped and shifted
1544 * up 1 word. This shift needs to happen at the end
1545 * of the MAC first because of the 2 byte overlap.
1547 for (i
= 4; i
>= 0; i
-= 2) {
1548 ee_data
[17 + i
+ 3] = ee_data
[17 + i
];
1549 ee_data
[16 + i
+ 5] = ee_data
[16 + i
];
1554 for (i
= 0; i
< 6; i
++) {
1555 dev
->dev_addr
[i
] = ee_data
[i
+ sa_offset
];
1556 sum
+= ee_data
[i
+ sa_offset
];
1559 /* Lite-On boards have the address byte-swapped. */
1560 if ((dev
->dev_addr
[0] == 0xA0 || dev
->dev_addr
[0] == 0xC0 || dev
->dev_addr
[0] == 0x02)
1561 && dev
->dev_addr
[1] == 0x00)
1562 for (i
= 0; i
< 6; i
+=2) {
1563 char tmp
= dev
->dev_addr
[i
];
1564 dev
->dev_addr
[i
] = dev
->dev_addr
[i
+1];
1565 dev
->dev_addr
[i
+1] = tmp
;
1567 /* On the Zynx 315 Etherarray and other multiport boards only the
1568 first Tulip has an EEPROM.
1569 On Sparc systems the mac address is held in the OBP property
1570 "local-mac-address".
1571 The addresses of the subsequent ports are derived from the first.
1572 Many PCI BIOSes also incorrectly report the IRQ line, so we correct
1573 that here as well. */
1574 if (sum
== 0 || sum
== 6*0xff) {
1575 #if defined(CONFIG_SPARC)
1576 struct device_node
*dp
= pci_device_to_OF_node(pdev
);
1577 const unsigned char *addr
;
1581 for (i
= 0; i
< 5; i
++)
1582 dev
->dev_addr
[i
] = last_phys_addr
[i
];
1583 dev
->dev_addr
[i
] = last_phys_addr
[i
] + 1;
1584 #if defined(CONFIG_SPARC)
1585 addr
= of_get_property(dp
, "local-mac-address", &len
);
1586 if (addr
&& len
== 6)
1587 memcpy(dev
->dev_addr
, addr
, 6);
1589 #if defined(__i386__) || defined(__x86_64__) /* Patch up x86 BIOS bug. */
1595 for (i
= 0; i
< 6; i
++)
1596 last_phys_addr
[i
] = dev
->dev_addr
[i
];
1600 /* The lower four bits are the media type. */
1601 if (board_idx
>= 0 && board_idx
< MAX_UNITS
) {
1602 if (options
[board_idx
] & MEDIA_MASK
)
1603 tp
->default_port
= options
[board_idx
] & MEDIA_MASK
;
1604 if ((options
[board_idx
] & FullDuplex
) || full_duplex
[board_idx
] > 0)
1605 tp
->full_duplex
= 1;
1606 if (mtu
[board_idx
] > 0)
1607 dev
->mtu
= mtu
[board_idx
];
1609 if (dev
->mem_start
& MEDIA_MASK
)
1610 tp
->default_port
= dev
->mem_start
& MEDIA_MASK
;
1611 if (tp
->default_port
) {
1612 printk(KERN_INFO
"tulip%d: Transceiver selection forced to %s.\n",
1613 board_idx
, medianame
[tp
->default_port
& MEDIA_MASK
]);
1615 if (tulip_media_cap
[tp
->default_port
] & MediaAlwaysFD
)
1616 tp
->full_duplex
= 1;
1618 if (tp
->full_duplex
)
1619 tp
->full_duplex_lock
= 1;
1621 if (tulip_media_cap
[tp
->default_port
] & MediaIsMII
) {
1622 u16 media2advert
[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
1623 tp
->mii_advertise
= media2advert
[tp
->default_port
- 9];
1624 tp
->mii_advertise
|= (tp
->flags
& HAS_8023X
); /* Matching bits! */
1627 if (tp
->flags
& HAS_MEDIA_TABLE
) {
1628 sprintf(dev
->name
, "tulip%d", board_idx
); /* hack */
1629 tulip_parse_eeprom(dev
);
1630 strcpy(dev
->name
, "eth%d"); /* un-hack */
1633 if ((tp
->flags
& ALWAYS_CHECK_MII
) ||
1634 (tp
->mtable
&& tp
->mtable
->has_mii
) ||
1635 ( ! tp
->mtable
&& (tp
->flags
& HAS_MII
))) {
1636 if (tp
->mtable
&& tp
->mtable
->has_mii
) {
1637 for (i
= 0; i
< tp
->mtable
->leafcount
; i
++)
1638 if (tp
->mtable
->mleaf
[i
].media
== 11) {
1640 tp
->saved_if_port
= dev
->if_port
;
1641 tulip_select_media(dev
, 2);
1642 dev
->if_port
= tp
->saved_if_port
;
1647 /* Find the connected MII xcvrs.
1648 Doing this in open() would allow detecting external xcvrs
1649 later, but takes much time. */
1650 tulip_find_mii (dev
, board_idx
);
1653 /* The Tulip-specific entries in the device structure. */
1654 dev
->netdev_ops
= &tulip_netdev_ops
;
1655 dev
->watchdog_timeo
= TX_TIMEOUT
;
1656 #ifdef CONFIG_TULIP_NAPI
1657 netif_napi_add(dev
, &tp
->napi
, tulip_poll
, 16);
1659 SET_ETHTOOL_OPS(dev
, &ops
);
1661 if (register_netdev(dev
))
1662 goto err_out_free_ring
;
1664 printk(KERN_INFO
"%s: %s rev %d at "
1665 #ifdef CONFIG_TULIP_MMIO
1670 " %#llx,", dev
->name
, chip_name
, pdev
->revision
,
1671 (unsigned long long) pci_resource_start(pdev
, TULIP_BAR
));
1672 pci_set_drvdata(pdev
, dev
);
1675 printk(" EEPROM not present,");
1676 printk(" %pM", dev
->dev_addr
);
1677 printk(", IRQ %d.\n", irq
);
1679 if (tp
->chip_id
== PNIC2
)
1680 tp
->link_change
= pnic2_lnk_change
;
1681 else if (tp
->flags
& HAS_NWAY
)
1682 tp
->link_change
= t21142_lnk_change
;
1683 else if (tp
->flags
& HAS_PNICNWAY
)
1684 tp
->link_change
= pnic_lnk_change
;
1686 /* Reset the xcvr interface and turn on heartbeat. */
1692 iowrite32(tp
->mtable
->csr12dir
| 0x100, ioaddr
+ CSR12
);
1695 if (tp
->mii_cnt
|| tulip_media_cap
[dev
->if_port
] & MediaIsMII
) {
1696 iowrite32(csr6_mask_defstate
, ioaddr
+ CSR6
);
1697 iowrite32(0x0000, ioaddr
+ CSR13
);
1698 iowrite32(0x0000, ioaddr
+ CSR14
);
1699 iowrite32(csr6_mask_hdcap
, ioaddr
+ CSR6
);
1701 t21142_start_nway(dev
);
1704 /* just do a reset for sanity sake */
1705 iowrite32(0x0000, ioaddr
+ CSR13
);
1706 iowrite32(0x0000, ioaddr
+ CSR14
);
1709 if ( ! tp
->mii_cnt
) {
1712 iowrite32(csr6_ttm
| csr6_ca
, ioaddr
+ CSR6
);
1713 iowrite32(0x30, ioaddr
+ CSR12
);
1714 iowrite32(0x0001F078, ioaddr
+ CSR6
);
1715 iowrite32(0x0201F078, ioaddr
+ CSR6
); /* Turn on autonegotiation. */
1720 iowrite32(0x00000000, ioaddr
+ CSR6
);
1721 iowrite32(0x000711C0, ioaddr
+ CSR14
); /* Turn on NWay. */
1722 iowrite32(0x00000001, ioaddr
+ CSR13
);
1726 iowrite32(0x01a80000, ioaddr
+ CSR6
);
1727 iowrite32(0xFFFFFFFF, ioaddr
+ CSR14
);
1728 iowrite32(0x00001000, ioaddr
+ CSR12
);
1731 /* No initialization necessary. */
1735 /* put the chip in snooze mode until opened */
1736 tulip_set_power_state (tp
, 0, 1);
1741 pci_free_consistent (pdev
,
1742 sizeof (struct tulip_rx_desc
) * RX_RING_SIZE
+
1743 sizeof (struct tulip_tx_desc
) * TX_RING_SIZE
,
1744 tp
->rx_ring
, tp
->rx_ring_dma
);
1748 pci_iounmap(pdev
, ioaddr
);
1751 pci_release_regions (pdev
);
1753 err_out_free_netdev
:
1761 static int tulip_suspend (struct pci_dev
*pdev
, pm_message_t state
)
1763 struct net_device
*dev
= pci_get_drvdata(pdev
);
1768 if (!netif_running(dev
))
1773 netif_device_detach(dev
);
1774 free_irq(dev
->irq
, dev
);
1777 pci_save_state(pdev
);
1778 pci_disable_device(pdev
);
1779 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
1785 static int tulip_resume(struct pci_dev
*pdev
)
1787 struct net_device
*dev
= pci_get_drvdata(pdev
);
1793 pci_set_power_state(pdev
, PCI_D0
);
1794 pci_restore_state(pdev
);
1796 if (!netif_running(dev
))
1799 if ((retval
= pci_enable_device(pdev
))) {
1800 printk (KERN_ERR
"tulip: pci_enable_device failed in resume\n");
1804 if ((retval
= request_irq(dev
->irq
, &tulip_interrupt
, IRQF_SHARED
, dev
->name
, dev
))) {
1805 printk (KERN_ERR
"tulip: request_irq failed in resume\n");
1809 netif_device_attach(dev
);
1811 if (netif_running(dev
))
1817 #endif /* CONFIG_PM */
1820 static void __devexit
tulip_remove_one (struct pci_dev
*pdev
)
1822 struct net_device
*dev
= pci_get_drvdata (pdev
);
1823 struct tulip_private
*tp
;
1828 tp
= netdev_priv(dev
);
1829 unregister_netdev(dev
);
1830 pci_free_consistent (pdev
,
1831 sizeof (struct tulip_rx_desc
) * RX_RING_SIZE
+
1832 sizeof (struct tulip_tx_desc
) * TX_RING_SIZE
,
1833 tp
->rx_ring
, tp
->rx_ring_dma
);
1835 pci_iounmap(pdev
, tp
->base_addr
);
1837 pci_release_regions (pdev
);
1838 pci_set_drvdata (pdev
, NULL
);
1840 /* pci_power_off (pdev, -1); */
1843 #ifdef CONFIG_NET_POLL_CONTROLLER
1845 * Polling 'interrupt' - used by things like netconsole to send skbs
1846 * without having to re-enable interrupts. It's not called while
1847 * the interrupt routine is executing.
1850 static void poll_tulip (struct net_device
*dev
)
1852 /* disable_irq here is not very nice, but with the lockless
1853 interrupt handler we have no other choice. */
1854 disable_irq(dev
->irq
);
1855 tulip_interrupt (dev
->irq
, dev
);
1856 enable_irq(dev
->irq
);
1860 static struct pci_driver tulip_driver
= {
1862 .id_table
= tulip_pci_tbl
,
1863 .probe
= tulip_init_one
,
1864 .remove
= __devexit_p(tulip_remove_one
),
1866 .suspend
= tulip_suspend
,
1867 .resume
= tulip_resume
,
1868 #endif /* CONFIG_PM */
1872 static int __init
tulip_init (void)
1875 printk (KERN_INFO
"%s", version
);
1878 /* copy module parms into globals */
1879 tulip_rx_copybreak
= rx_copybreak
;
1880 tulip_max_interrupt_work
= max_interrupt_work
;
1882 /* probe for and init boards */
1883 return pci_register_driver(&tulip_driver
);
1887 static void __exit
tulip_cleanup (void)
1889 pci_unregister_driver (&tulip_driver
);
1893 module_init(tulip_init
);
1894 module_exit(tulip_cleanup
);