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initial commit with v2.6.32.60
[linux-2.6.32.60-moxart.git] / drivers / net / usb / asix.c
blobe794b3935cf4b768b18d707d8710063ce408c4e7
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37
38 #define DRIVER_VERSION "14-Jun-2006"
39 static const char driver_name [] = "asix";
40
41 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
42
43 #define AX_CMD_SET_SW_MII 0x06
44 #define AX_CMD_READ_MII_REG 0x07
45 #define AX_CMD_WRITE_MII_REG 0x08
46 #define AX_CMD_SET_HW_MII 0x0a
47 #define AX_CMD_READ_EEPROM 0x0b
48 #define AX_CMD_WRITE_EEPROM 0x0c
49 #define AX_CMD_WRITE_ENABLE 0x0d
50 #define AX_CMD_WRITE_DISABLE 0x0e
51 #define AX_CMD_READ_RX_CTL 0x0f
52 #define AX_CMD_WRITE_RX_CTL 0x10
53 #define AX_CMD_READ_IPG012 0x11
54 #define AX_CMD_WRITE_IPG0 0x12
55 #define AX_CMD_WRITE_IPG1 0x13
56 #define AX_CMD_READ_NODE_ID 0x13
57 #define AX_CMD_WRITE_NODE_ID 0x14
58 #define AX_CMD_WRITE_IPG2 0x14
59 #define AX_CMD_WRITE_MULTI_FILTER 0x16
60 #define AX88172_CMD_READ_NODE_ID 0x17
61 #define AX_CMD_READ_PHY_ID 0x19
62 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
63 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
64 #define AX_CMD_READ_MONITOR_MODE 0x1c
65 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
66 #define AX_CMD_READ_GPIOS 0x1e
67 #define AX_CMD_WRITE_GPIOS 0x1f
68 #define AX_CMD_SW_RESET 0x20
69 #define AX_CMD_SW_PHY_STATUS 0x21
70 #define AX_CMD_SW_PHY_SELECT 0x22
71
72 #define AX_MONITOR_MODE 0x01
73 #define AX_MONITOR_LINK 0x02
74 #define AX_MONITOR_MAGIC 0x04
75 #define AX_MONITOR_HSFS 0x10
76
77 /* AX88172 Medium Status Register values */
78 #define AX88172_MEDIUM_FD 0x02
79 #define AX88172_MEDIUM_TX 0x04
80 #define AX88172_MEDIUM_FC 0x10
81 #define AX88172_MEDIUM_DEFAULT \
82 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
83
84 #define AX_MCAST_FILTER_SIZE 8
85 #define AX_MAX_MCAST 64
86
87 #define AX_SWRESET_CLEAR 0x00
88 #define AX_SWRESET_RR 0x01
89 #define AX_SWRESET_RT 0x02
90 #define AX_SWRESET_PRTE 0x04
91 #define AX_SWRESET_PRL 0x08
92 #define AX_SWRESET_BZ 0x10
93 #define AX_SWRESET_IPRL 0x20
94 #define AX_SWRESET_IPPD 0x40
95
96 #define AX88772_IPG0_DEFAULT 0x15
97 #define AX88772_IPG1_DEFAULT 0x0c
98 #define AX88772_IPG2_DEFAULT 0x12
99
100 /* AX88772 & AX88178 Medium Mode Register */
101 #define AX_MEDIUM_PF 0x0080
102 #define AX_MEDIUM_JFE 0x0040
103 #define AX_MEDIUM_TFC 0x0020
104 #define AX_MEDIUM_RFC 0x0010
105 #define AX_MEDIUM_ENCK 0x0008
106 #define AX_MEDIUM_AC 0x0004
107 #define AX_MEDIUM_FD 0x0002
108 #define AX_MEDIUM_GM 0x0001
109 #define AX_MEDIUM_SM 0x1000
110 #define AX_MEDIUM_SBP 0x0800
111 #define AX_MEDIUM_PS 0x0200
112 #define AX_MEDIUM_RE 0x0100
113
114 #define AX88178_MEDIUM_DEFAULT \
115 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
116 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
117 AX_MEDIUM_RE )
118
119 #define AX88772_MEDIUM_DEFAULT \
120 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
121 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
122 AX_MEDIUM_AC | AX_MEDIUM_RE )
123
124 /* AX88772 & AX88178 RX_CTL values */
125 #define AX_RX_CTL_SO 0x0080
126 #define AX_RX_CTL_AP 0x0020
127 #define AX_RX_CTL_AM 0x0010
128 #define AX_RX_CTL_AB 0x0008
129 #define AX_RX_CTL_SEP 0x0004
130 #define AX_RX_CTL_AMALL 0x0002
131 #define AX_RX_CTL_PRO 0x0001
132 #define AX_RX_CTL_MFB_2048 0x0000
133 #define AX_RX_CTL_MFB_4096 0x0100
134 #define AX_RX_CTL_MFB_8192 0x0200
135 #define AX_RX_CTL_MFB_16384 0x0300
136
137 #define AX_DEFAULT_RX_CTL \
138 (AX_RX_CTL_SO | AX_RX_CTL_AB )
139
140 /* GPIO 0 .. 2 toggles */
141 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
142 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
143 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
144 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
145 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
146 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
147 #define AX_GPIO_RESERVED 0x40 /* Reserved */
148 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
149
150 #define AX_EEPROM_MAGIC 0xdeadbeef
151 #define AX88172_EEPROM_LEN 0x40
152 #define AX88772_EEPROM_LEN 0xff
153
154 #define PHY_MODE_MARVELL 0x0000
155 #define MII_MARVELL_LED_CTRL 0x0018
156 #define MII_MARVELL_STATUS 0x001b
157 #define MII_MARVELL_CTRL 0x0014
158
159 #define MARVELL_LED_MANUAL 0x0019
160
161 #define MARVELL_STATUS_HWCFG 0x0004
162
163 #define MARVELL_CTRL_TXDELAY 0x0002
164 #define MARVELL_CTRL_RXDELAY 0x0080
165
166 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
167 struct asix_data {
168 u8 multi_filter[AX_MCAST_FILTER_SIZE];
169 u8 mac_addr[ETH_ALEN];
170 u8 phymode;
171 u8 ledmode;
172 u8 eeprom_len;
173 };
174
175 struct ax88172_int_data {
176 __le16 res1;
177 u8 link;
178 __le16 res2;
179 u8 status;
180 __le16 res3;
181 } __attribute__ ((packed));
182
183 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
184 u16 size, void *data)
185 {
186 void *buf;
187 int err = -ENOMEM;
188
189 devdbg(dev,"asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
190 cmd, value, index, size);
191
192 buf = kmalloc(size, GFP_KERNEL);
193 if (!buf)
194 goto out;
195
196 err = usb_control_msg(
197 dev->udev,
198 usb_rcvctrlpipe(dev->udev, 0),
199 cmd,
200 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
201 value,
202 index,
203 buf,
204 size,
205 USB_CTRL_GET_TIMEOUT);
206 if (err == size)
207 memcpy(data, buf, size);
208 else if (err >= 0)
209 err = -EINVAL;
210 kfree(buf);
211
212 out:
213 return err;
214 }
215
216 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
217 u16 size, void *data)
218 {
219 void *buf = NULL;
220 int err = -ENOMEM;
221
222 devdbg(dev,"asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
223 cmd, value, index, size);
224
225 if (data) {
226 buf = kmalloc(size, GFP_KERNEL);
227 if (!buf)
228 goto out;
229 memcpy(buf, data, size);
230 }
231
232 err = usb_control_msg(
233 dev->udev,
234 usb_sndctrlpipe(dev->udev, 0),
235 cmd,
236 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
237 value,
238 index,
239 buf,
240 size,
241 USB_CTRL_SET_TIMEOUT);
242 kfree(buf);
243
244 out:
245 return err;
246 }
247
248 static void asix_async_cmd_callback(struct urb *urb)
249 {
250 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
251 int status = urb->status;
252
253 if (status < 0)
254 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
255 status);
256
257 kfree(req);
258 usb_free_urb(urb);
259 }
260
261 static void
262 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
263 u16 size, void *data)
264 {
265 struct usb_ctrlrequest *req;
266 int status;
267 struct urb *urb;
268
269 devdbg(dev,"asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
270 cmd, value, index, size);
271 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
272 deverr(dev, "Error allocating URB in write_cmd_async!");
273 return;
274 }
275
276 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
277 deverr(dev, "Failed to allocate memory for control request");
278 usb_free_urb(urb);
279 return;
280 }
281
282 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
283 req->bRequest = cmd;
284 req->wValue = cpu_to_le16(value);
285 req->wIndex = cpu_to_le16(index);
286 req->wLength = cpu_to_le16(size);
287
288 usb_fill_control_urb(urb, dev->udev,
289 usb_sndctrlpipe(dev->udev, 0),
290 (void *)req, data, size,
291 asix_async_cmd_callback, req);
292
293 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
294 deverr(dev, "Error submitting the control message: status=%d",
295 status);
296 kfree(req);
297 usb_free_urb(urb);
298 }
299 }
300
301 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
302 {
303 u8 *head;
304 u32 header;
305 char *packet;
306 struct sk_buff *ax_skb;
307 u16 size;
308
309 head = (u8 *) skb->data;
310 memcpy(&header, head, sizeof(header));
311 le32_to_cpus(&header);
312 packet = head + sizeof(header);
313
314 skb_pull(skb, 4);
315
316 while (skb->len > 0) {
317 if ((short)(header & 0x0000ffff) !=
318 ~((short)((header & 0xffff0000) >> 16))) {
319 deverr(dev,"asix_rx_fixup() Bad Header Length");
320 }
321 /* get the packet length */
322 size = (u16) (header & 0x0000ffff);
323
324 if ((skb->len) - ((size + 1) & 0xfffe) == 0)
325 return 2;
326 if (size > ETH_FRAME_LEN) {
327 deverr(dev,"asix_rx_fixup() Bad RX Length %d", size);
328 return 0;
329 }
330 ax_skb = skb_clone(skb, GFP_ATOMIC);
331 if (ax_skb) {
332 ax_skb->len = size;
333 ax_skb->data = packet;
334 skb_set_tail_pointer(ax_skb, size);
335 usbnet_skb_return(dev, ax_skb);
336 } else {
337 return 0;
338 }
339
340 skb_pull(skb, (size + 1) & 0xfffe);
341
342 if (skb->len < sizeof(header))
343 break;
344
345 head = (u8 *) skb->data;
346 memcpy(&header, head, sizeof(header));
347 le32_to_cpus(&header);
348 packet = head + sizeof(header);
349 skb_pull(skb, 4);
350 }
351
352 if (skb->len < 0) {
353 deverr(dev,"asix_rx_fixup() Bad SKB Length %d", skb->len);
354 return 0;
355 }
356 return 1;
357 }
358
359 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
360 gfp_t flags)
361 {
362 int padlen;
363 int headroom = skb_headroom(skb);
364 int tailroom = skb_tailroom(skb);
365 u32 packet_len;
366 u32 padbytes = 0xffff0000;
367
368 padlen = ((skb->len + 4) % 512) ? 0 : 4;
369
370 if ((!skb_cloned(skb))
371 && ((headroom + tailroom) >= (4 + padlen))) {
372 if ((headroom < 4) || (tailroom < padlen)) {
373 skb->data = memmove(skb->head + 4, skb->data, skb->len);
374 skb_set_tail_pointer(skb, skb->len);
375 }
376 } else {
377 struct sk_buff *skb2;
378 skb2 = skb_copy_expand(skb, 4, padlen, flags);
379 dev_kfree_skb_any(skb);
380 skb = skb2;
381 if (!skb)
382 return NULL;
383 }
384
385 skb_push(skb, 4);
386 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
387 cpu_to_le32s(&packet_len);
388 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
389
390 if ((skb->len % 512) == 0) {
391 cpu_to_le32s(&padbytes);
392 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
393 skb_put(skb, sizeof(padbytes));
394 }
395 return skb;
396 }
397
398 static void asix_status(struct usbnet *dev, struct urb *urb)
399 {
400 struct ax88172_int_data *event;
401 int link;
402
403 if (urb->actual_length < 8)
404 return;
405
406 event = urb->transfer_buffer;
407 link = event->link & 0x01;
408 if (netif_carrier_ok(dev->net) != link) {
409 if (link) {
410 netif_carrier_on(dev->net);
411 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
412 } else
413 netif_carrier_off(dev->net);
414 devdbg(dev, "Link Status is: %d", link);
415 }
416 }
417
418 static inline int asix_set_sw_mii(struct usbnet *dev)
419 {
420 int ret;
421 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
422 if (ret < 0)
423 deverr(dev, "Failed to enable software MII access");
424 return ret;
425 }
426
427 static inline int asix_set_hw_mii(struct usbnet *dev)
428 {
429 int ret;
430 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
431 if (ret < 0)
432 deverr(dev, "Failed to enable hardware MII access");
433 return ret;
434 }
435
436 static inline int asix_get_phy_addr(struct usbnet *dev)
437 {
438 u8 buf[2];
439 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
440
441 devdbg(dev, "asix_get_phy_addr()");
442
443 if (ret < 0) {
444 deverr(dev, "Error reading PHYID register: %02x", ret);
445 goto out;
446 }
447 devdbg(dev, "asix_get_phy_addr() returning 0x%04x", *((__le16 *)buf));
448 ret = buf[1];
449
450 out:
451 return ret;
452 }
453
454 static int asix_sw_reset(struct usbnet *dev, u8 flags)
455 {
456 int ret;
457
458 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
459 if (ret < 0)
460 deverr(dev,"Failed to send software reset: %02x", ret);
461
462 return ret;
463 }
464
465 static u16 asix_read_rx_ctl(struct usbnet *dev)
466 {
467 __le16 v;
468 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
469
470 if (ret < 0) {
471 deverr(dev, "Error reading RX_CTL register: %02x", ret);
472 goto out;
473 }
474 ret = le16_to_cpu(v);
475 out:
476 return ret;
477 }
478
479 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
480 {
481 int ret;
482
483 devdbg(dev,"asix_write_rx_ctl() - mode = 0x%04x", mode);
484 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
485 if (ret < 0)
486 deverr(dev, "Failed to write RX_CTL mode to 0x%04x: %02x",
487 mode, ret);
488
489 return ret;
490 }
491
492 static u16 asix_read_medium_status(struct usbnet *dev)
493 {
494 __le16 v;
495 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
496
497 if (ret < 0) {
498 deverr(dev, "Error reading Medium Status register: %02x", ret);
499 goto out;
500 }
501 ret = le16_to_cpu(v);
502 out:
503 return ret;
504 }
505
506 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
507 {
508 int ret;
509
510 devdbg(dev,"asix_write_medium_mode() - mode = 0x%04x", mode);
511 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
512 if (ret < 0)
513 deverr(dev, "Failed to write Medium Mode mode to 0x%04x: %02x",
514 mode, ret);
515
516 return ret;
517 }
518
519 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
520 {
521 int ret;
522
523 devdbg(dev,"asix_write_gpio() - value = 0x%04x", value);
524 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
525 if (ret < 0)
526 deverr(dev, "Failed to write GPIO value 0x%04x: %02x",
527 value, ret);
528
529 if (sleep)
530 msleep(sleep);
531
532 return ret;
533 }
534
535 /*
536 * AX88772 & AX88178 have a 16-bit RX_CTL value
537 */
538 static void asix_set_multicast(struct net_device *net)
539 {
540 struct usbnet *dev = netdev_priv(net);
541 struct asix_data *data = (struct asix_data *)&dev->data;
542 u16 rx_ctl = AX_DEFAULT_RX_CTL;
543
544 if (net->flags & IFF_PROMISC) {
545 rx_ctl |= AX_RX_CTL_PRO;
546 } else if (net->flags & IFF_ALLMULTI
547 || net->mc_count > AX_MAX_MCAST) {
548 rx_ctl |= AX_RX_CTL_AMALL;
549 } else if (net->mc_count == 0) {
550 /* just broadcast and directed */
551 } else {
552 /* We use the 20 byte dev->data
553 * for our 8 byte filter buffer
554 * to avoid allocating memory that
555 * is tricky to free later */
556 struct dev_mc_list *mc_list = net->mc_list;
557 u32 crc_bits;
558 int i;
559
560 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
561
562 /* Build the multicast hash filter. */
563 for (i = 0; i < net->mc_count; i++) {
564 crc_bits =
565 ether_crc(ETH_ALEN,
566 mc_list->dmi_addr) >> 26;
567 data->multi_filter[crc_bits >> 3] |=
568 1 << (crc_bits & 7);
569 mc_list = mc_list->next;
570 }
571
572 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
573 AX_MCAST_FILTER_SIZE, data->multi_filter);
574
575 rx_ctl |= AX_RX_CTL_AM;
576 }
577
578 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
579 }
580
581 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
582 {
583 struct usbnet *dev = netdev_priv(netdev);
584 __le16 res;
585
586 mutex_lock(&dev->phy_mutex);
587 asix_set_sw_mii(dev);
588 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
589 (__u16)loc, 2, &res);
590 asix_set_hw_mii(dev);
591 mutex_unlock(&dev->phy_mutex);
592
593 devdbg(dev, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x", phy_id, loc, le16_to_cpu(res));
594
595 return le16_to_cpu(res);
596 }
597
598 static void
599 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
600 {
601 struct usbnet *dev = netdev_priv(netdev);
602 __le16 res = cpu_to_le16(val);
603
604 devdbg(dev, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x", phy_id, loc, val);
605 mutex_lock(&dev->phy_mutex);
606 asix_set_sw_mii(dev);
607 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
608 asix_set_hw_mii(dev);
609 mutex_unlock(&dev->phy_mutex);
610 }
611
612 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
613 static u32 asix_get_phyid(struct usbnet *dev)
614 {
615 int phy_reg;
616 u32 phy_id;
617
618 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
619 if (phy_reg < 0)
620 return 0;
621
622 phy_id = (phy_reg & 0xffff) << 16;
623
624 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
625 if (phy_reg < 0)
626 return 0;
627
628 phy_id |= (phy_reg & 0xffff);
629
630 return phy_id;
631 }
632
633 static void
634 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
635 {
636 struct usbnet *dev = netdev_priv(net);
637 u8 opt;
638
639 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
640 wolinfo->supported = 0;
641 wolinfo->wolopts = 0;
642 return;
643 }
644 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
645 wolinfo->wolopts = 0;
646 if (opt & AX_MONITOR_MODE) {
647 if (opt & AX_MONITOR_LINK)
648 wolinfo->wolopts |= WAKE_PHY;
649 if (opt & AX_MONITOR_MAGIC)
650 wolinfo->wolopts |= WAKE_MAGIC;
651 }
652 }
653
654 static int
655 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
656 {
657 struct usbnet *dev = netdev_priv(net);
658 u8 opt = 0;
659
660 if (wolinfo->wolopts & WAKE_PHY)
661 opt |= AX_MONITOR_LINK;
662 if (wolinfo->wolopts & WAKE_MAGIC)
663 opt |= AX_MONITOR_MAGIC;
664 if (opt != 0)
665 opt |= AX_MONITOR_MODE;
666
667 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
668 opt, 0, 0, NULL) < 0)
669 return -EINVAL;
670
671 return 0;
672 }
673
674 static int asix_get_eeprom_len(struct net_device *net)
675 {
676 struct usbnet *dev = netdev_priv(net);
677 struct asix_data *data = (struct asix_data *)&dev->data;
678
679 return data->eeprom_len;
680 }
681
682 static int asix_get_eeprom(struct net_device *net,
683 struct ethtool_eeprom *eeprom, u8 *data)
684 {
685 struct usbnet *dev = netdev_priv(net);
686 __le16 *ebuf = (__le16 *)data;
687 int i;
688
689 /* Crude hack to ensure that we don't overwrite memory
690 * if an odd length is supplied
691 */
692 if (eeprom->len % 2)
693 return -EINVAL;
694
695 eeprom->magic = AX_EEPROM_MAGIC;
696
697 /* ax8817x returns 2 bytes from eeprom on read */
698 for (i=0; i < eeprom->len / 2; i++) {
699 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
700 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
701 return -EINVAL;
702 }
703 return 0;
704 }
705
706 static void asix_get_drvinfo (struct net_device *net,
707 struct ethtool_drvinfo *info)
708 {
709 struct usbnet *dev = netdev_priv(net);
710 struct asix_data *data = (struct asix_data *)&dev->data;
711
712 /* Inherit standard device info */
713 usbnet_get_drvinfo(net, info);
714 strncpy (info->driver, driver_name, sizeof info->driver);
715 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
716 info->eedump_len = data->eeprom_len;
717 }
718
719 static u32 asix_get_link(struct net_device *net)
720 {
721 struct usbnet *dev = netdev_priv(net);
722
723 return mii_link_ok(&dev->mii);
724 }
725
726 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
727 {
728 struct usbnet *dev = netdev_priv(net);
729
730 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
731 }
732
733 static int asix_set_mac_address(struct net_device *net, void *p)
734 {
735 struct usbnet *dev = netdev_priv(net);
736 struct asix_data *data = (struct asix_data *)&dev->data;
737 struct sockaddr *addr = p;
738
739 if (netif_running(net))
740 return -EBUSY;
741 if (!is_valid_ether_addr(addr->sa_data))
742 return -EADDRNOTAVAIL;
743
744 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
745
746 /* We use the 20 byte dev->data
747 * for our 6 byte mac buffer
748 * to avoid allocating memory that
749 * is tricky to free later */
750 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
751 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
752 data->mac_addr);
753
754 return 0;
755 }
756
757 /* We need to override some ethtool_ops so we require our
758 own structure so we don't interfere with other usbnet
759 devices that may be connected at the same time. */
760 static const struct ethtool_ops ax88172_ethtool_ops = {
761 .get_drvinfo = asix_get_drvinfo,
762 .get_link = asix_get_link,
763 .get_msglevel = usbnet_get_msglevel,
764 .set_msglevel = usbnet_set_msglevel,
765 .get_wol = asix_get_wol,
766 .set_wol = asix_set_wol,
767 .get_eeprom_len = asix_get_eeprom_len,
768 .get_eeprom = asix_get_eeprom,
769 .get_settings = usbnet_get_settings,
770 .set_settings = usbnet_set_settings,
771 .nway_reset = usbnet_nway_reset,
772 };
773
774 static void ax88172_set_multicast(struct net_device *net)
775 {
776 struct usbnet *dev = netdev_priv(net);
777 struct asix_data *data = (struct asix_data *)&dev->data;
778 u8 rx_ctl = 0x8c;
779
780 if (net->flags & IFF_PROMISC) {
781 rx_ctl |= 0x01;
782 } else if (net->flags & IFF_ALLMULTI
783 || net->mc_count > AX_MAX_MCAST) {
784 rx_ctl |= 0x02;
785 } else if (net->mc_count == 0) {
786 /* just broadcast and directed */
787 } else {
788 /* We use the 20 byte dev->data
789 * for our 8 byte filter buffer
790 * to avoid allocating memory that
791 * is tricky to free later */
792 struct dev_mc_list *mc_list = net->mc_list;
793 u32 crc_bits;
794 int i;
795
796 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
797
798 /* Build the multicast hash filter. */
799 for (i = 0; i < net->mc_count; i++) {
800 crc_bits =
801 ether_crc(ETH_ALEN,
802 mc_list->dmi_addr) >> 26;
803 data->multi_filter[crc_bits >> 3] |=
804 1 << (crc_bits & 7);
805 mc_list = mc_list->next;
806 }
807
808 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
809 AX_MCAST_FILTER_SIZE, data->multi_filter);
810
811 rx_ctl |= 0x10;
812 }
813
814 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
815 }
816
817 static int ax88172_link_reset(struct usbnet *dev)
818 {
819 u8 mode;
820 struct ethtool_cmd ecmd;
821
822 mii_check_media(&dev->mii, 1, 1);
823 mii_ethtool_gset(&dev->mii, &ecmd);
824 mode = AX88172_MEDIUM_DEFAULT;
825
826 if (ecmd.duplex != DUPLEX_FULL)
827 mode |= ~AX88172_MEDIUM_FD;
828
829 devdbg(dev, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
830
831 asix_write_medium_mode(dev, mode);
832
833 return 0;
834 }
835
836 static const struct net_device_ops ax88172_netdev_ops = {
837 .ndo_open = usbnet_open,
838 .ndo_stop = usbnet_stop,
839 .ndo_start_xmit = usbnet_start_xmit,
840 .ndo_tx_timeout = usbnet_tx_timeout,
841 .ndo_change_mtu = usbnet_change_mtu,
842 .ndo_set_mac_address = eth_mac_addr,
843 .ndo_validate_addr = eth_validate_addr,
844 .ndo_do_ioctl = asix_ioctl,
845 .ndo_set_multicast_list = ax88172_set_multicast,
846 };
847
848 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
849 {
850 int ret = 0;
851 u8 buf[ETH_ALEN];
852 int i;
853 unsigned long gpio_bits = dev->driver_info->data;
854 struct asix_data *data = (struct asix_data *)&dev->data;
855
856 data->eeprom_len = AX88172_EEPROM_LEN;
857
858 usbnet_get_endpoints(dev,intf);
859
860 /* Toggle the GPIOs in a manufacturer/model specific way */
861 for (i = 2; i >= 0; i--) {
862 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
863 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
864 NULL)) < 0)
865 goto out;
866 msleep(5);
867 }
868
869 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
870 goto out;
871
872 /* Get the MAC address */
873 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
874 0, 0, ETH_ALEN, buf)) < 0) {
875 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
876 goto out;
877 }
878 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
879
880 /* Initialize MII structure */
881 dev->mii.dev = dev->net;
882 dev->mii.mdio_read = asix_mdio_read;
883 dev->mii.mdio_write = asix_mdio_write;
884 dev->mii.phy_id_mask = 0x3f;
885 dev->mii.reg_num_mask = 0x1f;
886 dev->mii.phy_id = asix_get_phy_addr(dev);
887
888 dev->net->netdev_ops = &ax88172_netdev_ops;
889 dev->net->ethtool_ops = &ax88172_ethtool_ops;
890
891 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
892 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
893 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
894 mii_nway_restart(&dev->mii);
895
896 return 0;
897
898 out:
899 return ret;
900 }
901
902 static const struct ethtool_ops ax88772_ethtool_ops = {
903 .get_drvinfo = asix_get_drvinfo,
904 .get_link = asix_get_link,
905 .get_msglevel = usbnet_get_msglevel,
906 .set_msglevel = usbnet_set_msglevel,
907 .get_wol = asix_get_wol,
908 .set_wol = asix_set_wol,
909 .get_eeprom_len = asix_get_eeprom_len,
910 .get_eeprom = asix_get_eeprom,
911 .get_settings = usbnet_get_settings,
912 .set_settings = usbnet_set_settings,
913 .nway_reset = usbnet_nway_reset,
914 };
915
916 static int ax88772_link_reset(struct usbnet *dev)
917 {
918 u16 mode;
919 struct ethtool_cmd ecmd;
920
921 mii_check_media(&dev->mii, 1, 1);
922 mii_ethtool_gset(&dev->mii, &ecmd);
923 mode = AX88772_MEDIUM_DEFAULT;
924
925 if (ecmd.speed != SPEED_100)
926 mode &= ~AX_MEDIUM_PS;
927
928 if (ecmd.duplex != DUPLEX_FULL)
929 mode &= ~AX_MEDIUM_FD;
930
931 devdbg(dev, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
932
933 asix_write_medium_mode(dev, mode);
934
935 return 0;
936 }
937
938 static const struct net_device_ops ax88772_netdev_ops = {
939 .ndo_open = usbnet_open,
940 .ndo_stop = usbnet_stop,
941 .ndo_start_xmit = usbnet_start_xmit,
942 .ndo_tx_timeout = usbnet_tx_timeout,
943 .ndo_change_mtu = usbnet_change_mtu,
944 .ndo_set_mac_address = asix_set_mac_address,
945 .ndo_validate_addr = eth_validate_addr,
946 .ndo_do_ioctl = asix_ioctl,
947 .ndo_set_multicast_list = asix_set_multicast,
948 };
949
950 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
951 {
952 int ret, embd_phy;
953 u16 rx_ctl;
954 struct asix_data *data = (struct asix_data *)&dev->data;
955 u8 buf[ETH_ALEN];
956 u32 phyid;
957
958 data->eeprom_len = AX88772_EEPROM_LEN;
959
960 usbnet_get_endpoints(dev,intf);
961
962 if ((ret = asix_write_gpio(dev,
963 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
964 goto out;
965
966 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
967 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
968 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
969 embd_phy, 0, 0, NULL)) < 0) {
970 dbg("Select PHY #1 failed: %d", ret);
971 goto out;
972 }
973
974 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
975 goto out;
976
977 msleep(150);
978 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
979 goto out;
980
981 msleep(150);
982 if (embd_phy) {
983 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
984 goto out;
985 }
986 else {
987 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
988 goto out;
989 }
990
991 msleep(150);
992 rx_ctl = asix_read_rx_ctl(dev);
993 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
994 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
995 goto out;
996
997 rx_ctl = asix_read_rx_ctl(dev);
998 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
999
1000 /* Get the MAC address */
1001 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1002 0, 0, ETH_ALEN, buf)) < 0) {
1003 dbg("Failed to read MAC address: %d", ret);
1004 goto out;
1005 }
1006 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1007
1008 /* Initialize MII structure */
1009 dev->mii.dev = dev->net;
1010 dev->mii.mdio_read = asix_mdio_read;
1011 dev->mii.mdio_write = asix_mdio_write;
1012 dev->mii.phy_id_mask = 0x1f;
1013 dev->mii.reg_num_mask = 0x1f;
1014 dev->mii.phy_id = asix_get_phy_addr(dev);
1015
1016 phyid = asix_get_phyid(dev);
1017 dbg("PHYID=0x%08x", phyid);
1018
1019 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
1020 goto out;
1021
1022 msleep(150);
1023
1024 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
1025 goto out;
1026
1027 msleep(150);
1028
1029 dev->net->netdev_ops = &ax88772_netdev_ops;
1030 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1031
1032 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1033 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1034 ADVERTISE_ALL | ADVERTISE_CSMA);
1035 mii_nway_restart(&dev->mii);
1036
1037 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
1038 goto out;
1039
1040 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1041 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1042 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
1043 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1044 goto out;
1045 }
1046
1047 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1048 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1049 goto out;
1050
1051 rx_ctl = asix_read_rx_ctl(dev);
1052 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1053
1054 rx_ctl = asix_read_medium_status(dev);
1055 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1056
1057 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1058 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1059 /* hard_mtu is still the default - the device does not support
1060 jumbo eth frames */
1061 dev->rx_urb_size = 2048;
1062 }
1063 return 0;
1064
1065 out:
1066 return ret;
1067 }
1068
1069 static struct ethtool_ops ax88178_ethtool_ops = {
1070 .get_drvinfo = asix_get_drvinfo,
1071 .get_link = asix_get_link,
1072 .get_msglevel = usbnet_get_msglevel,
1073 .set_msglevel = usbnet_set_msglevel,
1074 .get_wol = asix_get_wol,
1075 .set_wol = asix_set_wol,
1076 .get_eeprom_len = asix_get_eeprom_len,
1077 .get_eeprom = asix_get_eeprom,
1078 .get_settings = usbnet_get_settings,
1079 .set_settings = usbnet_set_settings,
1080 .nway_reset = usbnet_nway_reset,
1081 };
1082
1083 static int marvell_phy_init(struct usbnet *dev)
1084 {
1085 struct asix_data *data = (struct asix_data *)&dev->data;
1086 u16 reg;
1087
1088 devdbg(dev,"marvell_phy_init()");
1089
1090 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1091 devdbg(dev,"MII_MARVELL_STATUS = 0x%04x", reg);
1092
1093 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1094 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1095
1096 if (data->ledmode) {
1097 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1098 MII_MARVELL_LED_CTRL);
1099 devdbg(dev,"MII_MARVELL_LED_CTRL (1) = 0x%04x", reg);
1100
1101 reg &= 0xf8ff;
1102 reg |= (1 + 0x0100);
1103 asix_mdio_write(dev->net, dev->mii.phy_id,
1104 MII_MARVELL_LED_CTRL, reg);
1105
1106 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1107 MII_MARVELL_LED_CTRL);
1108 devdbg(dev,"MII_MARVELL_LED_CTRL (2) = 0x%04x", reg);
1109 reg &= 0xfc0f;
1110 }
1111
1112 return 0;
1113 }
1114
1115 static int marvell_led_status(struct usbnet *dev, u16 speed)
1116 {
1117 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1118
1119 devdbg(dev, "marvell_led_status() read 0x%04x", reg);
1120
1121 /* Clear out the center LED bits - 0x03F0 */
1122 reg &= 0xfc0f;
1123
1124 switch (speed) {
1125 case SPEED_1000:
1126 reg |= 0x03e0;
1127 break;
1128 case SPEED_100:
1129 reg |= 0x03b0;
1130 break;
1131 default:
1132 reg |= 0x02f0;
1133 }
1134
1135 devdbg(dev, "marvell_led_status() writing 0x%04x", reg);
1136 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1137
1138 return 0;
1139 }
1140
1141 static int ax88178_link_reset(struct usbnet *dev)
1142 {
1143 u16 mode;
1144 struct ethtool_cmd ecmd;
1145 struct asix_data *data = (struct asix_data *)&dev->data;
1146
1147 devdbg(dev,"ax88178_link_reset()");
1148
1149 mii_check_media(&dev->mii, 1, 1);
1150 mii_ethtool_gset(&dev->mii, &ecmd);
1151 mode = AX88178_MEDIUM_DEFAULT;
1152
1153 if (ecmd.speed == SPEED_1000)
1154 mode |= AX_MEDIUM_GM;
1155 else if (ecmd.speed == SPEED_100)
1156 mode |= AX_MEDIUM_PS;
1157 else
1158 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1159
1160 mode |= AX_MEDIUM_ENCK;
1161
1162 if (ecmd.duplex == DUPLEX_FULL)
1163 mode |= AX_MEDIUM_FD;
1164 else
1165 mode &= ~AX_MEDIUM_FD;
1166
1167 devdbg(dev, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
1168
1169 asix_write_medium_mode(dev, mode);
1170
1171 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1172 marvell_led_status(dev, ecmd.speed);
1173
1174 return 0;
1175 }
1176
1177 static void ax88178_set_mfb(struct usbnet *dev)
1178 {
1179 u16 mfb = AX_RX_CTL_MFB_16384;
1180 u16 rxctl;
1181 u16 medium;
1182 int old_rx_urb_size = dev->rx_urb_size;
1183
1184 if (dev->hard_mtu < 2048) {
1185 dev->rx_urb_size = 2048;
1186 mfb = AX_RX_CTL_MFB_2048;
1187 } else if (dev->hard_mtu < 4096) {
1188 dev->rx_urb_size = 4096;
1189 mfb = AX_RX_CTL_MFB_4096;
1190 } else if (dev->hard_mtu < 8192) {
1191 dev->rx_urb_size = 8192;
1192 mfb = AX_RX_CTL_MFB_8192;
1193 } else if (dev->hard_mtu < 16384) {
1194 dev->rx_urb_size = 16384;
1195 mfb = AX_RX_CTL_MFB_16384;
1196 }
1197
1198 rxctl = asix_read_rx_ctl(dev);
1199 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1200
1201 medium = asix_read_medium_status(dev);
1202 if (dev->net->mtu > 1500)
1203 medium |= AX_MEDIUM_JFE;
1204 else
1205 medium &= ~AX_MEDIUM_JFE;
1206 asix_write_medium_mode(dev, medium);
1207
1208 if (dev->rx_urb_size > old_rx_urb_size)
1209 usbnet_unlink_rx_urbs(dev);
1210 }
1211
1212 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1213 {
1214 struct usbnet *dev = netdev_priv(net);
1215 int ll_mtu = new_mtu + net->hard_header_len + 4;
1216
1217 devdbg(dev, "ax88178_change_mtu() new_mtu=%d", new_mtu);
1218
1219 if (new_mtu <= 0 || ll_mtu > 16384)
1220 return -EINVAL;
1221
1222 if ((ll_mtu % dev->maxpacket) == 0)
1223 return -EDOM;
1224
1225 net->mtu = new_mtu;
1226 dev->hard_mtu = net->mtu + net->hard_header_len;
1227 ax88178_set_mfb(dev);
1228
1229 return 0;
1230 }
1231
1232 static const struct net_device_ops ax88178_netdev_ops = {
1233 .ndo_open = usbnet_open,
1234 .ndo_stop = usbnet_stop,
1235 .ndo_start_xmit = usbnet_start_xmit,
1236 .ndo_tx_timeout = usbnet_tx_timeout,
1237 .ndo_set_mac_address = asix_set_mac_address,
1238 .ndo_validate_addr = eth_validate_addr,
1239 .ndo_set_multicast_list = asix_set_multicast,
1240 .ndo_do_ioctl = asix_ioctl,
1241 .ndo_change_mtu = ax88178_change_mtu,
1242 };
1243
1244 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1245 {
1246 struct asix_data *data = (struct asix_data *)&dev->data;
1247 int ret;
1248 u8 buf[ETH_ALEN];
1249 __le16 eeprom;
1250 u8 status;
1251 int gpio0 = 0;
1252 u32 phyid;
1253
1254 usbnet_get_endpoints(dev,intf);
1255
1256 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1257 dbg("GPIO Status: 0x%04x", status);
1258
1259 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1260 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1261 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1262
1263 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1264
1265 if (eeprom == cpu_to_le16(0xffff)) {
1266 data->phymode = PHY_MODE_MARVELL;
1267 data->ledmode = 0;
1268 gpio0 = 1;
1269 } else {
1270 data->phymode = le16_to_cpu(eeprom) & 7;
1271 data->ledmode = le16_to_cpu(eeprom) >> 8;
1272 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1273 }
1274 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1275
1276 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1277 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1278 asix_write_gpio(dev, 0x003c, 30);
1279 asix_write_gpio(dev, 0x001c, 300);
1280 asix_write_gpio(dev, 0x003c, 30);
1281 } else {
1282 dbg("gpio phymode == 1 path");
1283 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1284 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1285 }
1286
1287 asix_sw_reset(dev, 0);
1288 msleep(150);
1289
1290 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1291 msleep(150);
1292
1293 asix_write_rx_ctl(dev, 0);
1294
1295 /* Get the MAC address */
1296 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1297 0, 0, ETH_ALEN, buf)) < 0) {
1298 dbg("Failed to read MAC address: %d", ret);
1299 goto out;
1300 }
1301 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1302
1303 /* Initialize MII structure */
1304 dev->mii.dev = dev->net;
1305 dev->mii.mdio_read = asix_mdio_read;
1306 dev->mii.mdio_write = asix_mdio_write;
1307 dev->mii.phy_id_mask = 0x1f;
1308 dev->mii.reg_num_mask = 0xff;
1309 dev->mii.supports_gmii = 1;
1310 dev->mii.phy_id = asix_get_phy_addr(dev);
1311
1312 dev->net->netdev_ops = &ax88178_netdev_ops;
1313 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1314
1315 phyid = asix_get_phyid(dev);
1316 dbg("PHYID=0x%08x", phyid);
1317
1318 if (data->phymode == PHY_MODE_MARVELL) {
1319 marvell_phy_init(dev);
1320 msleep(60);
1321 }
1322
1323 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1324 BMCR_RESET | BMCR_ANENABLE);
1325 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1326 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1327 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1328 ADVERTISE_1000FULL);
1329
1330 mii_nway_restart(&dev->mii);
1331
1332 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1333 goto out;
1334
1335 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1336 goto out;
1337
1338 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1339 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1340 /* hard_mtu is still the default - the device does not support
1341 jumbo eth frames */
1342 dev->rx_urb_size = 2048;
1343 }
1344 return 0;
1345
1346 out:
1347 return ret;
1348 }
1349
1350 static const struct driver_info ax8817x_info = {
1351 .description = "ASIX AX8817x USB 2.0 Ethernet",
1352 .bind = ax88172_bind,
1353 .status = asix_status,
1354 .link_reset = ax88172_link_reset,
1355 .reset = ax88172_link_reset,
1356 .flags = FLAG_ETHER,
1357 .data = 0x00130103,
1358 };
1359
1360 static const struct driver_info dlink_dub_e100_info = {
1361 .description = "DLink DUB-E100 USB Ethernet",
1362 .bind = ax88172_bind,
1363 .status = asix_status,
1364 .link_reset = ax88172_link_reset,
1365 .reset = ax88172_link_reset,
1366 .flags = FLAG_ETHER,
1367 .data = 0x009f9d9f,
1368 };
1369
1370 static const struct driver_info netgear_fa120_info = {
1371 .description = "Netgear FA-120 USB Ethernet",
1372 .bind = ax88172_bind,
1373 .status = asix_status,
1374 .link_reset = ax88172_link_reset,
1375 .reset = ax88172_link_reset,
1376 .flags = FLAG_ETHER,
1377 .data = 0x00130103,
1378 };
1379
1380 static const struct driver_info hawking_uf200_info = {
1381 .description = "Hawking UF200 USB Ethernet",
1382 .bind = ax88172_bind,
1383 .status = asix_status,
1384 .link_reset = ax88172_link_reset,
1385 .reset = ax88172_link_reset,
1386 .flags = FLAG_ETHER,
1387 .data = 0x001f1d1f,
1388 };
1389
1390 static const struct driver_info ax88772_info = {
1391 .description = "ASIX AX88772 USB 2.0 Ethernet",
1392 .bind = ax88772_bind,
1393 .status = asix_status,
1394 .link_reset = ax88772_link_reset,
1395 .reset = ax88772_link_reset,
1396 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1397 .rx_fixup = asix_rx_fixup,
1398 .tx_fixup = asix_tx_fixup,
1399 };
1400
1401 static const struct driver_info ax88178_info = {
1402 .description = "ASIX AX88178 USB 2.0 Ethernet",
1403 .bind = ax88178_bind,
1404 .status = asix_status,
1405 .link_reset = ax88178_link_reset,
1406 .reset = ax88178_link_reset,
1407 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1408 .rx_fixup = asix_rx_fixup,
1409 .tx_fixup = asix_tx_fixup,
1410 };
1411
1412 static const struct usb_device_id products [] = {
1413 {
1414 // Linksys USB200M
1415 USB_DEVICE (0x077b, 0x2226),
1416 .driver_info = (unsigned long) &ax8817x_info,
1417 }, {
1418 // Netgear FA120
1419 USB_DEVICE (0x0846, 0x1040),
1420 .driver_info = (unsigned long) &netgear_fa120_info,
1421 }, {
1422 // DLink DUB-E100
1423 USB_DEVICE (0x2001, 0x1a00),
1424 .driver_info = (unsigned long) &dlink_dub_e100_info,
1425 }, {
1426 // Intellinet, ST Lab USB Ethernet
1427 USB_DEVICE (0x0b95, 0x1720),
1428 .driver_info = (unsigned long) &ax8817x_info,
1429 }, {
1430 // Hawking UF200, TrendNet TU2-ET100
1431 USB_DEVICE (0x07b8, 0x420a),
1432 .driver_info = (unsigned long) &hawking_uf200_info,
1433 }, {
1434 // Billionton Systems, USB2AR
1435 USB_DEVICE (0x08dd, 0x90ff),
1436 .driver_info = (unsigned long) &ax8817x_info,
1437 }, {
1438 // ATEN UC210T
1439 USB_DEVICE (0x0557, 0x2009),
1440 .driver_info = (unsigned long) &ax8817x_info,
1441 }, {
1442 // Buffalo LUA-U2-KTX
1443 USB_DEVICE (0x0411, 0x003d),
1444 .driver_info = (unsigned long) &ax8817x_info,
1445 }, {
1446 // Buffalo LUA-U2-GT 10/100/1000
1447 USB_DEVICE (0x0411, 0x006e),
1448 .driver_info = (unsigned long) &ax88178_info,
1449 }, {
1450 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1451 USB_DEVICE (0x6189, 0x182d),
1452 .driver_info = (unsigned long) &ax8817x_info,
1453 }, {
1454 // corega FEther USB2-TX
1455 USB_DEVICE (0x07aa, 0x0017),
1456 .driver_info = (unsigned long) &ax8817x_info,
1457 }, {
1458 // Surecom EP-1427X-2
1459 USB_DEVICE (0x1189, 0x0893),
1460 .driver_info = (unsigned long) &ax8817x_info,
1461 }, {
1462 // goodway corp usb gwusb2e
1463 USB_DEVICE (0x1631, 0x6200),
1464 .driver_info = (unsigned long) &ax8817x_info,
1465 }, {
1466 // JVC MP-PRX1 Port Replicator
1467 USB_DEVICE (0x04f1, 0x3008),
1468 .driver_info = (unsigned long) &ax8817x_info,
1469 }, {
1470 // ASIX AX88772B 10/100
1471 USB_DEVICE (0x0b95, 0x772b),
1472 .driver_info = (unsigned long) &ax88772_info,
1473 }, {
1474 // ASIX AX88772 10/100
1475 USB_DEVICE (0x0b95, 0x7720),
1476 .driver_info = (unsigned long) &ax88772_info,
1477 }, {
1478 // ASIX AX88178 10/100/1000
1479 USB_DEVICE (0x0b95, 0x1780),
1480 .driver_info = (unsigned long) &ax88178_info,
1481 }, {
1482 // Linksys USB200M Rev 2
1483 USB_DEVICE (0x13b1, 0x0018),
1484 .driver_info = (unsigned long) &ax88772_info,
1485 }, {
1486 // 0Q0 cable ethernet
1487 USB_DEVICE (0x1557, 0x7720),
1488 .driver_info = (unsigned long) &ax88772_info,
1489 }, {
1490 // DLink DUB-E100 H/W Ver B1
1491 USB_DEVICE (0x07d1, 0x3c05),
1492 .driver_info = (unsigned long) &ax88772_info,
1493 }, {
1494 // DLink DUB-E100 H/W Ver B1 Alternate
1495 USB_DEVICE (0x2001, 0x3c05),
1496 .driver_info = (unsigned long) &ax88772_info,
1497 }, {
1498 // Linksys USB1000
1499 USB_DEVICE (0x1737, 0x0039),
1500 .driver_info = (unsigned long) &ax88178_info,
1501 }, {
1502 // IO-DATA ETG-US2
1503 USB_DEVICE (0x04bb, 0x0930),
1504 .driver_info = (unsigned long) &ax88178_info,
1505 }, {
1506 // Belkin F5D5055
1507 USB_DEVICE(0x050d, 0x5055),
1508 .driver_info = (unsigned long) &ax88178_info,
1509 }, {
1510 // Apple USB Ethernet Adapter
1511 USB_DEVICE(0x05ac, 0x1402),
1512 .driver_info = (unsigned long) &ax88772_info,
1513 }, {
1514 // Cables-to-Go USB Ethernet Adapter
1515 USB_DEVICE(0x0b95, 0x772a),
1516 .driver_info = (unsigned long) &ax88772_info,
1517 }, {
1518 // ABOCOM for pci
1519 USB_DEVICE(0x14ea, 0xab11),
1520 .driver_info = (unsigned long) &ax88178_info,
1521 }, {
1522 // ASIX 88772a
1523 USB_DEVICE(0x0db0, 0xa877),
1524 .driver_info = (unsigned long) &ax88772_info,
1525 }, {
1526 // Asus USB Ethernet Adapter
1527 USB_DEVICE (0x0b95, 0x7e2b),
1528 .driver_info = (unsigned long) &ax88772_info,
1529 },
1530 { }, // END
1531 };
1532 MODULE_DEVICE_TABLE(usb, products);
1533
1534 static struct usb_driver asix_driver = {
1535 .name = "asix",
1536 .id_table = products,
1537 .probe = usbnet_probe,
1538 .suspend = usbnet_suspend,
1539 .resume = usbnet_resume,
1540 .disconnect = usbnet_disconnect,
1541 .supports_autosuspend = 1,
1542 };
1543
1544 static int __init asix_init(void)
1545 {
1546 return usb_register(&asix_driver);
1547 }
1548 module_init(asix_init);
1549
1550 static void __exit asix_exit(void)
1551 {
1552 usb_deregister(&asix_driver);
1553 }
1554 module_exit(asix_exit);
1555
1556 MODULE_AUTHOR("David Hollis");
1557 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1558 MODULE_LICENSE("GPL");
1559
Linux ARM platform port for MOXA ART SoC