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initial commit with v2.6.32.60
[linux-2.6.32.60-moxart.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blob619590ddb0960db46c765797f4c84d212c40b726
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/lib80211.h>
46 #include <net/mac80211.h>
47
48 #include <asm/div64.h>
49
50 #define DRV_NAME "iwl3945"
51
52 #include "iwl-fh.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-commands.h"
55 #include "iwl-sta.h"
56 #include "iwl-3945.h"
57 #include "iwl-helpers.h"
58 #include "iwl-core.h"
59 #include "iwl-dev.h"
60
61 /*
62 * module name, copyright, version, etc.
63 */
64
65 #define DRV_DESCRIPTION \
66 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
67
68 #ifdef CONFIG_IWLWIFI_DEBUG
69 #define VD "d"
70 #else
71 #define VD
72 #endif
73
74 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
75 #define VS "s"
76 #else
77 #define VS
78 #endif
79
80 #define IWL39_VERSION "1.2.26k" VD VS
81 #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
82 #define DRV_AUTHOR "<ilw@linux.intel.com>"
83 #define DRV_VERSION IWL39_VERSION
84
85
86 MODULE_DESCRIPTION(DRV_DESCRIPTION);
87 MODULE_VERSION(DRV_VERSION);
88 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
89 MODULE_LICENSE("GPL");
90
91 /* module parameters */
92 struct iwl_mod_params iwl3945_mod_params = {
93 .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
94 .sw_crypto = 1,
95 .restart_fw = 1,
96 /* the rest are 0 by default */
97 };
98
99 /**
100 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
101 * @priv: eeprom and antenna fields are used to determine antenna flags
102 *
103 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
104 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
105 *
106 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
107 * IWL_ANTENNA_MAIN - Force MAIN antenna
108 * IWL_ANTENNA_AUX - Force AUX antenna
109 */
110 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
111 {
112 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
113
114 switch (iwl3945_mod_params.antenna) {
115 case IWL_ANTENNA_DIVERSITY:
116 return 0;
117
118 case IWL_ANTENNA_MAIN:
119 if (eeprom->antenna_switch_type)
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122
123 case IWL_ANTENNA_AUX:
124 if (eeprom->antenna_switch_type)
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
126 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
127 }
128
129 /* bad antenna selector value */
130 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
131 iwl3945_mod_params.antenna);
132
133 return 0; /* "diversity" is default if error */
134 }
135
136 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
137 struct ieee80211_key_conf *keyconf,
138 u8 sta_id)
139 {
140 unsigned long flags;
141 __le16 key_flags = 0;
142 int ret;
143
144 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
145 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
146
147 if (sta_id == priv->hw_params.bcast_sta_id)
148 key_flags |= STA_KEY_MULTICAST_MSK;
149
150 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
151 keyconf->hw_key_idx = keyconf->keyidx;
152 key_flags &= ~STA_KEY_FLG_INVALID;
153
154 spin_lock_irqsave(&priv->sta_lock, flags);
155 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
156 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
157 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
158 keyconf->keylen);
159
160 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
161 keyconf->keylen);
162
163 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
164 == STA_KEY_FLG_NO_ENC)
165 priv->stations[sta_id].sta.key.key_offset =
166 iwl_get_free_ucode_key_index(priv);
167 /* else, we are overriding an existing key => no need to allocated room
168 * in uCode. */
169
170 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
171 "no space for a new key");
172
173 priv->stations[sta_id].sta.key.key_flags = key_flags;
174 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
175 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
176
177 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
178
179 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
180
181 spin_unlock_irqrestore(&priv->sta_lock, flags);
182
183 return ret;
184 }
185
186 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
187 struct ieee80211_key_conf *keyconf,
188 u8 sta_id)
189 {
190 return -EOPNOTSUPP;
191 }
192
193 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
194 struct ieee80211_key_conf *keyconf,
195 u8 sta_id)
196 {
197 return -EOPNOTSUPP;
198 }
199
200 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
201 {
202 unsigned long flags;
203
204 spin_lock_irqsave(&priv->sta_lock, flags);
205 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
206 memset(&priv->stations[sta_id].sta.key, 0,
207 sizeof(struct iwl4965_keyinfo));
208 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
209 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
210 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
211 spin_unlock_irqrestore(&priv->sta_lock, flags);
212
213 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
214 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
215 return 0;
216 }
217
218 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
219 struct ieee80211_key_conf *keyconf, u8 sta_id)
220 {
221 int ret = 0;
222
223 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
224
225 switch (keyconf->alg) {
226 case ALG_CCMP:
227 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
228 break;
229 case ALG_TKIP:
230 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
231 break;
232 case ALG_WEP:
233 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
234 break;
235 default:
236 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
237 ret = -EINVAL;
238 }
239
240 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
241 keyconf->alg, keyconf->keylen, keyconf->keyidx,
242 sta_id, ret);
243
244 return ret;
245 }
246
247 static int iwl3945_remove_static_key(struct iwl_priv *priv)
248 {
249 int ret = -EOPNOTSUPP;
250
251 return ret;
252 }
253
254 static int iwl3945_set_static_key(struct iwl_priv *priv,
255 struct ieee80211_key_conf *key)
256 {
257 if (key->alg == ALG_WEP)
258 return -EOPNOTSUPP;
259
260 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
261 return -EINVAL;
262 }
263
264 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
265 {
266 struct list_head *element;
267
268 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
269 priv->frames_count);
270
271 while (!list_empty(&priv->free_frames)) {
272 element = priv->free_frames.next;
273 list_del(element);
274 kfree(list_entry(element, struct iwl3945_frame, list));
275 priv->frames_count--;
276 }
277
278 if (priv->frames_count) {
279 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
280 priv->frames_count);
281 priv->frames_count = 0;
282 }
283 }
284
285 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
286 {
287 struct iwl3945_frame *frame;
288 struct list_head *element;
289 if (list_empty(&priv->free_frames)) {
290 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
291 if (!frame) {
292 IWL_ERR(priv, "Could not allocate frame!\n");
293 return NULL;
294 }
295
296 priv->frames_count++;
297 return frame;
298 }
299
300 element = priv->free_frames.next;
301 list_del(element);
302 return list_entry(element, struct iwl3945_frame, list);
303 }
304
305 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
306 {
307 memset(frame, 0, sizeof(*frame));
308 list_add(&frame->list, &priv->free_frames);
309 }
310
311 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
312 struct ieee80211_hdr *hdr,
313 int left)
314 {
315
316 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
317 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
318 (priv->iw_mode != NL80211_IFTYPE_AP)))
319 return 0;
320
321 if (priv->ibss_beacon->len > left)
322 return 0;
323
324 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
325
326 return priv->ibss_beacon->len;
327 }
328
329 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
330 {
331 struct iwl3945_frame *frame;
332 unsigned int frame_size;
333 int rc;
334 u8 rate;
335
336 frame = iwl3945_get_free_frame(priv);
337
338 if (!frame) {
339 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
340 "command.\n");
341 return -ENOMEM;
342 }
343
344 rate = iwl_rate_get_lowest_plcp(priv);
345
346 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
347
348 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
349 &frame->u.cmd[0]);
350
351 iwl3945_free_frame(priv, frame);
352
353 return rc;
354 }
355
356 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
357 {
358 if (priv->shared_virt)
359 dma_free_coherent(&priv->pci_dev->dev,
360 sizeof(struct iwl3945_shared),
361 priv->shared_virt,
362 priv->shared_phys);
363 }
364
365 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
366 struct ieee80211_tx_info *info,
367 struct iwl_device_cmd *cmd,
368 struct sk_buff *skb_frag,
369 int sta_id)
370 {
371 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
372 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
373
374 switch (keyinfo->alg) {
375 case ALG_CCMP:
376 tx->sec_ctl = TX_CMD_SEC_CCM;
377 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
378 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
379 break;
380
381 case ALG_TKIP:
382 break;
383
384 case ALG_WEP:
385 tx->sec_ctl = TX_CMD_SEC_WEP |
386 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
387
388 if (keyinfo->keylen == 13)
389 tx->sec_ctl |= TX_CMD_SEC_KEY128;
390
391 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
392
393 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
394 "with key %d\n", info->control.hw_key->hw_key_idx);
395 break;
396
397 default:
398 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
399 break;
400 }
401 }
402
403 /*
404 * handle build REPLY_TX command notification.
405 */
406 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
407 struct iwl_device_cmd *cmd,
408 struct ieee80211_tx_info *info,
409 struct ieee80211_hdr *hdr, u8 std_id)
410 {
411 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
412 __le32 tx_flags = tx->tx_flags;
413 __le16 fc = hdr->frame_control;
414 u8 rc_flags = info->control.rates[0].flags;
415
416 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
417 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
418 tx_flags |= TX_CMD_FLG_ACK_MSK;
419 if (ieee80211_is_mgmt(fc))
420 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
421 if (ieee80211_is_probe_resp(fc) &&
422 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
423 tx_flags |= TX_CMD_FLG_TSF_MSK;
424 } else {
425 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
426 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
427 }
428
429 tx->sta_id = std_id;
430 if (ieee80211_has_morefrags(fc))
431 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
432
433 if (ieee80211_is_data_qos(fc)) {
434 u8 *qc = ieee80211_get_qos_ctl(hdr);
435 tx->tid_tspec = qc[0] & 0xf;
436 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
437 } else {
438 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
439 }
440
441 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
442 tx_flags |= TX_CMD_FLG_RTS_MSK;
443 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
444 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
445 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
446 tx_flags |= TX_CMD_FLG_CTS_MSK;
447 }
448
449 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
450 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
451
452 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
453 if (ieee80211_is_mgmt(fc)) {
454 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
455 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
456 else
457 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
458 } else {
459 tx->timeout.pm_frame_timeout = 0;
460 #ifdef CONFIG_IWLWIFI_LEDS
461 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
462 #endif
463 }
464
465 tx->driver_txop = 0;
466 tx->tx_flags = tx_flags;
467 tx->next_frame_len = 0;
468 }
469
470 /*
471 * start REPLY_TX command process
472 */
473 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
474 {
475 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
476 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
477 struct iwl3945_tx_cmd *tx;
478 struct iwl_tx_queue *txq = NULL;
479 struct iwl_queue *q = NULL;
480 struct iwl_device_cmd *out_cmd;
481 struct iwl_cmd_meta *out_meta;
482 dma_addr_t phys_addr;
483 dma_addr_t txcmd_phys;
484 int txq_id = skb_get_queue_mapping(skb);
485 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
486 u8 id;
487 u8 unicast;
488 u8 sta_id;
489 u8 tid = 0;
490 u16 seq_number = 0;
491 __le16 fc;
492 u8 wait_write_ptr = 0;
493 u8 *qc = NULL;
494 unsigned long flags;
495 int rc;
496
497 spin_lock_irqsave(&priv->lock, flags);
498 if (iwl_is_rfkill(priv)) {
499 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
500 goto drop_unlock;
501 }
502
503 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
504 IWL_ERR(priv, "ERROR: No TX rate available.\n");
505 goto drop_unlock;
506 }
507
508 unicast = !is_multicast_ether_addr(hdr->addr1);
509 id = 0;
510
511 fc = hdr->frame_control;
512
513 #ifdef CONFIG_IWLWIFI_DEBUG
514 if (ieee80211_is_auth(fc))
515 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
516 else if (ieee80211_is_assoc_req(fc))
517 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
518 else if (ieee80211_is_reassoc_req(fc))
519 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
520 #endif
521
522 /* drop all non-injected data frame if we are not associated */
523 if (ieee80211_is_data(fc) &&
524 !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
525 (!iwl_is_associated(priv) ||
526 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
527 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
528 goto drop_unlock;
529 }
530
531 spin_unlock_irqrestore(&priv->lock, flags);
532
533 hdr_len = ieee80211_hdrlen(fc);
534
535 /* Find (or create) index into station table for destination station */
536 if (info->flags & IEEE80211_TX_CTL_INJECTED)
537 sta_id = priv->hw_params.bcast_sta_id;
538 else
539 sta_id = iwl_get_sta_id(priv, hdr);
540 if (sta_id == IWL_INVALID_STATION) {
541 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
542 hdr->addr1);
543 goto drop;
544 }
545
546 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
547
548 if (ieee80211_is_data_qos(fc)) {
549 qc = ieee80211_get_qos_ctl(hdr);
550 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
551 if (unlikely(tid >= MAX_TID_COUNT))
552 goto drop;
553 seq_number = priv->stations[sta_id].tid[tid].seq_number &
554 IEEE80211_SCTL_SEQ;
555 hdr->seq_ctrl = cpu_to_le16(seq_number) |
556 (hdr->seq_ctrl &
557 cpu_to_le16(IEEE80211_SCTL_FRAG));
558 seq_number += 0x10;
559 }
560
561 /* Descriptor for chosen Tx queue */
562 txq = &priv->txq[txq_id];
563 q = &txq->q;
564
565 if ((iwl_queue_space(q) < q->high_mark))
566 goto drop;
567
568 spin_lock_irqsave(&priv->lock, flags);
569
570 idx = get_cmd_index(q, q->write_ptr, 0);
571
572 /* Set up driver data for this TFD */
573 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
574 txq->txb[q->write_ptr].skb[0] = skb;
575
576 /* Init first empty entry in queue's array of Tx/cmd buffers */
577 out_cmd = txq->cmd[idx];
578 out_meta = &txq->meta[idx];
579 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
580 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
581 memset(tx, 0, sizeof(*tx));
582
583 /*
584 * Set up the Tx-command (not MAC!) header.
585 * Store the chosen Tx queue and TFD index within the sequence field;
586 * after Tx, uCode's Tx response will return this value so driver can
587 * locate the frame within the tx queue and do post-tx processing.
588 */
589 out_cmd->hdr.cmd = REPLY_TX;
590 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
591 INDEX_TO_SEQ(q->write_ptr)));
592
593 /* Copy MAC header from skb into command buffer */
594 memcpy(tx->hdr, hdr, hdr_len);
595
596
597 if (info->control.hw_key)
598 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
599
600 /* TODO need this for burst mode later on */
601 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
602
603 /* set is_hcca to 0; it probably will never be implemented */
604 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
605
606 /* Total # bytes to be transmitted */
607 len = (u16)skb->len;
608 tx->len = cpu_to_le16(len);
609
610 iwl_dbg_log_tx_data_frame(priv, len, hdr);
611 iwl_update_stats(priv, true, fc, len);
612 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
613 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
614
615 if (!ieee80211_has_morefrags(hdr->frame_control)) {
616 txq->need_update = 1;
617 if (qc)
618 priv->stations[sta_id].tid[tid].seq_number = seq_number;
619 } else {
620 wait_write_ptr = 1;
621 txq->need_update = 0;
622 }
623
624 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
625 le16_to_cpu(out_cmd->hdr.sequence));
626 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
627 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
628 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
629 ieee80211_hdrlen(fc));
630
631 /*
632 * Use the first empty entry in this queue's command buffer array
633 * to contain the Tx command and MAC header concatenated together
634 * (payload data will be in another buffer).
635 * Size of this varies, due to varying MAC header length.
636 * If end is not dword aligned, we'll have 2 extra bytes at the end
637 * of the MAC header (device reads on dword boundaries).
638 * We'll tell device about this padding later.
639 */
640 len = sizeof(struct iwl3945_tx_cmd) +
641 sizeof(struct iwl_cmd_header) + hdr_len;
642
643 len_org = len;
644 len = (len + 3) & ~3;
645
646 if (len_org != len)
647 len_org = 1;
648 else
649 len_org = 0;
650
651 /* Physical address of this Tx command's header (not MAC header!),
652 * within command buffer array. */
653 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
654 len, PCI_DMA_TODEVICE);
655 /* we do not map meta data ... so we can safely access address to
656 * provide to unmap command*/
657 pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
658 pci_unmap_len_set(out_meta, len, len);
659
660 /* Add buffer containing Tx command and MAC(!) header to TFD's
661 * first entry */
662 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
663 txcmd_phys, len, 1, 0);
664
665
666 /* Set up TFD's 2nd entry to point directly to remainder of skb,
667 * if any (802.11 null frames have no payload). */
668 len = skb->len - hdr_len;
669 if (len) {
670 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
671 len, PCI_DMA_TODEVICE);
672 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
673 phys_addr, len,
674 0, U32_PAD(len));
675 }
676
677
678 /* Tell device the write index *just past* this latest filled TFD */
679 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
680 rc = iwl_txq_update_write_ptr(priv, txq);
681 spin_unlock_irqrestore(&priv->lock, flags);
682
683 if (rc)
684 return rc;
685
686 if ((iwl_queue_space(q) < q->high_mark)
687 && priv->mac80211_registered) {
688 if (wait_write_ptr) {
689 spin_lock_irqsave(&priv->lock, flags);
690 txq->need_update = 1;
691 iwl_txq_update_write_ptr(priv, txq);
692 spin_unlock_irqrestore(&priv->lock, flags);
693 }
694
695 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
696 }
697
698 return 0;
699
700 drop_unlock:
701 spin_unlock_irqrestore(&priv->lock, flags);
702 drop:
703 return -1;
704 }
705
706 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
707
708 #include "iwl-spectrum.h"
709
710 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
711 #define BEACON_TIME_MASK_HIGH 0xFF000000
712 #define TIME_UNIT 1024
713
714 /*
715 * extended beacon time format
716 * time in usec will be changed into a 32-bit value in 8:24 format
717 * the high 1 byte is the beacon counts
718 * the lower 3 bytes is the time in usec within one beacon interval
719 */
720
721 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
722 {
723 u32 quot;
724 u32 rem;
725 u32 interval = beacon_interval * 1024;
726
727 if (!interval || !usec)
728 return 0;
729
730 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
731 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
732
733 return (quot << 24) + rem;
734 }
735
736 /* base is usually what we get from ucode with each received frame,
737 * the same as HW timer counter counting down
738 */
739
740 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
741 {
742 u32 base_low = base & BEACON_TIME_MASK_LOW;
743 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
744 u32 interval = beacon_interval * TIME_UNIT;
745 u32 res = (base & BEACON_TIME_MASK_HIGH) +
746 (addon & BEACON_TIME_MASK_HIGH);
747
748 if (base_low > addon_low)
749 res += base_low - addon_low;
750 else if (base_low < addon_low) {
751 res += interval + base_low - addon_low;
752 res += (1 << 24);
753 } else
754 res += (1 << 24);
755
756 return cpu_to_le32(res);
757 }
758
759 static int iwl3945_get_measurement(struct iwl_priv *priv,
760 struct ieee80211_measurement_params *params,
761 u8 type)
762 {
763 struct iwl_spectrum_cmd spectrum;
764 struct iwl_rx_packet *res;
765 struct iwl_host_cmd cmd = {
766 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
767 .data = (void *)&spectrum,
768 .flags = CMD_WANT_SKB,
769 };
770 u32 add_time = le64_to_cpu(params->start_time);
771 int rc;
772 int spectrum_resp_status;
773 int duration = le16_to_cpu(params->duration);
774
775 if (iwl_is_associated(priv))
776 add_time =
777 iwl3945_usecs_to_beacons(
778 le64_to_cpu(params->start_time) - priv->last_tsf,
779 le16_to_cpu(priv->rxon_timing.beacon_interval));
780
781 memset(&spectrum, 0, sizeof(spectrum));
782
783 spectrum.channel_count = cpu_to_le16(1);
784 spectrum.flags =
785 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
786 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
787 cmd.len = sizeof(spectrum);
788 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
789
790 if (iwl_is_associated(priv))
791 spectrum.start_time =
792 iwl3945_add_beacon_time(priv->last_beacon_time,
793 add_time,
794 le16_to_cpu(priv->rxon_timing.beacon_interval));
795 else
796 spectrum.start_time = 0;
797
798 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
799 spectrum.channels[0].channel = params->channel;
800 spectrum.channels[0].type = type;
801 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
802 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
803 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
804
805 rc = iwl_send_cmd_sync(priv, &cmd);
806 if (rc)
807 return rc;
808
809 res = (struct iwl_rx_packet *)cmd.reply_skb->data;
810 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
811 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
812 rc = -EIO;
813 }
814
815 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
816 switch (spectrum_resp_status) {
817 case 0: /* Command will be handled */
818 if (res->u.spectrum.id != 0xff) {
819 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
820 res->u.spectrum.id);
821 priv->measurement_status &= ~MEASUREMENT_READY;
822 }
823 priv->measurement_status |= MEASUREMENT_ACTIVE;
824 rc = 0;
825 break;
826
827 case 1: /* Command will not be handled */
828 rc = -EAGAIN;
829 break;
830 }
831
832 dev_kfree_skb_any(cmd.reply_skb);
833
834 return rc;
835 }
836 #endif
837
838 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
839 struct iwl_rx_mem_buffer *rxb)
840 {
841 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
842 struct iwl_alive_resp *palive;
843 struct delayed_work *pwork;
844
845 palive = &pkt->u.alive_frame;
846
847 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
848 "0x%01X 0x%01X\n",
849 palive->is_valid, palive->ver_type,
850 palive->ver_subtype);
851
852 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
853 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
854 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
855 sizeof(struct iwl_alive_resp));
856 pwork = &priv->init_alive_start;
857 } else {
858 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
859 memcpy(&priv->card_alive, &pkt->u.alive_frame,
860 sizeof(struct iwl_alive_resp));
861 pwork = &priv->alive_start;
862 iwl3945_disable_events(priv);
863 }
864
865 /* We delay the ALIVE response by 5ms to
866 * give the HW RF Kill time to activate... */
867 if (palive->is_valid == UCODE_VALID_OK)
868 queue_delayed_work(priv->workqueue, pwork,
869 msecs_to_jiffies(5));
870 else
871 IWL_WARN(priv, "uCode did not respond OK.\n");
872 }
873
874 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
875 struct iwl_rx_mem_buffer *rxb)
876 {
877 #ifdef CONFIG_IWLWIFI_DEBUG
878 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
879 #endif
880
881 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
882 return;
883 }
884
885 static void iwl3945_bg_beacon_update(struct work_struct *work)
886 {
887 struct iwl_priv *priv =
888 container_of(work, struct iwl_priv, beacon_update);
889 struct sk_buff *beacon;
890
891 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
892 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
893
894 if (!beacon) {
895 IWL_ERR(priv, "update beacon failed\n");
896 return;
897 }
898
899 mutex_lock(&priv->mutex);
900 /* new beacon skb is allocated every time; dispose previous.*/
901 if (priv->ibss_beacon)
902 dev_kfree_skb(priv->ibss_beacon);
903
904 priv->ibss_beacon = beacon;
905 mutex_unlock(&priv->mutex);
906
907 iwl3945_send_beacon_cmd(priv);
908 }
909
910 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
911 struct iwl_rx_mem_buffer *rxb)
912 {
913 #ifdef CONFIG_IWLWIFI_DEBUG
914 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
915 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
916 u8 rate = beacon->beacon_notify_hdr.rate;
917
918 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
919 "tsf %d %d rate %d\n",
920 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
921 beacon->beacon_notify_hdr.failure_frame,
922 le32_to_cpu(beacon->ibss_mgr_status),
923 le32_to_cpu(beacon->high_tsf),
924 le32_to_cpu(beacon->low_tsf), rate);
925 #endif
926
927 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
928 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
929 queue_work(priv->workqueue, &priv->beacon_update);
930 }
931
932 /* Handle notification from uCode that card's power state is changing
933 * due to software, hardware, or critical temperature RFKILL */
934 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
935 struct iwl_rx_mem_buffer *rxb)
936 {
937 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
938 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
939 unsigned long status = priv->status;
940
941 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
942 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
943 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
944
945 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
946 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
947
948 if (flags & HW_CARD_DISABLED)
949 set_bit(STATUS_RF_KILL_HW, &priv->status);
950 else
951 clear_bit(STATUS_RF_KILL_HW, &priv->status);
952
953
954 iwl_scan_cancel(priv);
955
956 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
957 test_bit(STATUS_RF_KILL_HW, &priv->status)))
958 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
959 test_bit(STATUS_RF_KILL_HW, &priv->status));
960 else
961 wake_up_interruptible(&priv->wait_command_queue);
962 }
963
964 /**
965 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
966 *
967 * Setup the RX handlers for each of the reply types sent from the uCode
968 * to the host.
969 *
970 * This function chains into the hardware specific files for them to setup
971 * any hardware specific handlers as well.
972 */
973 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
974 {
975 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
976 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
977 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
978 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
979 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
980 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
981 iwl_rx_pm_debug_statistics_notif;
982 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
983
984 /*
985 * The same handler is used for both the REPLY to a discrete
986 * statistics request from the host as well as for the periodic
987 * statistics notifications (after received beacons) from the uCode.
988 */
989 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
990 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
991
992 iwl_setup_spectrum_handlers(priv);
993 iwl_setup_rx_scan_handlers(priv);
994 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
995
996 /* Set up hardware specific Rx handlers */
997 iwl3945_hw_rx_handler_setup(priv);
998 }
999
1000 /************************** RX-FUNCTIONS ****************************/
1001 /*
1002 * Rx theory of operation
1003 *
1004 * The host allocates 32 DMA target addresses and passes the host address
1005 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1006 * 0 to 31
1007 *
1008 * Rx Queue Indexes
1009 * The host/firmware share two index registers for managing the Rx buffers.
1010 *
1011 * The READ index maps to the first position that the firmware may be writing
1012 * to -- the driver can read up to (but not including) this position and get
1013 * good data.
1014 * The READ index is managed by the firmware once the card is enabled.
1015 *
1016 * The WRITE index maps to the last position the driver has read from -- the
1017 * position preceding WRITE is the last slot the firmware can place a packet.
1018 *
1019 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1020 * WRITE = READ.
1021 *
1022 * During initialization, the host sets up the READ queue position to the first
1023 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1024 *
1025 * When the firmware places a packet in a buffer, it will advance the READ index
1026 * and fire the RX interrupt. The driver can then query the READ index and
1027 * process as many packets as possible, moving the WRITE index forward as it
1028 * resets the Rx queue buffers with new memory.
1029 *
1030 * The management in the driver is as follows:
1031 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1032 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1033 * to replenish the iwl->rxq->rx_free.
1034 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1035 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1036 * 'processed' and 'read' driver indexes as well)
1037 * + A received packet is processed and handed to the kernel network stack,
1038 * detached from the iwl->rxq. The driver 'processed' index is updated.
1039 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1040 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1041 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1042 * were enough free buffers and RX_STALLED is set it is cleared.
1043 *
1044 *
1045 * Driver sequence:
1046 *
1047 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1048 * iwl3945_rx_queue_restock
1049 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1050 * queue, updates firmware pointers, and updates
1051 * the WRITE index. If insufficient rx_free buffers
1052 * are available, schedules iwl3945_rx_replenish
1053 *
1054 * -- enable interrupts --
1055 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1056 * READ INDEX, detaching the SKB from the pool.
1057 * Moves the packet buffer from queue to rx_used.
1058 * Calls iwl3945_rx_queue_restock to refill any empty
1059 * slots.
1060 * ...
1061 *
1062 */
1063
1064 /**
1065 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1066 */
1067 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1068 dma_addr_t dma_addr)
1069 {
1070 return cpu_to_le32((u32)dma_addr);
1071 }
1072
1073 /**
1074 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1075 *
1076 * If there are slots in the RX queue that need to be restocked,
1077 * and we have free pre-allocated buffers, fill the ranks as much
1078 * as we can, pulling from rx_free.
1079 *
1080 * This moves the 'write' index forward to catch up with 'processed', and
1081 * also updates the memory address in the firmware to reference the new
1082 * target buffer.
1083 */
1084 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1085 {
1086 struct iwl_rx_queue *rxq = &priv->rxq;
1087 struct list_head *element;
1088 struct iwl_rx_mem_buffer *rxb;
1089 unsigned long flags;
1090 int write, rc;
1091
1092 spin_lock_irqsave(&rxq->lock, flags);
1093 write = rxq->write & ~0x7;
1094 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1095 /* Get next free Rx buffer, remove from free list */
1096 element = rxq->rx_free.next;
1097 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1098 list_del(element);
1099
1100 /* Point to Rx buffer via next RBD in circular buffer */
1101 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
1102 rxq->queue[rxq->write] = rxb;
1103 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1104 rxq->free_count--;
1105 }
1106 spin_unlock_irqrestore(&rxq->lock, flags);
1107 /* If the pre-allocated buffer pool is dropping low, schedule to
1108 * refill it */
1109 if (rxq->free_count <= RX_LOW_WATERMARK)
1110 queue_work(priv->workqueue, &priv->rx_replenish);
1111
1112
1113 /* If we've added more space for the firmware to place data, tell it.
1114 * Increment device's write pointer in multiples of 8. */
1115 if ((rxq->write_actual != (rxq->write & ~0x7))
1116 || (abs(rxq->write - rxq->read) > 7)) {
1117 spin_lock_irqsave(&rxq->lock, flags);
1118 rxq->need_update = 1;
1119 spin_unlock_irqrestore(&rxq->lock, flags);
1120 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
1121 if (rc)
1122 return rc;
1123 }
1124
1125 return 0;
1126 }
1127
1128 /**
1129 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1130 *
1131 * When moving to rx_free an SKB is allocated for the slot.
1132 *
1133 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1134 * This is called as a scheduled work item (except for during initialization)
1135 */
1136 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1137 {
1138 struct iwl_rx_queue *rxq = &priv->rxq;
1139 struct list_head *element;
1140 struct iwl_rx_mem_buffer *rxb;
1141 struct sk_buff *skb;
1142 unsigned long flags;
1143
1144 while (1) {
1145 spin_lock_irqsave(&rxq->lock, flags);
1146
1147 if (list_empty(&rxq->rx_used)) {
1148 spin_unlock_irqrestore(&rxq->lock, flags);
1149 return;
1150 }
1151 spin_unlock_irqrestore(&rxq->lock, flags);
1152
1153 if (rxq->free_count > RX_LOW_WATERMARK)
1154 priority |= __GFP_NOWARN;
1155 /* Alloc a new receive buffer */
1156 skb = alloc_skb(priv->hw_params.rx_buf_size, priority);
1157 if (!skb) {
1158 if (net_ratelimit())
1159 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1160 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1161 net_ratelimit())
1162 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1163 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1164 rxq->free_count);
1165 /* We don't reschedule replenish work here -- we will
1166 * call the restock method and if it still needs
1167 * more buffers it will schedule replenish */
1168 break;
1169 }
1170
1171 spin_lock_irqsave(&rxq->lock, flags);
1172 if (list_empty(&rxq->rx_used)) {
1173 spin_unlock_irqrestore(&rxq->lock, flags);
1174 dev_kfree_skb_any(skb);
1175 return;
1176 }
1177 element = rxq->rx_used.next;
1178 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1179 list_del(element);
1180 spin_unlock_irqrestore(&rxq->lock, flags);
1181
1182 rxb->skb = skb;
1183
1184 /* If radiotap head is required, reserve some headroom here.
1185 * The physical head count is a variable rx_stats->phy_count.
1186 * We reserve 4 bytes here. Plus these extra bytes, the
1187 * headroom of the physical head should be enough for the
1188 * radiotap head that iwl3945 supported. See iwl3945_rt.
1189 */
1190 skb_reserve(rxb->skb, 4);
1191
1192 /* Get physical address of RB/SKB */
1193 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1194 rxb->skb->data,
1195 priv->hw_params.rx_buf_size,
1196 PCI_DMA_FROMDEVICE);
1197
1198 spin_lock_irqsave(&rxq->lock, flags);
1199 list_add_tail(&rxb->list, &rxq->rx_free);
1200 priv->alloc_rxb_skb++;
1201 rxq->free_count++;
1202 spin_unlock_irqrestore(&rxq->lock, flags);
1203 }
1204 }
1205
1206 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1207 {
1208 unsigned long flags;
1209 int i;
1210 spin_lock_irqsave(&rxq->lock, flags);
1211 INIT_LIST_HEAD(&rxq->rx_free);
1212 INIT_LIST_HEAD(&rxq->rx_used);
1213 /* Fill the rx_used queue with _all_ of the Rx buffers */
1214 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1215 /* In the reset function, these buffers may have been allocated
1216 * to an SKB, so we need to unmap and free potential storage */
1217 if (rxq->pool[i].skb != NULL) {
1218 pci_unmap_single(priv->pci_dev,
1219 rxq->pool[i].real_dma_addr,
1220 priv->hw_params.rx_buf_size,
1221 PCI_DMA_FROMDEVICE);
1222 priv->alloc_rxb_skb--;
1223 dev_kfree_skb(rxq->pool[i].skb);
1224 rxq->pool[i].skb = NULL;
1225 }
1226 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1227 }
1228
1229 /* Set us so that we have processed and used all buffers, but have
1230 * not restocked the Rx queue with fresh buffers */
1231 rxq->read = rxq->write = 0;
1232 rxq->free_count = 0;
1233 rxq->write_actual = 0;
1234 spin_unlock_irqrestore(&rxq->lock, flags);
1235 }
1236
1237 void iwl3945_rx_replenish(void *data)
1238 {
1239 struct iwl_priv *priv = data;
1240 unsigned long flags;
1241
1242 iwl3945_rx_allocate(priv, GFP_KERNEL);
1243
1244 spin_lock_irqsave(&priv->lock, flags);
1245 iwl3945_rx_queue_restock(priv);
1246 spin_unlock_irqrestore(&priv->lock, flags);
1247 }
1248
1249 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1250 {
1251 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1252
1253 iwl3945_rx_queue_restock(priv);
1254 }
1255
1256
1257 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1258 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1259 * This free routine walks the list of POOL entries and if SKB is set to
1260 * non NULL it is unmapped and freed
1261 */
1262 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1263 {
1264 int i;
1265 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1266 if (rxq->pool[i].skb != NULL) {
1267 pci_unmap_single(priv->pci_dev,
1268 rxq->pool[i].real_dma_addr,
1269 priv->hw_params.rx_buf_size,
1270 PCI_DMA_FROMDEVICE);
1271 dev_kfree_skb(rxq->pool[i].skb);
1272 }
1273 }
1274
1275 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1276 rxq->dma_addr);
1277 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1278 rxq->rb_stts, rxq->rb_stts_dma);
1279 rxq->bd = NULL;
1280 rxq->rb_stts = NULL;
1281 }
1282
1283
1284 /* Convert linear signal-to-noise ratio into dB */
1285 static u8 ratio2dB[100] = {
1286 /* 0 1 2 3 4 5 6 7 8 9 */
1287 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1288 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1289 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1290 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1291 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1292 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1293 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1294 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1295 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1296 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1297 };
1298
1299 /* Calculates a relative dB value from a ratio of linear
1300 * (i.e. not dB) signal levels.
1301 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1302 int iwl3945_calc_db_from_ratio(int sig_ratio)
1303 {
1304 /* 1000:1 or higher just report as 60 dB */
1305 if (sig_ratio >= 1000)
1306 return 60;
1307
1308 /* 100:1 or higher, divide by 10 and use table,
1309 * add 20 dB to make up for divide by 10 */
1310 if (sig_ratio >= 100)
1311 return 20 + (int)ratio2dB[sig_ratio/10];
1312
1313 /* We shouldn't see this */
1314 if (sig_ratio < 1)
1315 return 0;
1316
1317 /* Use table for ratios 1:1 - 99:1 */
1318 return (int)ratio2dB[sig_ratio];
1319 }
1320
1321 #define PERFECT_RSSI (-20) /* dBm */
1322 #define WORST_RSSI (-95) /* dBm */
1323 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1324
1325 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
1326 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1327 * about formulas used below. */
1328 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1329 {
1330 int sig_qual;
1331 int degradation = PERFECT_RSSI - rssi_dbm;
1332
1333 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1334 * as indicator; formula is (signal dbm - noise dbm).
1335 * SNR at or above 40 is a great signal (100%).
1336 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1337 * Weakest usable signal is usually 10 - 15 dB SNR. */
1338 if (noise_dbm) {
1339 if (rssi_dbm - noise_dbm >= 40)
1340 return 100;
1341 else if (rssi_dbm < noise_dbm)
1342 return 0;
1343 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1344
1345 /* Else use just the signal level.
1346 * This formula is a least squares fit of data points collected and
1347 * compared with a reference system that had a percentage (%) display
1348 * for signal quality. */
1349 } else
1350 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1351 (15 * RSSI_RANGE + 62 * degradation)) /
1352 (RSSI_RANGE * RSSI_RANGE);
1353
1354 if (sig_qual > 100)
1355 sig_qual = 100;
1356 else if (sig_qual < 1)
1357 sig_qual = 0;
1358
1359 return sig_qual;
1360 }
1361
1362 /**
1363 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1364 *
1365 * Uses the priv->rx_handlers callback function array to invoke
1366 * the appropriate handlers, including command responses,
1367 * frame-received notifications, and other notifications.
1368 */
1369 static void iwl3945_rx_handle(struct iwl_priv *priv)
1370 {
1371 struct iwl_rx_mem_buffer *rxb;
1372 struct iwl_rx_packet *pkt;
1373 struct iwl_rx_queue *rxq = &priv->rxq;
1374 u32 r, i;
1375 int reclaim;
1376 unsigned long flags;
1377 u8 fill_rx = 0;
1378 u32 count = 8;
1379 int total_empty = 0;
1380
1381 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1382 * buffer that the driver may process (last buffer filled by ucode). */
1383 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1384 i = rxq->read;
1385
1386 /* calculate total frames need to be restock after handling RX */
1387 total_empty = r - priv->rxq.write_actual;
1388 if (total_empty < 0)
1389 total_empty += RX_QUEUE_SIZE;
1390
1391 if (total_empty > (RX_QUEUE_SIZE / 2))
1392 fill_rx = 1;
1393 /* Rx interrupt, but nothing sent from uCode */
1394 if (i == r)
1395 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1396
1397 while (i != r) {
1398 rxb = rxq->queue[i];
1399
1400 /* If an RXB doesn't have a Rx queue slot associated with it,
1401 * then a bug has been introduced in the queue refilling
1402 * routines -- catch it here */
1403 BUG_ON(rxb == NULL);
1404
1405 rxq->queue[i] = NULL;
1406
1407 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1408 priv->hw_params.rx_buf_size,
1409 PCI_DMA_FROMDEVICE);
1410 pkt = (struct iwl_rx_packet *)rxb->skb->data;
1411
1412 /* Reclaim a command buffer only if this packet is a response
1413 * to a (driver-originated) command.
1414 * If the packet (e.g. Rx frame) originated from uCode,
1415 * there is no command buffer to reclaim.
1416 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1417 * but apparently a few don't get set; catch them here. */
1418 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1419 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1420 (pkt->hdr.cmd != REPLY_TX);
1421
1422 /* Based on type of command response or notification,
1423 * handle those that need handling via function in
1424 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1425 if (priv->rx_handlers[pkt->hdr.cmd]) {
1426 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1427 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1428 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1429 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1430 } else {
1431 /* No handling needed */
1432 IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n",
1433 r, i, get_cmd_string(pkt->hdr.cmd),
1434 pkt->hdr.cmd);
1435 }
1436
1437 if (reclaim) {
1438 /* Invoke any callbacks, transfer the skb to caller, and
1439 * fire off the (possibly) blocking iwl_send_cmd()
1440 * as we reclaim the driver command queue */
1441 if (rxb && rxb->skb)
1442 iwl_tx_cmd_complete(priv, rxb);
1443 else
1444 IWL_WARN(priv, "Claim null rxb?\n");
1445 }
1446
1447 /* For now we just don't re-use anything. We can tweak this
1448 * later to try and re-use notification packets and SKBs that
1449 * fail to Rx correctly */
1450 if (rxb->skb != NULL) {
1451 priv->alloc_rxb_skb--;
1452 dev_kfree_skb_any(rxb->skb);
1453 rxb->skb = NULL;
1454 }
1455
1456 spin_lock_irqsave(&rxq->lock, flags);
1457 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1458 spin_unlock_irqrestore(&rxq->lock, flags);
1459 i = (i + 1) & RX_QUEUE_MASK;
1460 /* If there are a lot of unused frames,
1461 * restock the Rx queue so ucode won't assert. */
1462 if (fill_rx) {
1463 count++;
1464 if (count >= 8) {
1465 priv->rxq.read = i;
1466 iwl3945_rx_replenish_now(priv);
1467 count = 0;
1468 }
1469 }
1470 }
1471
1472 /* Backtrack one entry */
1473 priv->rxq.read = i;
1474 if (fill_rx)
1475 iwl3945_rx_replenish_now(priv);
1476 else
1477 iwl3945_rx_queue_restock(priv);
1478 }
1479
1480 /* call this function to flush any scheduled tasklet */
1481 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1482 {
1483 /* wait to make sure we flush pending tasklet*/
1484 synchronize_irq(priv->pci_dev->irq);
1485 tasklet_kill(&priv->irq_tasklet);
1486 }
1487
1488 #ifdef CONFIG_IWLWIFI_DEBUG
1489 static const char *desc_lookup(int i)
1490 {
1491 switch (i) {
1492 case 1:
1493 return "FAIL";
1494 case 2:
1495 return "BAD_PARAM";
1496 case 3:
1497 return "BAD_CHECKSUM";
1498 case 4:
1499 return "NMI_INTERRUPT";
1500 case 5:
1501 return "SYSASSERT";
1502 case 6:
1503 return "FATAL_ERROR";
1504 }
1505
1506 return "UNKNOWN";
1507 }
1508
1509 #define ERROR_START_OFFSET (1 * sizeof(u32))
1510 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1511
1512 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1513 {
1514 u32 i;
1515 u32 desc, time, count, base, data1;
1516 u32 blink1, blink2, ilink1, ilink2;
1517
1518 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1519
1520 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1521 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1522 return;
1523 }
1524
1525
1526 count = iwl_read_targ_mem(priv, base);
1527
1528 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1529 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1530 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1531 priv->status, count);
1532 }
1533
1534 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1535 "ilink1 nmiPC Line\n");
1536 for (i = ERROR_START_OFFSET;
1537 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1538 i += ERROR_ELEM_SIZE) {
1539 desc = iwl_read_targ_mem(priv, base + i);
1540 time =
1541 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1542 blink1 =
1543 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1544 blink2 =
1545 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1546 ilink1 =
1547 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1548 ilink2 =
1549 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1550 data1 =
1551 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1552
1553 IWL_ERR(priv,
1554 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1555 desc_lookup(desc), desc, time, blink1, blink2,
1556 ilink1, ilink2, data1);
1557 }
1558
1559 }
1560
1561 #define EVENT_START_OFFSET (6 * sizeof(u32))
1562
1563 /**
1564 * iwl3945_print_event_log - Dump error event log to syslog
1565 *
1566 */
1567 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1568 u32 num_events, u32 mode)
1569 {
1570 u32 i;
1571 u32 base; /* SRAM byte address of event log header */
1572 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1573 u32 ptr; /* SRAM byte address of log data */
1574 u32 ev, time, data; /* event log data */
1575
1576 if (num_events == 0)
1577 return;
1578
1579 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1580
1581 if (mode == 0)
1582 event_size = 2 * sizeof(u32);
1583 else
1584 event_size = 3 * sizeof(u32);
1585
1586 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1587
1588 /* "time" is actually "data" for mode 0 (no timestamp).
1589 * place event id # at far right for easier visual parsing. */
1590 for (i = 0; i < num_events; i++) {
1591 ev = iwl_read_targ_mem(priv, ptr);
1592 ptr += sizeof(u32);
1593 time = iwl_read_targ_mem(priv, ptr);
1594 ptr += sizeof(u32);
1595 if (mode == 0) {
1596 /* data, ev */
1597 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1598 } else {
1599 data = iwl_read_targ_mem(priv, ptr);
1600 ptr += sizeof(u32);
1601 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
1602 }
1603 }
1604 }
1605
1606 void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1607 {
1608 u32 base; /* SRAM byte address of event log header */
1609 u32 capacity; /* event log capacity in # entries */
1610 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1611 u32 num_wraps; /* # times uCode wrapped to top of log */
1612 u32 next_entry; /* index of next entry to be written by uCode */
1613 u32 size; /* # entries that we'll print */
1614
1615 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1616 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1617 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1618 return;
1619 }
1620
1621 /* event log header */
1622 capacity = iwl_read_targ_mem(priv, base);
1623 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1624 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1625 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1626
1627 size = num_wraps ? capacity : next_entry;
1628
1629 /* bail out if nothing in log */
1630 if (size == 0) {
1631 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1632 return;
1633 }
1634
1635 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1636 size, num_wraps);
1637
1638 /* if uCode has wrapped back to top of log, start at the oldest entry,
1639 * i.e the next one that uCode would fill. */
1640 if (num_wraps)
1641 iwl3945_print_event_log(priv, next_entry,
1642 capacity - next_entry, mode);
1643
1644 /* (then/else) start at top of log */
1645 iwl3945_print_event_log(priv, 0, next_entry, mode);
1646
1647 }
1648 #else
1649 void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1650 {
1651 }
1652
1653 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1654 {
1655 }
1656
1657 #endif
1658
1659 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1660 {
1661 u32 inta, handled = 0;
1662 u32 inta_fh;
1663 unsigned long flags;
1664 #ifdef CONFIG_IWLWIFI_DEBUG
1665 u32 inta_mask;
1666 #endif
1667
1668 spin_lock_irqsave(&priv->lock, flags);
1669
1670 /* Ack/clear/reset pending uCode interrupts.
1671 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1672 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1673 inta = iwl_read32(priv, CSR_INT);
1674 iwl_write32(priv, CSR_INT, inta);
1675
1676 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1677 * Any new interrupts that happen after this, either while we're
1678 * in this tasklet, or later, will show up in next ISR/tasklet. */
1679 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1680 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1681
1682 #ifdef CONFIG_IWLWIFI_DEBUG
1683 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1684 /* just for debug */
1685 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1686 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1687 inta, inta_mask, inta_fh);
1688 }
1689 #endif
1690
1691 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1692 * atomic, make sure that inta covers all the interrupts that
1693 * we've discovered, even if FH interrupt came in just after
1694 * reading CSR_INT. */
1695 if (inta_fh & CSR39_FH_INT_RX_MASK)
1696 inta |= CSR_INT_BIT_FH_RX;
1697 if (inta_fh & CSR39_FH_INT_TX_MASK)
1698 inta |= CSR_INT_BIT_FH_TX;
1699
1700 /* Now service all interrupt bits discovered above. */
1701 if (inta & CSR_INT_BIT_HW_ERR) {
1702 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1703
1704 /* Tell the device to stop sending interrupts */
1705 iwl_disable_interrupts(priv);
1706
1707 priv->isr_stats.hw++;
1708 iwl_irq_handle_error(priv);
1709
1710 handled |= CSR_INT_BIT_HW_ERR;
1711
1712 spin_unlock_irqrestore(&priv->lock, flags);
1713
1714 return;
1715 }
1716
1717 #ifdef CONFIG_IWLWIFI_DEBUG
1718 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1719 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1720 if (inta & CSR_INT_BIT_SCD) {
1721 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1722 "the frame/frames.\n");
1723 priv->isr_stats.sch++;
1724 }
1725
1726 /* Alive notification via Rx interrupt will do the real work */
1727 if (inta & CSR_INT_BIT_ALIVE) {
1728 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1729 priv->isr_stats.alive++;
1730 }
1731 }
1732 #endif
1733 /* Safely ignore these bits for debug checks below */
1734 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1735
1736 /* Error detected by uCode */
1737 if (inta & CSR_INT_BIT_SW_ERR) {
1738 IWL_ERR(priv, "Microcode SW error detected. "
1739 "Restarting 0x%X.\n", inta);
1740 priv->isr_stats.sw++;
1741 priv->isr_stats.sw_err = inta;
1742 iwl_irq_handle_error(priv);
1743 handled |= CSR_INT_BIT_SW_ERR;
1744 }
1745
1746 /* uCode wakes up after power-down sleep */
1747 if (inta & CSR_INT_BIT_WAKEUP) {
1748 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1749 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1750 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1751 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1752 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1753 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1754 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1755 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1756
1757 priv->isr_stats.wakeup++;
1758 handled |= CSR_INT_BIT_WAKEUP;
1759 }
1760
1761 /* All uCode command responses, including Tx command responses,
1762 * Rx "responses" (frame-received notification), and other
1763 * notifications from uCode come through here*/
1764 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1765 iwl3945_rx_handle(priv);
1766 priv->isr_stats.rx++;
1767 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1768 }
1769
1770 if (inta & CSR_INT_BIT_FH_TX) {
1771 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1772 priv->isr_stats.tx++;
1773
1774 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1775 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1776 (FH39_SRVC_CHNL), 0x0);
1777 handled |= CSR_INT_BIT_FH_TX;
1778 }
1779
1780 if (inta & ~handled) {
1781 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1782 priv->isr_stats.unhandled++;
1783 }
1784
1785 if (inta & ~priv->inta_mask) {
1786 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1787 inta & ~priv->inta_mask);
1788 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1789 }
1790
1791 /* Re-enable all interrupts */
1792 /* only Re-enable if disabled by irq */
1793 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1794 iwl_enable_interrupts(priv);
1795
1796 #ifdef CONFIG_IWLWIFI_DEBUG
1797 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1798 inta = iwl_read32(priv, CSR_INT);
1799 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1800 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1801 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1802 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1803 }
1804 #endif
1805 spin_unlock_irqrestore(&priv->lock, flags);
1806 }
1807
1808 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1809 enum ieee80211_band band,
1810 u8 is_active, u8 n_probes,
1811 struct iwl3945_scan_channel *scan_ch)
1812 {
1813 struct ieee80211_channel *chan;
1814 const struct ieee80211_supported_band *sband;
1815 const struct iwl_channel_info *ch_info;
1816 u16 passive_dwell = 0;
1817 u16 active_dwell = 0;
1818 int added, i;
1819
1820 sband = iwl_get_hw_mode(priv, band);
1821 if (!sband)
1822 return 0;
1823
1824 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1825 passive_dwell = iwl_get_passive_dwell_time(priv, band);
1826
1827 if (passive_dwell <= active_dwell)
1828 passive_dwell = active_dwell + 1;
1829
1830 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1831 chan = priv->scan_request->channels[i];
1832
1833 if (chan->band != band)
1834 continue;
1835
1836 scan_ch->channel = chan->hw_value;
1837
1838 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1839 if (!is_channel_valid(ch_info)) {
1840 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1841 scan_ch->channel);
1842 continue;
1843 }
1844
1845 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1846 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1847 /* If passive , set up for auto-switch
1848 * and use long active_dwell time.
1849 */
1850 if (!is_active || is_channel_passive(ch_info) ||
1851 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1852 scan_ch->type = 0; /* passive */
1853 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1854 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1855 } else {
1856 scan_ch->type = 1; /* active */
1857 }
1858
1859 /* Set direct probe bits. These may be used both for active
1860 * scan channels (probes gets sent right away),
1861 * or for passive channels (probes get se sent only after
1862 * hearing clear Rx packet).*/
1863 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1864 if (n_probes)
1865 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1866 } else {
1867 /* uCode v1 does not allow setting direct probe bits on
1868 * passive channel. */
1869 if ((scan_ch->type & 1) && n_probes)
1870 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1871 }
1872
1873 /* Set txpower levels to defaults */
1874 scan_ch->tpc.dsp_atten = 110;
1875 /* scan_pwr_info->tpc.dsp_atten; */
1876
1877 /*scan_pwr_info->tpc.tx_gain; */
1878 if (band == IEEE80211_BAND_5GHZ)
1879 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1880 else {
1881 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1882 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1883 * power level:
1884 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1885 */
1886 }
1887
1888 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1889 scan_ch->channel,
1890 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1891 (scan_ch->type & 1) ?
1892 active_dwell : passive_dwell);
1893
1894 scan_ch++;
1895 added++;
1896 }
1897
1898 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
1899 return added;
1900 }
1901
1902 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1903 struct ieee80211_rate *rates)
1904 {
1905 int i;
1906
1907 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1908 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1909 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1910 rates[i].hw_value_short = i;
1911 rates[i].flags = 0;
1912 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1913 /*
1914 * If CCK != 1M then set short preamble rate flag.
1915 */
1916 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1917 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1918 }
1919 }
1920 }
1921
1922 /******************************************************************************
1923 *
1924 * uCode download functions
1925 *
1926 ******************************************************************************/
1927
1928 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1929 {
1930 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1931 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1932 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1933 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1934 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1935 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1936 }
1937
1938 /**
1939 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1940 * looking at all data.
1941 */
1942 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1943 {
1944 u32 val;
1945 u32 save_len = len;
1946 int rc = 0;
1947 u32 errcnt;
1948
1949 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1950
1951 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1952 IWL39_RTC_INST_LOWER_BOUND);
1953
1954 errcnt = 0;
1955 for (; len > 0; len -= sizeof(u32), image++) {
1956 /* read data comes through single port, auto-incr addr */
1957 /* NOTE: Use the debugless read so we don't flood kernel log
1958 * if IWL_DL_IO is set */
1959 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1960 if (val != le32_to_cpu(*image)) {
1961 IWL_ERR(priv, "uCode INST section is invalid at "
1962 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1963 save_len - len, val, le32_to_cpu(*image));
1964 rc = -EIO;
1965 errcnt++;
1966 if (errcnt >= 20)
1967 break;
1968 }
1969 }
1970
1971
1972 if (!errcnt)
1973 IWL_DEBUG_INFO(priv,
1974 "ucode image in INSTRUCTION memory is good\n");
1975
1976 return rc;
1977 }
1978
1979
1980 /**
1981 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1982 * using sample data 100 bytes apart. If these sample points are good,
1983 * it's a pretty good bet that everything between them is good, too.
1984 */
1985 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1986 {
1987 u32 val;
1988 int rc = 0;
1989 u32 errcnt = 0;
1990 u32 i;
1991
1992 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1993
1994 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1995 /* read data comes through single port, auto-incr addr */
1996 /* NOTE: Use the debugless read so we don't flood kernel log
1997 * if IWL_DL_IO is set */
1998 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1999 i + IWL39_RTC_INST_LOWER_BOUND);
2000 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2001 if (val != le32_to_cpu(*image)) {
2002 #if 0 /* Enable this if you want to see details */
2003 IWL_ERR(priv, "uCode INST section is invalid at "
2004 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2005 i, val, *image);
2006 #endif
2007 rc = -EIO;
2008 errcnt++;
2009 if (errcnt >= 3)
2010 break;
2011 }
2012 }
2013
2014 return rc;
2015 }
2016
2017
2018 /**
2019 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2020 * and verify its contents
2021 */
2022 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2023 {
2024 __le32 *image;
2025 u32 len;
2026 int rc = 0;
2027
2028 /* Try bootstrap */
2029 image = (__le32 *)priv->ucode_boot.v_addr;
2030 len = priv->ucode_boot.len;
2031 rc = iwl3945_verify_inst_sparse(priv, image, len);
2032 if (rc == 0) {
2033 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2034 return 0;
2035 }
2036
2037 /* Try initialize */
2038 image = (__le32 *)priv->ucode_init.v_addr;
2039 len = priv->ucode_init.len;
2040 rc = iwl3945_verify_inst_sparse(priv, image, len);
2041 if (rc == 0) {
2042 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2043 return 0;
2044 }
2045
2046 /* Try runtime/protocol */
2047 image = (__le32 *)priv->ucode_code.v_addr;
2048 len = priv->ucode_code.len;
2049 rc = iwl3945_verify_inst_sparse(priv, image, len);
2050 if (rc == 0) {
2051 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2052 return 0;
2053 }
2054
2055 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2056
2057 /* Since nothing seems to match, show first several data entries in
2058 * instruction SRAM, so maybe visual inspection will give a clue.
2059 * Selection of bootstrap image (vs. other images) is arbitrary. */
2060 image = (__le32 *)priv->ucode_boot.v_addr;
2061 len = priv->ucode_boot.len;
2062 rc = iwl3945_verify_inst_full(priv, image, len);
2063
2064 return rc;
2065 }
2066
2067 static void iwl3945_nic_start(struct iwl_priv *priv)
2068 {
2069 /* Remove all resets to allow NIC to operate */
2070 iwl_write32(priv, CSR_RESET, 0);
2071 }
2072
2073 /**
2074 * iwl3945_read_ucode - Read uCode images from disk file.
2075 *
2076 * Copy into buffers for card to fetch via bus-mastering
2077 */
2078 static int iwl3945_read_ucode(struct iwl_priv *priv)
2079 {
2080 const struct iwl_ucode_header *ucode;
2081 int ret = -EINVAL, index;
2082 const struct firmware *ucode_raw;
2083 /* firmware file name contains uCode/driver compatibility version */
2084 const char *name_pre = priv->cfg->fw_name_pre;
2085 const unsigned int api_max = priv->cfg->ucode_api_max;
2086 const unsigned int api_min = priv->cfg->ucode_api_min;
2087 char buf[25];
2088 u8 *src;
2089 size_t len;
2090 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2091
2092 /* Ask kernel firmware_class module to get the boot firmware off disk.
2093 * request_firmware() is synchronous, file is in memory on return. */
2094 for (index = api_max; index >= api_min; index--) {
2095 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2096 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2097 if (ret < 0) {
2098 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2099 buf, ret);
2100 if (ret == -ENOENT)
2101 continue;
2102 else
2103 goto error;
2104 } else {
2105 if (index < api_max)
2106 IWL_ERR(priv, "Loaded firmware %s, "
2107 "which is deprecated. "
2108 " Please use API v%u instead.\n",
2109 buf, api_max);
2110 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2111 "(%zd bytes) from disk\n",
2112 buf, ucode_raw->size);
2113 break;
2114 }
2115 }
2116
2117 if (ret < 0)
2118 goto error;
2119
2120 /* Make sure that we got at least our header! */
2121 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
2122 IWL_ERR(priv, "File size way too small!\n");
2123 ret = -EINVAL;
2124 goto err_release;
2125 }
2126
2127 /* Data from ucode file: header followed by uCode images */
2128 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2129
2130 priv->ucode_ver = le32_to_cpu(ucode->ver);
2131 api_ver = IWL_UCODE_API(priv->ucode_ver);
2132 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2133 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2134 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2135 init_data_size =
2136 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2137 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2138 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
2139
2140 /* api_ver should match the api version forming part of the
2141 * firmware filename ... but we don't check for that and only rely
2142 * on the API version read from firmware header from here on forward */
2143
2144 if (api_ver < api_min || api_ver > api_max) {
2145 IWL_ERR(priv, "Driver unable to support your firmware API. "
2146 "Driver supports v%u, firmware is v%u.\n",
2147 api_max, api_ver);
2148 priv->ucode_ver = 0;
2149 ret = -EINVAL;
2150 goto err_release;
2151 }
2152 if (api_ver != api_max)
2153 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2154 "got %u. New firmware can be obtained "
2155 "from http://www.intellinuxwireless.org.\n",
2156 api_max, api_ver);
2157
2158 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2159 IWL_UCODE_MAJOR(priv->ucode_ver),
2160 IWL_UCODE_MINOR(priv->ucode_ver),
2161 IWL_UCODE_API(priv->ucode_ver),
2162 IWL_UCODE_SERIAL(priv->ucode_ver));
2163
2164 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2165 priv->ucode_ver);
2166 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2167 inst_size);
2168 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2169 data_size);
2170 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2171 init_size);
2172 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2173 init_data_size);
2174 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2175 boot_size);
2176
2177
2178 /* Verify size of file vs. image size info in file's header */
2179 if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
2180 inst_size + data_size + init_size +
2181 init_data_size + boot_size) {
2182
2183 IWL_DEBUG_INFO(priv,
2184 "uCode file size %zd does not match expected size\n",
2185 ucode_raw->size);
2186 ret = -EINVAL;
2187 goto err_release;
2188 }
2189
2190 /* Verify that uCode images will fit in card's SRAM */
2191 if (inst_size > IWL39_MAX_INST_SIZE) {
2192 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2193 inst_size);
2194 ret = -EINVAL;
2195 goto err_release;
2196 }
2197
2198 if (data_size > IWL39_MAX_DATA_SIZE) {
2199 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2200 data_size);
2201 ret = -EINVAL;
2202 goto err_release;
2203 }
2204 if (init_size > IWL39_MAX_INST_SIZE) {
2205 IWL_DEBUG_INFO(priv,
2206 "uCode init instr len %d too large to fit in\n",
2207 init_size);
2208 ret = -EINVAL;
2209 goto err_release;
2210 }
2211 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2212 IWL_DEBUG_INFO(priv,
2213 "uCode init data len %d too large to fit in\n",
2214 init_data_size);
2215 ret = -EINVAL;
2216 goto err_release;
2217 }
2218 if (boot_size > IWL39_MAX_BSM_SIZE) {
2219 IWL_DEBUG_INFO(priv,
2220 "uCode boot instr len %d too large to fit in\n",
2221 boot_size);
2222 ret = -EINVAL;
2223 goto err_release;
2224 }
2225
2226 /* Allocate ucode buffers for card's bus-master loading ... */
2227
2228 /* Runtime instructions and 2 copies of data:
2229 * 1) unmodified from disk
2230 * 2) backup cache for save/restore during power-downs */
2231 priv->ucode_code.len = inst_size;
2232 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2233
2234 priv->ucode_data.len = data_size;
2235 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2236
2237 priv->ucode_data_backup.len = data_size;
2238 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2239
2240 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2241 !priv->ucode_data_backup.v_addr)
2242 goto err_pci_alloc;
2243
2244 /* Initialization instructions and data */
2245 if (init_size && init_data_size) {
2246 priv->ucode_init.len = init_size;
2247 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2248
2249 priv->ucode_init_data.len = init_data_size;
2250 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2251
2252 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2253 goto err_pci_alloc;
2254 }
2255
2256 /* Bootstrap (instructions only, no data) */
2257 if (boot_size) {
2258 priv->ucode_boot.len = boot_size;
2259 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2260
2261 if (!priv->ucode_boot.v_addr)
2262 goto err_pci_alloc;
2263 }
2264
2265 /* Copy images into buffers for card's bus-master reads ... */
2266
2267 /* Runtime instructions (first block of data in file) */
2268 len = inst_size;
2269 IWL_DEBUG_INFO(priv,
2270 "Copying (but not loading) uCode instr len %zd\n", len);
2271 memcpy(priv->ucode_code.v_addr, src, len);
2272 src += len;
2273
2274 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2275 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2276
2277 /* Runtime data (2nd block)
2278 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2279 len = data_size;
2280 IWL_DEBUG_INFO(priv,
2281 "Copying (but not loading) uCode data len %zd\n", len);
2282 memcpy(priv->ucode_data.v_addr, src, len);
2283 memcpy(priv->ucode_data_backup.v_addr, src, len);
2284 src += len;
2285
2286 /* Initialization instructions (3rd block) */
2287 if (init_size) {
2288 len = init_size;
2289 IWL_DEBUG_INFO(priv,
2290 "Copying (but not loading) init instr len %zd\n", len);
2291 memcpy(priv->ucode_init.v_addr, src, len);
2292 src += len;
2293 }
2294
2295 /* Initialization data (4th block) */
2296 if (init_data_size) {
2297 len = init_data_size;
2298 IWL_DEBUG_INFO(priv,
2299 "Copying (but not loading) init data len %zd\n", len);
2300 memcpy(priv->ucode_init_data.v_addr, src, len);
2301 src += len;
2302 }
2303
2304 /* Bootstrap instructions (5th block) */
2305 len = boot_size;
2306 IWL_DEBUG_INFO(priv,
2307 "Copying (but not loading) boot instr len %zd\n", len);
2308 memcpy(priv->ucode_boot.v_addr, src, len);
2309
2310 /* We have our copies now, allow OS release its copies */
2311 release_firmware(ucode_raw);
2312 return 0;
2313
2314 err_pci_alloc:
2315 IWL_ERR(priv, "failed to allocate pci memory\n");
2316 ret = -ENOMEM;
2317 iwl3945_dealloc_ucode_pci(priv);
2318
2319 err_release:
2320 release_firmware(ucode_raw);
2321
2322 error:
2323 return ret;
2324 }
2325
2326
2327 /**
2328 * iwl3945_set_ucode_ptrs - Set uCode address location
2329 *
2330 * Tell initialization uCode where to find runtime uCode.
2331 *
2332 * BSM registers initially contain pointers to initialization uCode.
2333 * We need to replace them to load runtime uCode inst and data,
2334 * and to save runtime data when powering down.
2335 */
2336 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2337 {
2338 dma_addr_t pinst;
2339 dma_addr_t pdata;
2340
2341 /* bits 31:0 for 3945 */
2342 pinst = priv->ucode_code.p_addr;
2343 pdata = priv->ucode_data_backup.p_addr;
2344
2345 /* Tell bootstrap uCode where to find image to load */
2346 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2347 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2348 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2349 priv->ucode_data.len);
2350
2351 /* Inst byte count must be last to set up, bit 31 signals uCode
2352 * that all new ptr/size info is in place */
2353 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2354 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2355
2356 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2357
2358 return 0;
2359 }
2360
2361 /**
2362 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2363 *
2364 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2365 *
2366 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2367 */
2368 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2369 {
2370 /* Check alive response for "valid" sign from uCode */
2371 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2372 /* We had an error bringing up the hardware, so take it
2373 * all the way back down so we can try again */
2374 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2375 goto restart;
2376 }
2377
2378 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2379 * This is a paranoid check, because we would not have gotten the
2380 * "initialize" alive if code weren't properly loaded. */
2381 if (iwl3945_verify_ucode(priv)) {
2382 /* Runtime instruction load was bad;
2383 * take it all the way back down so we can try again */
2384 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2385 goto restart;
2386 }
2387
2388 /* Send pointers to protocol/runtime uCode image ... init code will
2389 * load and launch runtime uCode, which will send us another "Alive"
2390 * notification. */
2391 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2392 if (iwl3945_set_ucode_ptrs(priv)) {
2393 /* Runtime instruction load won't happen;
2394 * take it all the way back down so we can try again */
2395 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2396 goto restart;
2397 }
2398 return;
2399
2400 restart:
2401 queue_work(priv->workqueue, &priv->restart);
2402 }
2403
2404 /**
2405 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2406 * from protocol/runtime uCode (initialization uCode's
2407 * Alive gets handled by iwl3945_init_alive_start()).
2408 */
2409 static void iwl3945_alive_start(struct iwl_priv *priv)
2410 {
2411 int thermal_spin = 0;
2412 u32 rfkill;
2413
2414 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2415
2416 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2417 /* We had an error bringing up the hardware, so take it
2418 * all the way back down so we can try again */
2419 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2420 goto restart;
2421 }
2422
2423 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2424 * This is a paranoid check, because we would not have gotten the
2425 * "runtime" alive if code weren't properly loaded. */
2426 if (iwl3945_verify_ucode(priv)) {
2427 /* Runtime instruction load was bad;
2428 * take it all the way back down so we can try again */
2429 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2430 goto restart;
2431 }
2432
2433 iwl_clear_stations_table(priv);
2434
2435 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2436 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2437
2438 if (rfkill & 0x1) {
2439 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2440 /* if RFKILL is not on, then wait for thermal
2441 * sensor in adapter to kick in */
2442 while (iwl3945_hw_get_temperature(priv) == 0) {
2443 thermal_spin++;
2444 udelay(10);
2445 }
2446
2447 if (thermal_spin)
2448 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2449 thermal_spin * 10);
2450 } else
2451 set_bit(STATUS_RF_KILL_HW, &priv->status);
2452
2453 /* After the ALIVE response, we can send commands to 3945 uCode */
2454 set_bit(STATUS_ALIVE, &priv->status);
2455
2456 if (iwl_is_rfkill(priv))
2457 return;
2458
2459 ieee80211_wake_queues(priv->hw);
2460
2461 priv->active_rate = priv->rates_mask;
2462 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2463
2464 iwl_power_update_mode(priv, false);
2465
2466 if (iwl_is_associated(priv)) {
2467 struct iwl3945_rxon_cmd *active_rxon =
2468 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2469
2470 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2471 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2472 } else {
2473 /* Initialize our rx_config data */
2474 iwl_connection_init_rx_config(priv, priv->iw_mode);
2475 }
2476
2477 /* Configure Bluetooth device coexistence support */
2478 iwl_send_bt_config(priv);
2479
2480 /* Configure the adapter for unassociated operation */
2481 iwlcore_commit_rxon(priv);
2482
2483 iwl3945_reg_txpower_periodic(priv);
2484
2485 iwl3945_led_register(priv);
2486
2487 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2488 set_bit(STATUS_READY, &priv->status);
2489 wake_up_interruptible(&priv->wait_command_queue);
2490
2491 /* reassociate for ADHOC mode */
2492 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2493 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2494 priv->vif);
2495 if (beacon)
2496 iwl_mac_beacon_update(priv->hw, beacon);
2497 }
2498
2499 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2500 iwl_set_mode(priv, priv->iw_mode);
2501
2502 return;
2503
2504 restart:
2505 queue_work(priv->workqueue, &priv->restart);
2506 }
2507
2508 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2509
2510 static void __iwl3945_down(struct iwl_priv *priv)
2511 {
2512 unsigned long flags;
2513 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2514 struct ieee80211_conf *conf = NULL;
2515
2516 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2517
2518 conf = ieee80211_get_hw_conf(priv->hw);
2519
2520 if (!exit_pending)
2521 set_bit(STATUS_EXIT_PENDING, &priv->status);
2522
2523 iwl3945_led_unregister(priv);
2524 iwl_clear_stations_table(priv);
2525
2526 /* Unblock any waiting calls */
2527 wake_up_interruptible_all(&priv->wait_command_queue);
2528
2529 /* Wipe out the EXIT_PENDING status bit if we are not actually
2530 * exiting the module */
2531 if (!exit_pending)
2532 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2533
2534 /* stop and reset the on-board processor */
2535 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2536
2537 /* tell the device to stop sending interrupts */
2538 spin_lock_irqsave(&priv->lock, flags);
2539 iwl_disable_interrupts(priv);
2540 spin_unlock_irqrestore(&priv->lock, flags);
2541 iwl_synchronize_irq(priv);
2542
2543 if (priv->mac80211_registered)
2544 ieee80211_stop_queues(priv->hw);
2545
2546 /* If we have not previously called iwl3945_init() then
2547 * clear all bits but the RF Kill bits and return */
2548 if (!iwl_is_init(priv)) {
2549 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2550 STATUS_RF_KILL_HW |
2551 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2552 STATUS_GEO_CONFIGURED |
2553 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2554 STATUS_EXIT_PENDING;
2555 goto exit;
2556 }
2557
2558 /* ...otherwise clear out all the status bits but the RF Kill
2559 * bit and continue taking the NIC down. */
2560 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2561 STATUS_RF_KILL_HW |
2562 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2563 STATUS_GEO_CONFIGURED |
2564 test_bit(STATUS_FW_ERROR, &priv->status) <<
2565 STATUS_FW_ERROR |
2566 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2567 STATUS_EXIT_PENDING;
2568
2569 priv->cfg->ops->lib->apm_ops.reset(priv);
2570 spin_lock_irqsave(&priv->lock, flags);
2571 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2572 spin_unlock_irqrestore(&priv->lock, flags);
2573
2574 iwl3945_hw_txq_ctx_stop(priv);
2575 iwl3945_hw_rxq_stop(priv);
2576
2577 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2578 APMG_CLK_VAL_DMA_CLK_RQT);
2579
2580 udelay(5);
2581
2582 if (exit_pending)
2583 priv->cfg->ops->lib->apm_ops.stop(priv);
2584 else
2585 priv->cfg->ops->lib->apm_ops.reset(priv);
2586
2587 exit:
2588 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2589
2590 if (priv->ibss_beacon)
2591 dev_kfree_skb(priv->ibss_beacon);
2592 priv->ibss_beacon = NULL;
2593
2594 /* clear out any free frames */
2595 iwl3945_clear_free_frames(priv);
2596 }
2597
2598 static void iwl3945_down(struct iwl_priv *priv)
2599 {
2600 mutex_lock(&priv->mutex);
2601 __iwl3945_down(priv);
2602 mutex_unlock(&priv->mutex);
2603
2604 iwl3945_cancel_deferred_work(priv);
2605 }
2606
2607 #define MAX_HW_RESTARTS 5
2608
2609 static int __iwl3945_up(struct iwl_priv *priv)
2610 {
2611 int rc, i;
2612
2613 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2614 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2615 return -EIO;
2616 }
2617
2618 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2619 IWL_ERR(priv, "ucode not available for device bring up\n");
2620 return -EIO;
2621 }
2622
2623 /* If platform's RF_KILL switch is NOT set to KILL */
2624 if (iwl_read32(priv, CSR_GP_CNTRL) &
2625 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2626 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2627 else {
2628 set_bit(STATUS_RF_KILL_HW, &priv->status);
2629 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2630 return -ENODEV;
2631 }
2632
2633 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2634
2635 rc = iwl3945_hw_nic_init(priv);
2636 if (rc) {
2637 IWL_ERR(priv, "Unable to int nic\n");
2638 return rc;
2639 }
2640
2641 /* make sure rfkill handshake bits are cleared */
2642 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2643 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2644 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2645
2646 /* clear (again), then enable host interrupts */
2647 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2648 iwl_enable_interrupts(priv);
2649
2650 /* really make sure rfkill handshake bits are cleared */
2651 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2652 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2653
2654 /* Copy original ucode data image from disk into backup cache.
2655 * This will be used to initialize the on-board processor's
2656 * data SRAM for a clean start when the runtime program first loads. */
2657 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2658 priv->ucode_data.len);
2659
2660 /* We return success when we resume from suspend and rf_kill is on. */
2661 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2662 return 0;
2663
2664 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2665
2666 iwl_clear_stations_table(priv);
2667
2668 /* load bootstrap state machine,
2669 * load bootstrap program into processor's memory,
2670 * prepare to load the "initialize" uCode */
2671 priv->cfg->ops->lib->load_ucode(priv);
2672
2673 if (rc) {
2674 IWL_ERR(priv,
2675 "Unable to set up bootstrap uCode: %d\n", rc);
2676 continue;
2677 }
2678
2679 /* start card; "initialize" will load runtime ucode */
2680 iwl3945_nic_start(priv);
2681
2682 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2683
2684 return 0;
2685 }
2686
2687 set_bit(STATUS_EXIT_PENDING, &priv->status);
2688 __iwl3945_down(priv);
2689 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2690
2691 /* tried to restart and config the device for as long as our
2692 * patience could withstand */
2693 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2694 return -EIO;
2695 }
2696
2697
2698 /*****************************************************************************
2699 *
2700 * Workqueue callbacks
2701 *
2702 *****************************************************************************/
2703
2704 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2705 {
2706 struct iwl_priv *priv =
2707 container_of(data, struct iwl_priv, init_alive_start.work);
2708
2709 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2710 return;
2711
2712 mutex_lock(&priv->mutex);
2713 iwl3945_init_alive_start(priv);
2714 mutex_unlock(&priv->mutex);
2715 }
2716
2717 static void iwl3945_bg_alive_start(struct work_struct *data)
2718 {
2719 struct iwl_priv *priv =
2720 container_of(data, struct iwl_priv, alive_start.work);
2721
2722 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2723 return;
2724
2725 mutex_lock(&priv->mutex);
2726 iwl3945_alive_start(priv);
2727 mutex_unlock(&priv->mutex);
2728 }
2729
2730 static void iwl3945_rfkill_poll(struct work_struct *data)
2731 {
2732 struct iwl_priv *priv =
2733 container_of(data, struct iwl_priv, rfkill_poll.work);
2734
2735 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2736 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2737 else
2738 set_bit(STATUS_RF_KILL_HW, &priv->status);
2739
2740 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2741 test_bit(STATUS_RF_KILL_HW, &priv->status));
2742
2743 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2744 round_jiffies_relative(2 * HZ));
2745
2746 }
2747
2748 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
2749 static void iwl3945_bg_request_scan(struct work_struct *data)
2750 {
2751 struct iwl_priv *priv =
2752 container_of(data, struct iwl_priv, request_scan);
2753 struct iwl_host_cmd cmd = {
2754 .id = REPLY_SCAN_CMD,
2755 .len = sizeof(struct iwl3945_scan_cmd),
2756 .flags = CMD_SIZE_HUGE,
2757 };
2758 int rc = 0;
2759 struct iwl3945_scan_cmd *scan;
2760 struct ieee80211_conf *conf = NULL;
2761 u8 n_probes = 0;
2762 enum ieee80211_band band;
2763 bool is_active = false;
2764
2765 conf = ieee80211_get_hw_conf(priv->hw);
2766
2767 mutex_lock(&priv->mutex);
2768
2769 cancel_delayed_work(&priv->scan_check);
2770
2771 if (!iwl_is_ready(priv)) {
2772 IWL_WARN(priv, "request scan called when driver not ready.\n");
2773 goto done;
2774 }
2775
2776 /* Make sure the scan wasn't canceled before this queued work
2777 * was given the chance to run... */
2778 if (!test_bit(STATUS_SCANNING, &priv->status))
2779 goto done;
2780
2781 /* This should never be called or scheduled if there is currently
2782 * a scan active in the hardware. */
2783 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2784 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2785 "Ignoring second request.\n");
2786 rc = -EIO;
2787 goto done;
2788 }
2789
2790 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2791 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2792 goto done;
2793 }
2794
2795 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2796 IWL_DEBUG_HC(priv,
2797 "Scan request while abort pending. Queuing.\n");
2798 goto done;
2799 }
2800
2801 if (iwl_is_rfkill(priv)) {
2802 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2803 goto done;
2804 }
2805
2806 if (!test_bit(STATUS_READY, &priv->status)) {
2807 IWL_DEBUG_HC(priv,
2808 "Scan request while uninitialized. Queuing.\n");
2809 goto done;
2810 }
2811
2812 if (!priv->scan_bands) {
2813 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
2814 goto done;
2815 }
2816
2817 if (!priv->scan) {
2818 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2819 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2820 if (!priv->scan) {
2821 rc = -ENOMEM;
2822 goto done;
2823 }
2824 }
2825 scan = priv->scan;
2826 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2827
2828 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2829 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2830
2831 if (iwl_is_associated(priv)) {
2832 u16 interval = 0;
2833 u32 extra;
2834 u32 suspend_time = 100;
2835 u32 scan_suspend_time = 100;
2836 unsigned long flags;
2837
2838 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2839
2840 spin_lock_irqsave(&priv->lock, flags);
2841 interval = priv->beacon_int;
2842 spin_unlock_irqrestore(&priv->lock, flags);
2843
2844 scan->suspend_time = 0;
2845 scan->max_out_time = cpu_to_le32(200 * 1024);
2846 if (!interval)
2847 interval = suspend_time;
2848 /*
2849 * suspend time format:
2850 * 0-19: beacon interval in usec (time before exec.)
2851 * 20-23: 0
2852 * 24-31: number of beacons (suspend between channels)
2853 */
2854
2855 extra = (suspend_time / interval) << 24;
2856 scan_suspend_time = 0xFF0FFFFF &
2857 (extra | ((suspend_time % interval) * 1024));
2858
2859 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2860 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2861 scan_suspend_time, interval);
2862 }
2863
2864 if (priv->scan_request->n_ssids) {
2865 int i, p = 0;
2866 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2867 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2868 /* always does wildcard anyway */
2869 if (!priv->scan_request->ssids[i].ssid_len)
2870 continue;
2871 scan->direct_scan[p].id = WLAN_EID_SSID;
2872 scan->direct_scan[p].len =
2873 priv->scan_request->ssids[i].ssid_len;
2874 memcpy(scan->direct_scan[p].ssid,
2875 priv->scan_request->ssids[i].ssid,
2876 priv->scan_request->ssids[i].ssid_len);
2877 n_probes++;
2878 p++;
2879 }
2880 is_active = true;
2881 } else
2882 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2883
2884 /* We don't build a direct scan probe request; the uCode will do
2885 * that based on the direct_mask added to each channel entry */
2886 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2887 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2888 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2889
2890 /* flags + rate selection */
2891
2892 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
2893 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2894 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2895 scan->good_CRC_th = 0;
2896 band = IEEE80211_BAND_2GHZ;
2897 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
2898 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2899 /*
2900 * If active scaning is requested but a certain channel
2901 * is marked passive, we can do active scanning if we
2902 * detect transmissions.
2903 */
2904 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
2905 band = IEEE80211_BAND_5GHZ;
2906 } else {
2907 IWL_WARN(priv, "Invalid scan band count\n");
2908 goto done;
2909 }
2910
2911 scan->tx_cmd.len = cpu_to_le16(
2912 iwl_fill_probe_req(priv,
2913 (struct ieee80211_mgmt *)scan->data,
2914 priv->scan_request->ie,
2915 priv->scan_request->ie_len,
2916 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2917
2918 /* select Rx antennas */
2919 scan->flags |= iwl3945_get_antenna_flags(priv);
2920
2921 if (iwl_is_monitor_mode(priv))
2922 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2923
2924 scan->channel_count =
2925 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2926 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
2927
2928 if (scan->channel_count == 0) {
2929 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2930 goto done;
2931 }
2932
2933 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2934 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2935 cmd.data = scan;
2936 scan->len = cpu_to_le16(cmd.len);
2937
2938 set_bit(STATUS_SCAN_HW, &priv->status);
2939 rc = iwl_send_cmd_sync(priv, &cmd);
2940 if (rc)
2941 goto done;
2942
2943 queue_delayed_work(priv->workqueue, &priv->scan_check,
2944 IWL_SCAN_CHECK_WATCHDOG);
2945
2946 mutex_unlock(&priv->mutex);
2947 return;
2948
2949 done:
2950 /* can not perform scan make sure we clear scanning
2951 * bits from status so next scan request can be performed.
2952 * if we dont clear scanning status bit here all next scan
2953 * will fail
2954 */
2955 clear_bit(STATUS_SCAN_HW, &priv->status);
2956 clear_bit(STATUS_SCANNING, &priv->status);
2957
2958 /* inform mac80211 scan aborted */
2959 queue_work(priv->workqueue, &priv->scan_completed);
2960 mutex_unlock(&priv->mutex);
2961 }
2962
2963 static void iwl3945_bg_up(struct work_struct *data)
2964 {
2965 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2966
2967 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2968 return;
2969
2970 mutex_lock(&priv->mutex);
2971 __iwl3945_up(priv);
2972 mutex_unlock(&priv->mutex);
2973 }
2974
2975 static void iwl3945_bg_restart(struct work_struct *data)
2976 {
2977 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2978
2979 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2980 return;
2981
2982 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2983 mutex_lock(&priv->mutex);
2984 priv->vif = NULL;
2985 priv->is_open = 0;
2986 mutex_unlock(&priv->mutex);
2987 iwl3945_down(priv);
2988 ieee80211_restart_hw(priv->hw);
2989 } else {
2990 iwl3945_down(priv);
2991 queue_work(priv->workqueue, &priv->up);
2992 }
2993 }
2994
2995 static void iwl3945_bg_rx_replenish(struct work_struct *data)
2996 {
2997 struct iwl_priv *priv =
2998 container_of(data, struct iwl_priv, rx_replenish);
2999
3000 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3001 return;
3002
3003 mutex_lock(&priv->mutex);
3004 iwl3945_rx_replenish(priv);
3005 mutex_unlock(&priv->mutex);
3006 }
3007
3008 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3009
3010 void iwl3945_post_associate(struct iwl_priv *priv)
3011 {
3012 int rc = 0;
3013 struct ieee80211_conf *conf = NULL;
3014
3015 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3016 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3017 return;
3018 }
3019
3020
3021 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3022 priv->assoc_id, priv->active_rxon.bssid_addr);
3023
3024 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3025 return;
3026
3027 if (!priv->vif || !priv->is_open)
3028 return;
3029
3030 iwl_scan_cancel_timeout(priv, 200);
3031
3032 conf = ieee80211_get_hw_conf(priv->hw);
3033
3034 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3035 iwlcore_commit_rxon(priv);
3036
3037 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3038 iwl_setup_rxon_timing(priv);
3039 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3040 sizeof(priv->rxon_timing), &priv->rxon_timing);
3041 if (rc)
3042 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3043 "Attempting to continue.\n");
3044
3045 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3046
3047 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3048
3049 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3050 priv->assoc_id, priv->beacon_int);
3051
3052 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3053 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3054 else
3055 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3056
3057 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3058 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3059 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3060 else
3061 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3062
3063 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3064 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3065
3066 }
3067
3068 iwlcore_commit_rxon(priv);
3069
3070 switch (priv->iw_mode) {
3071 case NL80211_IFTYPE_STATION:
3072 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3073 break;
3074
3075 case NL80211_IFTYPE_ADHOC:
3076
3077 priv->assoc_id = 1;
3078 iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
3079 iwl3945_sync_sta(priv, IWL_STA_ID,
3080 (priv->band == IEEE80211_BAND_5GHZ) ?
3081 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3082 CMD_ASYNC);
3083 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3084 iwl3945_send_beacon_cmd(priv);
3085
3086 break;
3087
3088 default:
3089 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3090 __func__, priv->iw_mode);
3091 break;
3092 }
3093
3094 iwl_activate_qos(priv, 0);
3095
3096 /* we have just associated, don't start scan too early */
3097 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
3098 }
3099
3100 /*****************************************************************************
3101 *
3102 * mac80211 entry point functions
3103 *
3104 *****************************************************************************/
3105
3106 #define UCODE_READY_TIMEOUT (2 * HZ)
3107
3108 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3109 {
3110 struct iwl_priv *priv = hw->priv;
3111 int ret;
3112
3113 IWL_DEBUG_MAC80211(priv, "enter\n");
3114
3115 /* we should be verifying the device is ready to be opened */
3116 mutex_lock(&priv->mutex);
3117
3118 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3119 * ucode filename and max sizes are card-specific. */
3120
3121 if (!priv->ucode_code.len) {
3122 ret = iwl3945_read_ucode(priv);
3123 if (ret) {
3124 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3125 mutex_unlock(&priv->mutex);
3126 goto out_release_irq;
3127 }
3128 }
3129
3130 ret = __iwl3945_up(priv);
3131
3132 mutex_unlock(&priv->mutex);
3133
3134 if (ret)
3135 goto out_release_irq;
3136
3137 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3138
3139 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3140 * mac80211 will not be run successfully. */
3141 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3142 test_bit(STATUS_READY, &priv->status),
3143 UCODE_READY_TIMEOUT);
3144 if (!ret) {
3145 if (!test_bit(STATUS_READY, &priv->status)) {
3146 IWL_ERR(priv,
3147 "Wait for START_ALIVE timeout after %dms.\n",
3148 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3149 ret = -ETIMEDOUT;
3150 goto out_release_irq;
3151 }
3152 }
3153
3154 /* ucode is running and will send rfkill notifications,
3155 * no need to poll the killswitch state anymore */
3156 cancel_delayed_work(&priv->rfkill_poll);
3157
3158 priv->is_open = 1;
3159 IWL_DEBUG_MAC80211(priv, "leave\n");
3160 return 0;
3161
3162 out_release_irq:
3163 priv->is_open = 0;
3164 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3165 return ret;
3166 }
3167
3168 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3169 {
3170 struct iwl_priv *priv = hw->priv;
3171
3172 IWL_DEBUG_MAC80211(priv, "enter\n");
3173
3174 if (!priv->is_open) {
3175 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3176 return;
3177 }
3178
3179 priv->is_open = 0;
3180
3181 if (iwl_is_ready_rf(priv)) {
3182 /* stop mac, cancel any scan request and clear
3183 * RXON_FILTER_ASSOC_MSK BIT
3184 */
3185 mutex_lock(&priv->mutex);
3186 iwl_scan_cancel_timeout(priv, 100);
3187 mutex_unlock(&priv->mutex);
3188 }
3189
3190 iwl3945_down(priv);
3191
3192 flush_workqueue(priv->workqueue);
3193
3194 /* start polling the killswitch state again */
3195 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3196 round_jiffies_relative(2 * HZ));
3197
3198 IWL_DEBUG_MAC80211(priv, "leave\n");
3199 }
3200
3201 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3202 {
3203 struct iwl_priv *priv = hw->priv;
3204
3205 IWL_DEBUG_MAC80211(priv, "enter\n");
3206
3207 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3208 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3209
3210 if (iwl3945_tx_skb(priv, skb))
3211 dev_kfree_skb_any(skb);
3212
3213 IWL_DEBUG_MAC80211(priv, "leave\n");
3214 return NETDEV_TX_OK;
3215 }
3216
3217 void iwl3945_config_ap(struct iwl_priv *priv)
3218 {
3219 int rc = 0;
3220
3221 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3222 return;
3223
3224 /* The following should be done only at AP bring up */
3225 if (!(iwl_is_associated(priv))) {
3226
3227 /* RXON - unassoc (to set timing command) */
3228 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3229 iwlcore_commit_rxon(priv);
3230
3231 /* RXON Timing */
3232 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3233 iwl_setup_rxon_timing(priv);
3234 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3235 sizeof(priv->rxon_timing),
3236 &priv->rxon_timing);
3237 if (rc)
3238 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3239 "Attempting to continue.\n");
3240
3241 /* FIXME: what should be the assoc_id for AP? */
3242 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3243 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3244 priv->staging_rxon.flags |=
3245 RXON_FLG_SHORT_PREAMBLE_MSK;
3246 else
3247 priv->staging_rxon.flags &=
3248 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3249
3250 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3251 if (priv->assoc_capability &
3252 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3253 priv->staging_rxon.flags |=
3254 RXON_FLG_SHORT_SLOT_MSK;
3255 else
3256 priv->staging_rxon.flags &=
3257 ~RXON_FLG_SHORT_SLOT_MSK;
3258
3259 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3260 priv->staging_rxon.flags &=
3261 ~RXON_FLG_SHORT_SLOT_MSK;
3262 }
3263 /* restore RXON assoc */
3264 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3265 iwlcore_commit_rxon(priv);
3266 iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
3267 }
3268 iwl3945_send_beacon_cmd(priv);
3269
3270 /* FIXME - we need to add code here to detect a totally new
3271 * configuration, reset the AP, unassoc, rxon timing, assoc,
3272 * clear sta table, add BCAST sta... */
3273 }
3274
3275 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3276 struct ieee80211_vif *vif,
3277 struct ieee80211_sta *sta,
3278 struct ieee80211_key_conf *key)
3279 {
3280 struct iwl_priv *priv = hw->priv;
3281 const u8 *addr;
3282 int ret = 0;
3283 u8 sta_id = IWL_INVALID_STATION;
3284 u8 static_key;
3285
3286 IWL_DEBUG_MAC80211(priv, "enter\n");
3287
3288 if (iwl3945_mod_params.sw_crypto) {
3289 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3290 return -EOPNOTSUPP;
3291 }
3292
3293 addr = sta ? sta->addr : iwl_bcast_addr;
3294 static_key = !iwl_is_associated(priv);
3295
3296 if (!static_key) {
3297 sta_id = iwl_find_station(priv, addr);
3298 if (sta_id == IWL_INVALID_STATION) {
3299 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3300 addr);
3301 return -EINVAL;
3302 }
3303 }
3304
3305 mutex_lock(&priv->mutex);
3306 iwl_scan_cancel_timeout(priv, 100);
3307 mutex_unlock(&priv->mutex);
3308
3309 switch (cmd) {
3310 case SET_KEY:
3311 if (static_key)
3312 ret = iwl3945_set_static_key(priv, key);
3313 else
3314 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3315 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3316 break;
3317 case DISABLE_KEY:
3318 if (static_key)
3319 ret = iwl3945_remove_static_key(priv);
3320 else
3321 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3322 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3323 break;
3324 default:
3325 ret = -EINVAL;
3326 }
3327
3328 IWL_DEBUG_MAC80211(priv, "leave\n");
3329
3330 return ret;
3331 }
3332
3333 /*****************************************************************************
3334 *
3335 * sysfs attributes
3336 *
3337 *****************************************************************************/
3338
3339 #ifdef CONFIG_IWLWIFI_DEBUG
3340
3341 /*
3342 * The following adds a new attribute to the sysfs representation
3343 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3344 * used for controlling the debug level.
3345 *
3346 * See the level definitions in iwl for details.
3347 *
3348 * The debug_level being managed using sysfs below is a per device debug
3349 * level that is used instead of the global debug level if it (the per
3350 * device debug level) is set.
3351 */
3352 static ssize_t show_debug_level(struct device *d,
3353 struct device_attribute *attr, char *buf)
3354 {
3355 struct iwl_priv *priv = dev_get_drvdata(d);
3356 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3357 }
3358 static ssize_t store_debug_level(struct device *d,
3359 struct device_attribute *attr,
3360 const char *buf, size_t count)
3361 {
3362 struct iwl_priv *priv = dev_get_drvdata(d);
3363 unsigned long val;
3364 int ret;
3365
3366 ret = strict_strtoul(buf, 0, &val);
3367 if (ret)
3368 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3369 else {
3370 priv->debug_level = val;
3371 if (iwl_alloc_traffic_mem(priv))
3372 IWL_ERR(priv,
3373 "Not enough memory to generate traffic log\n");
3374 }
3375 return strnlen(buf, count);
3376 }
3377
3378 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3379 show_debug_level, store_debug_level);
3380
3381 #endif /* CONFIG_IWLWIFI_DEBUG */
3382
3383 static ssize_t show_temperature(struct device *d,
3384 struct device_attribute *attr, char *buf)
3385 {
3386 struct iwl_priv *priv = dev_get_drvdata(d);
3387
3388 if (!iwl_is_alive(priv))
3389 return -EAGAIN;
3390
3391 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3392 }
3393
3394 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3395
3396 static ssize_t show_tx_power(struct device *d,
3397 struct device_attribute *attr, char *buf)
3398 {
3399 struct iwl_priv *priv = dev_get_drvdata(d);
3400 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3401 }
3402
3403 static ssize_t store_tx_power(struct device *d,
3404 struct device_attribute *attr,
3405 const char *buf, size_t count)
3406 {
3407 struct iwl_priv *priv = dev_get_drvdata(d);
3408 char *p = (char *)buf;
3409 u32 val;
3410
3411 val = simple_strtoul(p, &p, 10);
3412 if (p == buf)
3413 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3414 else
3415 iwl3945_hw_reg_set_txpower(priv, val);
3416
3417 return count;
3418 }
3419
3420 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3421
3422 static ssize_t show_flags(struct device *d,
3423 struct device_attribute *attr, char *buf)
3424 {
3425 struct iwl_priv *priv = dev_get_drvdata(d);
3426
3427 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3428 }
3429
3430 static ssize_t store_flags(struct device *d,
3431 struct device_attribute *attr,
3432 const char *buf, size_t count)
3433 {
3434 struct iwl_priv *priv = dev_get_drvdata(d);
3435 u32 flags = simple_strtoul(buf, NULL, 0);
3436
3437 mutex_lock(&priv->mutex);
3438 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3439 /* Cancel any currently running scans... */
3440 if (iwl_scan_cancel_timeout(priv, 100))
3441 IWL_WARN(priv, "Could not cancel scan.\n");
3442 else {
3443 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3444 flags);
3445 priv->staging_rxon.flags = cpu_to_le32(flags);
3446 iwlcore_commit_rxon(priv);
3447 }
3448 }
3449 mutex_unlock(&priv->mutex);
3450
3451 return count;
3452 }
3453
3454 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3455
3456 static ssize_t show_filter_flags(struct device *d,
3457 struct device_attribute *attr, char *buf)
3458 {
3459 struct iwl_priv *priv = dev_get_drvdata(d);
3460
3461 return sprintf(buf, "0x%04X\n",
3462 le32_to_cpu(priv->active_rxon.filter_flags));
3463 }
3464
3465 static ssize_t store_filter_flags(struct device *d,
3466 struct device_attribute *attr,
3467 const char *buf, size_t count)
3468 {
3469 struct iwl_priv *priv = dev_get_drvdata(d);
3470 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3471
3472 mutex_lock(&priv->mutex);
3473 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3474 /* Cancel any currently running scans... */
3475 if (iwl_scan_cancel_timeout(priv, 100))
3476 IWL_WARN(priv, "Could not cancel scan.\n");
3477 else {
3478 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3479 "0x%04X\n", filter_flags);
3480 priv->staging_rxon.filter_flags =
3481 cpu_to_le32(filter_flags);
3482 iwlcore_commit_rxon(priv);
3483 }
3484 }
3485 mutex_unlock(&priv->mutex);
3486
3487 return count;
3488 }
3489
3490 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3491 store_filter_flags);
3492
3493 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3494
3495 static ssize_t show_measurement(struct device *d,
3496 struct device_attribute *attr, char *buf)
3497 {
3498 struct iwl_priv *priv = dev_get_drvdata(d);
3499 struct iwl_spectrum_notification measure_report;
3500 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3501 u8 *data = (u8 *)&measure_report;
3502 unsigned long flags;
3503
3504 spin_lock_irqsave(&priv->lock, flags);
3505 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3506 spin_unlock_irqrestore(&priv->lock, flags);
3507 return 0;
3508 }
3509 memcpy(&measure_report, &priv->measure_report, size);
3510 priv->measurement_status = 0;
3511 spin_unlock_irqrestore(&priv->lock, flags);
3512
3513 while (size && (PAGE_SIZE - len)) {
3514 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3515 PAGE_SIZE - len, 1);
3516 len = strlen(buf);
3517 if (PAGE_SIZE - len)
3518 buf[len++] = '\n';
3519
3520 ofs += 16;
3521 size -= min(size, 16U);
3522 }
3523
3524 return len;
3525 }
3526
3527 static ssize_t store_measurement(struct device *d,
3528 struct device_attribute *attr,
3529 const char *buf, size_t count)
3530 {
3531 struct iwl_priv *priv = dev_get_drvdata(d);
3532 struct ieee80211_measurement_params params = {
3533 .channel = le16_to_cpu(priv->active_rxon.channel),
3534 .start_time = cpu_to_le64(priv->last_tsf),
3535 .duration = cpu_to_le16(1),
3536 };
3537 u8 type = IWL_MEASURE_BASIC;
3538 u8 buffer[32];
3539 u8 channel;
3540
3541 if (count) {
3542 char *p = buffer;
3543 strncpy(buffer, buf, min(sizeof(buffer), count));
3544 channel = simple_strtoul(p, NULL, 0);
3545 if (channel)
3546 params.channel = channel;
3547
3548 p = buffer;
3549 while (*p && *p != ' ')
3550 p++;
3551 if (*p)
3552 type = simple_strtoul(p + 1, NULL, 0);
3553 }
3554
3555 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3556 "channel %d (for '%s')\n", type, params.channel, buf);
3557 iwl3945_get_measurement(priv, &params, type);
3558
3559 return count;
3560 }
3561
3562 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3563 show_measurement, store_measurement);
3564 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
3565
3566 static ssize_t store_retry_rate(struct device *d,
3567 struct device_attribute *attr,
3568 const char *buf, size_t count)
3569 {
3570 struct iwl_priv *priv = dev_get_drvdata(d);
3571
3572 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3573 if (priv->retry_rate <= 0)
3574 priv->retry_rate = 1;
3575
3576 return count;
3577 }
3578
3579 static ssize_t show_retry_rate(struct device *d,
3580 struct device_attribute *attr, char *buf)
3581 {
3582 struct iwl_priv *priv = dev_get_drvdata(d);
3583 return sprintf(buf, "%d", priv->retry_rate);
3584 }
3585
3586 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3587 store_retry_rate);
3588
3589
3590 static ssize_t show_channels(struct device *d,
3591 struct device_attribute *attr, char *buf)
3592 {
3593 /* all this shit doesn't belong into sysfs anyway */
3594 return 0;
3595 }
3596
3597 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3598
3599 static ssize_t show_statistics(struct device *d,
3600 struct device_attribute *attr, char *buf)
3601 {
3602 struct iwl_priv *priv = dev_get_drvdata(d);
3603 u32 size = sizeof(struct iwl3945_notif_statistics);
3604 u32 len = 0, ofs = 0;
3605 u8 *data = (u8 *)&priv->statistics_39;
3606 int rc = 0;
3607
3608 if (!iwl_is_alive(priv))
3609 return -EAGAIN;
3610
3611 mutex_lock(&priv->mutex);
3612 rc = iwl_send_statistics_request(priv, 0);
3613 mutex_unlock(&priv->mutex);
3614
3615 if (rc) {
3616 len = sprintf(buf,
3617 "Error sending statistics request: 0x%08X\n", rc);
3618 return len;
3619 }
3620
3621 while (size && (PAGE_SIZE - len)) {
3622 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3623 PAGE_SIZE - len, 1);
3624 len = strlen(buf);
3625 if (PAGE_SIZE - len)
3626 buf[len++] = '\n';
3627
3628 ofs += 16;
3629 size -= min(size, 16U);
3630 }
3631
3632 return len;
3633 }
3634
3635 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3636
3637 static ssize_t show_antenna(struct device *d,
3638 struct device_attribute *attr, char *buf)
3639 {
3640 struct iwl_priv *priv = dev_get_drvdata(d);
3641
3642 if (!iwl_is_alive(priv))
3643 return -EAGAIN;
3644
3645 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3646 }
3647
3648 static ssize_t store_antenna(struct device *d,
3649 struct device_attribute *attr,
3650 const char *buf, size_t count)
3651 {
3652 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3653 int ant;
3654
3655 if (count == 0)
3656 return 0;
3657
3658 if (sscanf(buf, "%1i", &ant) != 1) {
3659 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3660 return count;
3661 }
3662
3663 if ((ant >= 0) && (ant <= 2)) {
3664 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3665 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3666 } else
3667 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3668
3669
3670 return count;
3671 }
3672
3673 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3674
3675 static ssize_t show_status(struct device *d,
3676 struct device_attribute *attr, char *buf)
3677 {
3678 struct iwl_priv *priv = dev_get_drvdata(d);
3679 if (!iwl_is_alive(priv))
3680 return -EAGAIN;
3681 return sprintf(buf, "0x%08x\n", (int)priv->status);
3682 }
3683
3684 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3685
3686 static ssize_t dump_error_log(struct device *d,
3687 struct device_attribute *attr,
3688 const char *buf, size_t count)
3689 {
3690 struct iwl_priv *priv = dev_get_drvdata(d);
3691 char *p = (char *)buf;
3692
3693 if (p[0] == '1')
3694 iwl3945_dump_nic_error_log(priv);
3695
3696 return strnlen(buf, count);
3697 }
3698
3699 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3700
3701 /*****************************************************************************
3702 *
3703 * driver setup and tear down
3704 *
3705 *****************************************************************************/
3706
3707 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3708 {
3709 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3710
3711 init_waitqueue_head(&priv->wait_command_queue);
3712
3713 INIT_WORK(&priv->up, iwl3945_bg_up);
3714 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3715 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3716 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3717 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3718 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3719 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
3720 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3721 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3722 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3723 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3724
3725 iwl3945_hw_setup_deferred_work(priv);
3726
3727 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3728 iwl3945_irq_tasklet, (unsigned long)priv);
3729 }
3730
3731 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3732 {
3733 iwl3945_hw_cancel_deferred_work(priv);
3734
3735 cancel_delayed_work_sync(&priv->init_alive_start);
3736 cancel_delayed_work(&priv->scan_check);
3737 cancel_delayed_work(&priv->alive_start);
3738 cancel_work_sync(&priv->beacon_update);
3739 }
3740
3741 static struct attribute *iwl3945_sysfs_entries[] = {
3742 &dev_attr_antenna.attr,
3743 &dev_attr_channels.attr,
3744 &dev_attr_dump_errors.attr,
3745 &dev_attr_flags.attr,
3746 &dev_attr_filter_flags.attr,
3747 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3748 &dev_attr_measurement.attr,
3749 #endif
3750 &dev_attr_retry_rate.attr,
3751 &dev_attr_statistics.attr,
3752 &dev_attr_status.attr,
3753 &dev_attr_temperature.attr,
3754 &dev_attr_tx_power.attr,
3755 #ifdef CONFIG_IWLWIFI_DEBUG
3756 &dev_attr_debug_level.attr,
3757 #endif
3758 NULL
3759 };
3760
3761 static struct attribute_group iwl3945_attribute_group = {
3762 .name = NULL, /* put in device directory */
3763 .attrs = iwl3945_sysfs_entries,
3764 };
3765
3766 static struct ieee80211_ops iwl3945_hw_ops = {
3767 .tx = iwl3945_mac_tx,
3768 .start = iwl3945_mac_start,
3769 .stop = iwl3945_mac_stop,
3770 .add_interface = iwl_mac_add_interface,
3771 .remove_interface = iwl_mac_remove_interface,
3772 .config = iwl_mac_config,
3773 .configure_filter = iwl_configure_filter,
3774 .set_key = iwl3945_mac_set_key,
3775 .get_tx_stats = iwl_mac_get_tx_stats,
3776 .conf_tx = iwl_mac_conf_tx,
3777 .reset_tsf = iwl_mac_reset_tsf,
3778 .bss_info_changed = iwl_bss_info_changed,
3779 .hw_scan = iwl_mac_hw_scan
3780 };
3781
3782 static int iwl3945_init_drv(struct iwl_priv *priv)
3783 {
3784 int ret;
3785 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3786
3787 priv->retry_rate = 1;
3788 priv->ibss_beacon = NULL;
3789
3790 spin_lock_init(&priv->lock);
3791 spin_lock_init(&priv->sta_lock);
3792 spin_lock_init(&priv->hcmd_lock);
3793
3794 INIT_LIST_HEAD(&priv->free_frames);
3795
3796 mutex_init(&priv->mutex);
3797
3798 /* Clear the driver's (not device's) station table */
3799 iwl_clear_stations_table(priv);
3800
3801 priv->data_retry_limit = -1;
3802 priv->ieee_channels = NULL;
3803 priv->ieee_rates = NULL;
3804 priv->band = IEEE80211_BAND_2GHZ;
3805
3806 priv->iw_mode = NL80211_IFTYPE_STATION;
3807
3808 iwl_reset_qos(priv);
3809
3810 priv->qos_data.qos_active = 0;
3811 priv->qos_data.qos_cap.val = 0;
3812
3813 priv->rates_mask = IWL_RATES_MASK;
3814 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3815
3816 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3817 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3818 eeprom->version);
3819 ret = -EINVAL;
3820 goto err;
3821 }
3822 ret = iwl_init_channel_map(priv);
3823 if (ret) {
3824 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3825 goto err;
3826 }
3827
3828 /* Set up txpower settings in driver for all channels */
3829 if (iwl3945_txpower_set_from_eeprom(priv)) {
3830 ret = -EIO;
3831 goto err_free_channel_map;
3832 }
3833
3834 ret = iwlcore_init_geos(priv);
3835 if (ret) {
3836 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3837 goto err_free_channel_map;
3838 }
3839 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3840
3841 return 0;
3842
3843 err_free_channel_map:
3844 iwl_free_channel_map(priv);
3845 err:
3846 return ret;
3847 }
3848
3849 static int iwl3945_setup_mac(struct iwl_priv *priv)
3850 {
3851 int ret;
3852 struct ieee80211_hw *hw = priv->hw;
3853
3854 hw->rate_control_algorithm = "iwl-3945-rs";
3855 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3856
3857 /* Tell mac80211 our characteristics */
3858 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3859 IEEE80211_HW_NOISE_DBM |
3860 IEEE80211_HW_SPECTRUM_MGMT;
3861
3862 if (!priv->cfg->broken_powersave)
3863 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3864 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3865
3866 hw->wiphy->interface_modes =
3867 BIT(NL80211_IFTYPE_STATION) |
3868 BIT(NL80211_IFTYPE_ADHOC);
3869
3870 hw->wiphy->custom_regulatory = true;
3871
3872 /* Firmware does not support this */
3873 hw->wiphy->disable_beacon_hints = true;
3874
3875 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3876 /* we create the 802.11 header and a zero-length SSID element */
3877 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
3878
3879 /* Default value; 4 EDCA QOS priorities */
3880 hw->queues = 4;
3881
3882 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3883 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3884 &priv->bands[IEEE80211_BAND_2GHZ];
3885
3886 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3887 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3888 &priv->bands[IEEE80211_BAND_5GHZ];
3889
3890 ret = ieee80211_register_hw(priv->hw);
3891 if (ret) {
3892 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3893 return ret;
3894 }
3895 priv->mac80211_registered = 1;
3896
3897 return 0;
3898 }
3899
3900 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3901 {
3902 int err = 0;
3903 struct iwl_priv *priv;
3904 struct ieee80211_hw *hw;
3905 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3906 struct iwl3945_eeprom *eeprom;
3907 unsigned long flags;
3908
3909 /***********************
3910 * 1. Allocating HW data
3911 * ********************/
3912
3913 /* mac80211 allocates memory for this device instance, including
3914 * space for this driver's private structure */
3915 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3916 if (hw == NULL) {
3917 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
3918 err = -ENOMEM;
3919 goto out;
3920 }
3921 priv = hw->priv;
3922 SET_IEEE80211_DEV(hw, &pdev->dev);
3923
3924 /*
3925 * Disabling hardware scan means that mac80211 will perform scans
3926 * "the hard way", rather than using device's scan.
3927 */
3928 if (iwl3945_mod_params.disable_hw_scan) {
3929 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3930 iwl3945_hw_ops.hw_scan = NULL;
3931 }
3932
3933
3934 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3935 priv->cfg = cfg;
3936 priv->pci_dev = pdev;
3937 priv->inta_mask = CSR_INI_SET_MASK;
3938
3939 #ifdef CONFIG_IWLWIFI_DEBUG
3940 atomic_set(&priv->restrict_refcnt, 0);
3941 #endif
3942 if (iwl_alloc_traffic_mem(priv))
3943 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3944
3945 /***************************
3946 * 2. Initializing PCI bus
3947 * *************************/
3948 if (pci_enable_device(pdev)) {
3949 err = -ENODEV;
3950 goto out_ieee80211_free_hw;
3951 }
3952
3953 pci_set_master(pdev);
3954
3955 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3956 if (!err)
3957 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3958 if (err) {
3959 IWL_WARN(priv, "No suitable DMA available.\n");
3960 goto out_pci_disable_device;
3961 }
3962
3963 pci_set_drvdata(pdev, priv);
3964 err = pci_request_regions(pdev, DRV_NAME);
3965 if (err)
3966 goto out_pci_disable_device;
3967
3968 /***********************
3969 * 3. Read REV Register
3970 * ********************/
3971 priv->hw_base = pci_iomap(pdev, 0, 0);
3972 if (!priv->hw_base) {
3973 err = -ENODEV;
3974 goto out_pci_release_regions;
3975 }
3976
3977 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3978 (unsigned long long) pci_resource_len(pdev, 0));
3979 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3980
3981 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3982 * PCI Tx retries from interfering with C3 CPU state */
3983 pci_write_config_byte(pdev, 0x41, 0x00);
3984
3985 /* this spin lock will be used in apm_ops.init and EEPROM access
3986 * we should init now
3987 */
3988 spin_lock_init(&priv->reg_lock);
3989
3990 /* amp init */
3991 err = priv->cfg->ops->lib->apm_ops.init(priv);
3992 if (err < 0) {
3993 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
3994 goto out_iounmap;
3995 }
3996
3997 /***********************
3998 * 4. Read EEPROM
3999 * ********************/
4000
4001 /* Read the EEPROM */
4002 err = iwl_eeprom_init(priv);
4003 if (err) {
4004 IWL_ERR(priv, "Unable to init EEPROM\n");
4005 goto out_iounmap;
4006 }
4007 /* MAC Address location in EEPROM same for 3945/4965 */
4008 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4009 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
4010 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
4011 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4012
4013 /***********************
4014 * 5. Setup HW Constants
4015 * ********************/
4016 /* Device-specific setup */
4017 if (iwl3945_hw_set_hw_params(priv)) {
4018 IWL_ERR(priv, "failed to set hw settings\n");
4019 goto out_eeprom_free;
4020 }
4021
4022 /***********************
4023 * 6. Setup priv
4024 * ********************/
4025
4026 err = iwl3945_init_drv(priv);
4027 if (err) {
4028 IWL_ERR(priv, "initializing driver failed\n");
4029 goto out_unset_hw_params;
4030 }
4031
4032 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4033 priv->cfg->name);
4034
4035 /***********************
4036 * 7. Setup Services
4037 * ********************/
4038
4039 spin_lock_irqsave(&priv->lock, flags);
4040 iwl_disable_interrupts(priv);
4041 spin_unlock_irqrestore(&priv->lock, flags);
4042
4043 pci_enable_msi(priv->pci_dev);
4044
4045 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4046 IRQF_SHARED, DRV_NAME, priv);
4047 if (err) {
4048 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4049 goto out_disable_msi;
4050 }
4051
4052 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4053 if (err) {
4054 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4055 goto out_release_irq;
4056 }
4057
4058 iwl_set_rxon_channel(priv,
4059 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4060 iwl3945_setup_deferred_work(priv);
4061 iwl3945_setup_rx_handlers(priv);
4062
4063 /*********************************
4064 * 8. Setup and Register mac80211
4065 * *******************************/
4066
4067 iwl_enable_interrupts(priv);
4068
4069 err = iwl3945_setup_mac(priv);
4070 if (err)
4071 goto out_remove_sysfs;
4072
4073 err = iwl_dbgfs_register(priv, DRV_NAME);
4074 if (err)
4075 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4076
4077 /* Start monitoring the killswitch */
4078 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4079 2 * HZ);
4080
4081 return 0;
4082
4083 out_remove_sysfs:
4084 destroy_workqueue(priv->workqueue);
4085 priv->workqueue = NULL;
4086 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4087 out_release_irq:
4088 free_irq(priv->pci_dev->irq, priv);
4089 out_disable_msi:
4090 pci_disable_msi(priv->pci_dev);
4091 iwlcore_free_geos(priv);
4092 iwl_free_channel_map(priv);
4093 out_unset_hw_params:
4094 iwl3945_unset_hw_params(priv);
4095 out_eeprom_free:
4096 iwl_eeprom_free(priv);
4097 out_iounmap:
4098 pci_iounmap(pdev, priv->hw_base);
4099 out_pci_release_regions:
4100 pci_release_regions(pdev);
4101 out_pci_disable_device:
4102 pci_set_drvdata(pdev, NULL);
4103 pci_disable_device(pdev);
4104 out_ieee80211_free_hw:
4105 iwl_free_traffic_mem(priv);
4106 ieee80211_free_hw(priv->hw);
4107 out:
4108 return err;
4109 }
4110
4111 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4112 {
4113 struct iwl_priv *priv = pci_get_drvdata(pdev);
4114 unsigned long flags;
4115
4116 if (!priv)
4117 return;
4118
4119 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4120
4121 iwl_dbgfs_unregister(priv);
4122
4123 set_bit(STATUS_EXIT_PENDING, &priv->status);
4124
4125 if (priv->mac80211_registered) {
4126 ieee80211_unregister_hw(priv->hw);
4127 priv->mac80211_registered = 0;
4128 } else {
4129 iwl3945_down(priv);
4130 }
4131
4132 /* make sure we flush any pending irq or
4133 * tasklet for the driver
4134 */
4135 spin_lock_irqsave(&priv->lock, flags);
4136 iwl_disable_interrupts(priv);
4137 spin_unlock_irqrestore(&priv->lock, flags);
4138
4139 iwl_synchronize_irq(priv);
4140
4141 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4142
4143 cancel_delayed_work_sync(&priv->rfkill_poll);
4144
4145 iwl3945_dealloc_ucode_pci(priv);
4146
4147 if (priv->rxq.bd)
4148 iwl3945_rx_queue_free(priv, &priv->rxq);
4149 iwl3945_hw_txq_ctx_free(priv);
4150
4151 iwl3945_unset_hw_params(priv);
4152 iwl_clear_stations_table(priv);
4153
4154 /*netif_stop_queue(dev); */
4155 flush_workqueue(priv->workqueue);
4156
4157 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4158 * priv->workqueue... so we can't take down the workqueue
4159 * until now... */
4160 destroy_workqueue(priv->workqueue);
4161 priv->workqueue = NULL;
4162 iwl_free_traffic_mem(priv);
4163
4164 free_irq(pdev->irq, priv);
4165 pci_disable_msi(pdev);
4166
4167 pci_iounmap(pdev, priv->hw_base);
4168 pci_release_regions(pdev);
4169 pci_disable_device(pdev);
4170 pci_set_drvdata(pdev, NULL);
4171
4172 iwl_free_channel_map(priv);
4173 iwlcore_free_geos(priv);
4174 kfree(priv->scan);
4175 if (priv->ibss_beacon)
4176 dev_kfree_skb(priv->ibss_beacon);
4177
4178 ieee80211_free_hw(priv->hw);
4179 }
4180
4181
4182 /*****************************************************************************
4183 *
4184 * driver and module entry point
4185 *
4186 *****************************************************************************/
4187
4188 static struct pci_driver iwl3945_driver = {
4189 .name = DRV_NAME,
4190 .id_table = iwl3945_hw_card_ids,
4191 .probe = iwl3945_pci_probe,
4192 .remove = __devexit_p(iwl3945_pci_remove),
4193 #ifdef CONFIG_PM
4194 .suspend = iwl_pci_suspend,
4195 .resume = iwl_pci_resume,
4196 #endif
4197 };
4198
4199 static int __init iwl3945_init(void)
4200 {
4201
4202 int ret;
4203 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4204 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4205
4206 ret = iwl3945_rate_control_register();
4207 if (ret) {
4208 printk(KERN_ERR DRV_NAME
4209 "Unable to register rate control algorithm: %d\n", ret);
4210 return ret;
4211 }
4212
4213 ret = pci_register_driver(&iwl3945_driver);
4214 if (ret) {
4215 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4216 goto error_register;
4217 }
4218
4219 return ret;
4220
4221 error_register:
4222 iwl3945_rate_control_unregister();
4223 return ret;
4224 }
4225
4226 static void __exit iwl3945_exit(void)
4227 {
4228 pci_unregister_driver(&iwl3945_driver);
4229 iwl3945_rate_control_unregister();
4230 }
4231
4232 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4233
4234 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
4235 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4236 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4237 MODULE_PARM_DESC(swcrypto,
4238 "using software crypto (default 1 [software])\n");
4239 #ifdef CONFIG_IWLWIFI_DEBUG
4240 module_param_named(debug, iwl_debug_level, uint, 0644);
4241 MODULE_PARM_DESC(debug, "debug output mask");
4242 #endif
4243 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
4244 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4245 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4246 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4247
4248 module_exit(iwl3945_exit);
4249 module_init(iwl3945_init);
Linux ARM platform port for MOXA ART SoC