1 /* Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License,
5 * or (at your option) any later version. */
7 #ifndef __MACH_APB_DMA_H
8 #define __MACH_APB_DMA_H
10 #define MAX_DMA_ADDRESS 0xffffffff
11 #define MAX_DMA_CHANNELS 0
13 #define APB_DMA_MAX_CHANNEL 4
14 #define AHB_DMA_MAX_CHANNEL 8
15 #define TOTAL_DMA_MAX_CHANNEL (APB_DMA_MAX_CHANNEL + AHB_DMA_MAX_CHANNEL)
17 /* following define for APB DMA register struct */
20 #define APB_DMA_ENABLE (1<<0)
21 #define APB_DMA_FIN_INT_STS (1<<1)
22 #define APB_DMA_FIN_INT_EN (1<<2)
23 #define APB_DMA_BURST_MODE (1<<3)
24 #define APB_DMA_ERR_INT_STS (1<<4)
25 #define APB_DMA_ERR_INT_EN (1<<5)
26 #define APB_DMA_SOURCE_AHB (1<<6)
27 #define APB_DMA_SOURCE_APB 0
28 #define APB_DMA_DEST_AHB (1<<7)
29 #define APB_DMA_DEST_APB 0
30 #define APB_DMA_SOURCE_INC_0 0
31 #define APB_DMA_SOURCE_INC_1_4 (1<<8)
32 #define APB_DMA_SOURCE_INC_2_8 (2<<8)
33 #define APB_DMA_SOURCE_INC_4_16 (3<<8)
34 #define APB_DMA_SOURCE_DEC_1_4 (5<<8)
35 #define APB_DMA_SOURCE_DEC_2_8 (6<<8)
36 #define APB_DMA_SOURCE_DEC_4_16 (7<<8)
37 #define APB_DMA_SOURCE_INC_MASK (7<<8)
38 #define APB_DMA_DEST_INC_0 0
39 #define APB_DMA_DEST_INC_1_4 (1<<12)
40 #define APB_DMA_DEST_INC_2_8 (2<<12)
41 #define APB_DMA_DEST_INC_4_16 (3<<12)
42 #define APB_DMA_DEST_DEC_1_4 (5<<12)
43 #define APB_DMA_DEST_DEC_2_8 (6<<12)
44 #define APB_DMA_DEST_DEC_4_16 (7<<12)
45 #define APB_DMA_DEST_INC_MASK (7<<12)
46 #define APB_DMA_DEST_REQ_NO_MASK (15<<16)
47 #define APB_DMA_DATA_WIDTH_MASK (3<<20)
48 #define APB_DMA_DATA_WIDTH_4 0
49 #define APB_DMA_DATA_WIDTH_2 (1<<20)
50 #define APB_DMA_DATA_WIDTH_1 (2<<20)
51 #define APB_DMA_SOURCE_REQ_NO_MASK (15<<24)
53 unsigned int enable
:1; /* enable DMA */
54 #define APB_DMAB_ENABLE 1
55 unsigned int fin_int_sts
:1; /* finished interrupt status */
56 #define APB_DMAB_FIN_INT_STS 1
57 unsigned int fin_int_en
:1; /* finished interrupt enable */
58 #define APB_DMAB_FIN_INT_EN 1
59 unsigned int burst
:1; /* burst mode */
60 #define APB_DMAB_BURST_MODE 1
61 unsigned int err_int_sts
:1; /* error interrupt status */
62 #define APB_DMAB_ERR_INT_STS 1
63 unsigned int err_int_en
:1; /* error interrupt enable */
64 #define APB_DMAB_ERR_INT_EN 1
65 unsigned int source_sel
:1; /* 0:APB (device),1:AHB (RAM) */
66 #define APB_DMAB_SOURCE_AHB 1
67 #define APB_DMAB_SOURCE_APB 0
68 unsigned int dest_sel
:1; /* 0:APB,1:AHB */
69 #define APB_DMAB_DEST_AHB 1
70 #define APB_DMAB_DEST_APB 0
71 unsigned int source_inc
:3;
73 001:+1(busrt=0),+4 (burst=1)
74 010:+2(burst=0),+8 (burst=1)
75 011:+4(burst=0),+16(burst=1)
76 101:-1(burst=0),-4 (burst=1)
77 110:-2(burst=0),-8 (burst=1)
78 111:-4(burst=0),-16(burst=1) */
79 #define APB_DMAB_SOURCE_INC_0 0
80 #define APB_DMAB_SOURCE_INC_1_4 1
81 #define APB_DMAB_SOURCE_INC_2_8 2
82 #define APB_DMAB_SOURCE_INC_4_16 3
83 #define APB_DMAB_SOURCE_DEC_1_4 5
84 #define APB_DMAB_SOURCE_DEC_2_8 6
85 #define APB_DMAB_SOURCE_DEC_4_16 7
86 #define APB_DMAB_SOURCE_INC_MASK 7
87 unsigned int reserved1
:1;
88 unsigned int dest_inc
:3;
90 001:+1(busrt=0),+4 (burst=1)
91 010:+2(burst=0),+8 (burst=1)
92 011:+4(burst=0),+16(burst=1)
93 101:-1(burst=0),-4 (burst=1)
94 110:-2(burst=0),-8 (burst=1)
95 111:-4(burst=0),-16(burst=1) */
96 #define APB_DMAB_DEST_INC_0 0
97 #define APB_DMAB_DEST_INC_1_4 1
98 #define APB_DMAB_DEST_INC_2_8 2
99 #define APB_DMAB_DEST_INC_4_16 3
100 #define APB_DMAB_DEST_DEC_1_4 5
101 #define APB_DMAB_DEST_DEC_2_8 6
102 #define APB_DMAB_DEST_DEC_4_16 7
103 #define APB_DMAB_DEST_INC_MASK 7
104 unsigned int reserved2
:1;
105 unsigned int dest_req_no
:4;
106 /* request signal select of dest */
107 /* addr for DMA hwd handshake
108 0:no request/grant signal
109 1-15:request/grant signal */
110 #define APB_DMAB_DEST_REQ_NO_MASK 15
111 unsigned int data_width
:2; /* data width of transfer */
112 /* 00:word, 01:half, 10:byte */
113 #define APB_DMAB_DATA_WIDTH_MASK 3
114 #define APB_DMAB_DATA_WIDTH_4 0
115 #define APB_DMAB_DATA_WIDTH_2 1
116 #define APB_DMAB_DATA_WIDTH_1 2
117 unsigned int reserved3
:2;
118 unsigned int source_req_no
:4;
119 /* request signal select of dest */
120 /* addr for DMA hwd handshake
121 0:no request/grant signal
122 1-15:request/grant signal */
123 #define APB_DMAB_SOURCE_REQ_NO_MASK 15
124 unsigned int reserved4
:4;
129 unsigned int source_addr
;
130 unsigned int dest_addr
;
131 unsigned int cycles
; /* is depended on burst mode */
132 #define APB_DMA_CYCLES_MASK 0x00ffffff
133 union _command command
;
136 #define APB_DMA_SPI_TX_REQ_NO 1
137 #define APB_DMA_SPI_RX_REQ_NO 2
138 #define APB_DMA_SD_REQ_NO 5
139 #define APB_DMA_AC97_TX_REQ_NO 6
140 #define APB_DMA_AC97_RX_REQ_NO 7
141 #define APB_DMA_USB_DEVICE_REQ_NO 9
143 /* following APB DMA private data struct define */
144 struct apb_dma_priv
{
145 struct apb_dma_reg
*reg
;
146 void (*irq_handler
)(void *param
);
147 void *irq_handler_param
;
153 struct apb_dma_conf_param
{
154 unsigned int source_addr
; /* need physical address */
155 unsigned int dest_addr
; /* need physical address */
156 unsigned int size
; /* total bytes number */
160 int dest_sel
; /* APB or AHB */
161 int source_sel
; /* APB or AHB */
167 /* following APB DMA function call phototype define */
168 extern struct apb_dma_priv
*apb_dma_alloc(int req_no
);
169 extern void apb_dma_release(struct apb_dma_priv
*priv
);
170 extern void apb_dma_set_irq(struct apb_dma_priv
*priv
,
171 void (*func
)(void *param
), void *param
);
172 extern void apb_dma_release_irq(struct apb_dma_priv
*priv
);
173 extern void apb_dma_conf(struct apb_dma_priv
*priv
,
174 struct apb_dma_conf_param
*param
);
175 extern void apb_dma_enable(struct apb_dma_priv
*priv
);
176 extern void apb_dma_disable(struct apb_dma_priv
*priv
);
180 #endif /* __MACH_APB_DMA_H */