arch/arm/mach-moxart/include/mach/hardware.h

   1 /* Copyright (C) 2013 Jonas Jensen <jonas.jensen@gmail.com>
   2  * This program is free software; you can redistribute it and/or modify it
   3  * under the terms of the GNU General Public License as published by the
   4  * Free Software Foundation; either version 2 of the License,
   5  * or (at your option) any later version. */
   6
   7 #ifndef __MACH_HARDWARE_H
   8 #define __MACH_HARDWARE_H
   9
  10 /*#define MOXART_DEBUG*/
  11
  12 #ifdef MOXART_DEBUG
  13 #define dbg_printk(x...) printk(x)
  14 #else
  15 #define dbg_printk(x...)
  16 #endif
  17
  18 #define pr_warn pr_warning
  19
  20 #define MOXART_FLASH_BASE               0x80000000
  21 #define MOXART_APB_DMA_BASE             0x90500000
  22 #define MOXART_PMU_BASE                 0x98100000
  23 #define MOXART_UART_BASE                0x98200000
  24 #define MOXART_UART1_BASE               0x98200000
  25 #define MOXART_UART2_BASE               0x98200020
  26 #define MOXART_UART3_BASE               0x98200040
  27 #define MOXART_UART_INT_VEC_BASE 0x982000c0
  28 #define MOXART_UART_MODE_BASE   0x982000e4
  29 #define MOXART_TIMER_BASE               0x98400000
  30 #define MOXART_TIMER1_BASE              MOXART_TIMER_BASE
  31 #define MOXART_TIMER2_BASE              (MOXART_TIMER_BASE + 0x10)
  32 #define MOXART_GPIO_BASE                0x98700000
  33 #define MOXART_INTERRUPT_BASE   0x98800000
  34 #define MOXART_MMC_BASE                 0x98e00000
  35 #define MOXART_FTMAC1_BASE              0x90900000
  36 #define MOXART_FTMAC2_BASE              0x92000000
  37 #define MOXART_WATCHDOG_BASE    0x98500000
  38
  39 #define MOXART_FLASH_ETH1_OFFSET        0x50
  40 #define MOXART_FLASH_ETH2_OFFSET        0x56
  41
  42 /*
  43 #define MOXART_RTC_BASE                 0x98600000
  44 #define MOXART_AHB_BASE         0x90100000
  45 #define MOXART_GLOBAL_BASE              0x90100000
  46 #define MOXART_GLOBAL_BASE      0x90100000
  47 #define MOXART_POWER_CTRL_BASE  0x4B000000
  48 #define MOXART_GMAC0_BASE       0x6000A000
  49 #define MOXART_GMAC1_BASE       0x6000E000
  50 #define MOXART_FLASH_CTRL_BASE  0x65000000
  51 #define MOXART_DRAM_CTRL_BASE   0x66000000
  52 #define MOXART_GENERAL_DMA_BASE 0x67000000
  53 */
  54
  55 #define MOXART_FLASH_VA_BASE    0xf4000000
  56
  57 #define UART_CLK        14745600
  58
  59 #define APB_CLK         48000000
  60
  61 /* macro to get at IO space when running virtually */
  62
  63 /* #define IO_ADDRESS(x)
  64  * ((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000)*/
  65
  66 #define IO_BASE                         0xf0000000
  67 #define MEM_ADDRESS(x)      ((x&0x0fffffff)+IO_BASE)
  68 #define IO_ADDRESS(x)           (((x>>4)&0xffff0000)+(x&0xffff)+IO_BASE)
  69 #define PHY_ADDRESS(x)          (((x<<4)&0xfff00000)+(x&0xffff))
  70
  71 /* Following is used Moxa CPU demo board
  72  * Physical     Logical
  73  * 90100000     f9010000        AHB controller
  74  * 90200000     f9020000        SMC
  75  * 90300000     f9030000        SDRAM controller
  76  * 90400000     f9040000        DMA
  77  * 90500000     f9050000        APB bridge
  78  * 90900000     f9090000        MAC #1
  79  * 90a00000     f90a0000        USB 2.0 host
  80  * 90b00000     f90b0000        USB 2.0 device
  81  * 90c00000     f90c0000        PCI bridge
  82  * 90f00000     f90f0000        DES/3DES/AES encryptor
  83  * 92000000     f9200000        MAC #2
  84  * 92300000     f9230000        EBI
  85  * 98100000     f9810000        PMU (power management)
  86  * 98200000     f9820000        UART (port 1 - 6), embedded on CPU
  87  * 98400000     f9840000        timer #1 & #2
  88  * 98500000     f9850000        watchdog timer
  89  * 98600000     f9860000        RTC, embedded on CPU
  90  * 98700000     f9870000        GPIO
  91  * 98800000     f9880000        INTC (interrupt controller)
  92  * 98b00000     f98b0000        SPI
  93  * 98e00000     f98e0000        SD controller
  94  * 99400000     f9940000        AC97
  95  * a0000000     a0000000        PCI memory
  96  */
  97
  98 #define MOXART_INTERRUPT_VA_BASE        IO_ADDRESS(MOXART_INTERRUPT_BASE)
  99
 100
 101 #endif