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code style scripts/checkpatch.pl (linux-3.9-rc1) formatting
[linux-2.6.32.60-moxart.git] / drivers / char / mxser.c
blobbd543c9509955fbd6e3a6692984a63b9834f7948
1 /*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
6 *
7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
19 * - Fixed x86_64 cleanness
20 */
21
22 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/signal.h>
25 #include <linux/sched.h>
26 #include <linux/smp_lock.h>
27 #include <linux/timer.h>
28 #include <linux/interrupt.h>
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/serial.h>
32 #include <linux/serial_reg.h>
33 #include <linux/major.h>
34 #include <linux/string.h>
35 #include <linux/fcntl.h>
36 #include <linux/ptrace.h>
37 #include <linux/gfp.h>
38 #include <linux/ioport.h>
39 #include <linux/mm.h>
40 #include <linux/delay.h>
41 #include <linux/pci.h>
42 #include <linux/bitops.h>
43
44 #include <asm/system.h>
45 #include <asm/io.h>
46 #include <asm/irq.h>
47 #include <asm/uaccess.h>
48
49 #include "mxser.h"
50
51 #define MXSER_VERSION "2.0.5" /* 1.14 */
52 #define MXSERMAJOR 174
53
54 #ifdef CONFIG_ARCH_MOXART
55 #define MXSER_BOARDS 1 /* Max. boards */
56 #else
57 #define MXSER_BOARDS 4 /* Max. boards */
58 #endif
59
60 #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
61 #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
62 #define MXSER_ISR_PASS_LIMIT 100
63
64 /*CheckIsMoxaMust return value*/
65 #define MOXA_OTHER_UART 0x00
66 #define MOXA_MUST_MU150_HWID 0x01
67 #define MOXA_MUST_MU860_HWID 0x02
68
69 #define WAKEUP_CHARS 256
70
71 #define UART_MCR_AFE 0x20
72 #define UART_LSR_SPECIAL 0x1E
73
74 #define PCI_DEVICE_ID_POS104UL 0x1044
75 #define PCI_DEVICE_ID_CB108 0x1080
76 #define PCI_DEVICE_ID_CP102UF 0x1023
77 #define PCI_DEVICE_ID_CP112UL 0x1120
78 #define PCI_DEVICE_ID_CB114 0x1142
79 #define PCI_DEVICE_ID_CP114UL 0x1143
80 #define PCI_DEVICE_ID_CB134I 0x1341
81 #define PCI_DEVICE_ID_CP138U 0x1380
82
83
84 #define C168_ASIC_ID 1
85 #define C104_ASIC_ID 2
86 #define C102_ASIC_ID 0xB
87 #define CI132_ASIC_ID 4
88 #define CI134_ASIC_ID 3
89 #define CI104J_ASIC_ID 5
90
91 #define MXSER_HIGHBAUD 1
92 #define MXSER_HAS2 2
93
94 /* This is only for PCI */
95 static const struct {
96 int type;
97 int tx_fifo;
98 int rx_fifo;
99 int xmit_fifo_size;
100 int rx_high_water;
101 int rx_trigger;
102 int rx_low_water;
103 long max_baud;
104 } Gpci_uart_info[] = {
105 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
106 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
107 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
108 };
109 #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
110
111 struct mxser_cardinfo {
112 char *name;
113 unsigned int nports;
114 unsigned int flags;
115 };
116
117 static const struct mxser_cardinfo mxser_cards[] = {
118 /* 0*/ { "C168 series", 8, },
119 { "C104 series", 4, },
120 { "CI-104J series", 4, },
121 { "C168H/PCI series", 8, },
122 { "C104H/PCI series", 4, },
123 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
124 { "CI-132 series", 4, MXSER_HAS2 },
125 { "CI-134 series", 4, },
126 { "CP-132 series", 2, },
127 { "CP-114 series", 4, },
128 /*10*/ { "CT-114 series", 4, },
129 { "CP-102 series", 2, MXSER_HIGHBAUD },
130 { "CP-104U series", 4, },
131 { "CP-168U series", 8, },
132 { "CP-132U series", 2, },
133 /*15*/ { "CP-134U series", 4, },
134 { "CP-104JU series", 4, },
135 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
136 { "CP-118U series", 8, },
137 { "CP-102UL series", 2, },
138 /*20*/ { "CP-102U series", 2, },
139 { "CP-118EL series", 8, },
140 { "CP-168EL series", 8, },
141 { "CP-104EL series", 4, },
142 { "CB-108 series", 8, },
143 /*25*/ { "CB-114 series", 4, },
144 { "CB-134I series", 4, },
145 { "CP-138U series", 8, },
146 { "POS-104UL series", 4, },
147 { "CP-114UL series", 4, },
148 /*30*/ { "CP-102UF series", 2, },
149 { "CP-112UL series", 2, },
150 { "UC-7112-LX Serial", 2, },
151 };
152
153 /* driver_data correspond to the lines in the structure above
154 see also ISA probe function before you change something */
155 static struct pci_device_id mxser_pcibrds[] = {
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
175 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
176 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
177 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
178 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
179 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
180 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
181 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
182 { }
183 };
184 MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
185
186 static unsigned long ioaddr[MXSER_BOARDS];
187 static int ttymajor = MXSERMAJOR;
188
189 /* Variables for insmod */
190
191 MODULE_AUTHOR("Casper Yang");
192 MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
193 module_param_array(ioaddr, ulong, NULL, 0);
194 MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
195 module_param(ttymajor, int, 0);
196 MODULE_LICENSE("GPL");
197
198 struct mxser_log {
199 int tick;
200 unsigned long rxcnt[MXSER_PORTS];
201 unsigned long txcnt[MXSER_PORTS];
202 };
203
204 struct mxser_mon {
205 unsigned long rxcnt;
206 unsigned long txcnt;
207 unsigned long up_rxcnt;
208 unsigned long up_txcnt;
209 int modem_status;
210 unsigned char hold_reason;
211 };
212
213 struct mxser_mon_ext {
214 unsigned long rx_cnt[32];
215 unsigned long tx_cnt[32];
216 unsigned long up_rxcnt[32];
217 unsigned long up_txcnt[32];
218 int modem_status[32];
219
220 long baudrate[32];
221 int databits[32];
222 int stopbits[32];
223 int parity[32];
224 int flowctrl[32];
225 int fifo[32];
226 int iftype[32];
227 };
228
229 struct mxser_board;
230
231 struct mxser_port {
232 struct tty_port port;
233 struct mxser_board *board;
234
235 unsigned long ioaddr;
236 unsigned long opmode_ioaddr;
237 int max_baud;
238
239 int rx_high_water;
240 int rx_trigger; /* Rx fifo trigger level */
241 int rx_low_water;
242 int baud_base; /* max. speed */
243 int type; /* UART type */
244
245 int x_char; /* xon/xoff character */
246 int IER; /* Interrupt Enable Register */
247 int MCR; /* Modem control register */
248
249 unsigned char stop_rx;
250 unsigned char ldisc_stop_rx;
251
252 int custom_divisor;
253 unsigned char err_shadow;
254
255 struct async_icount icount; /* kernel counters for 4 input interrupts */
256 int timeout;
257
258 int read_status_mask;
259 int ignore_status_mask;
260 int xmit_fifo_size;
261 int xmit_head;
262 int xmit_tail;
263 int xmit_cnt;
264
265 struct ktermios normal_termios;
266
267 struct mxser_mon mon_data;
268
269 spinlock_t slock;
270 };
271
272 struct mxser_board {
273 unsigned int idx;
274 int irq;
275 const struct mxser_cardinfo *info;
276 unsigned long vector;
277 unsigned long vector_mask;
278
279 int chip_flag;
280 int uart_type;
281
282 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
283 };
284
285 struct mxser_mstatus {
286 tcflag_t cflag;
287 int cts;
288 int dsr;
289 int ri;
290 int dcd;
291 };
292
293 static struct mxser_board mxser_boards[MXSER_BOARDS];
294 static struct tty_driver *mxvar_sdriver;
295 static struct mxser_log mxvar_log;
296 static int mxser_set_baud_method[MXSER_PORTS + 1];
297
298 static void mxser_enable_must_enchance_mode(unsigned long baseio)
299 {
300 u8 oldlcr;
301 u8 efr;
302
303 oldlcr = inb(baseio + UART_LCR);
304 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
305
306 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
307 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
308
309 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
310 outb(oldlcr, baseio + UART_LCR);
311 }
312
313 static void mxser_disable_must_enchance_mode(unsigned long baseio)
314 {
315 u8 oldlcr;
316 u8 efr;
317
318 oldlcr = inb(baseio + UART_LCR);
319 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
320
321 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
322 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
323
324 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
325 outb(oldlcr, baseio + UART_LCR);
326 }
327
328 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
329 {
330 u8 oldlcr;
331 u8 efr;
332
333 oldlcr = inb(baseio + UART_LCR);
334 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
335
336 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
337 efr &= ~MOXA_MUST_EFR_BANK_MASK;
338 efr |= MOXA_MUST_EFR_BANK0;
339
340 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
341 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
342 outb(oldlcr, baseio + UART_LCR);
343 }
344
345 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
346 {
347 u8 oldlcr;
348 u8 efr;
349
350 oldlcr = inb(baseio + UART_LCR);
351 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
352
353 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
354 efr &= ~MOXA_MUST_EFR_BANK_MASK;
355 efr |= MOXA_MUST_EFR_BANK0;
356
357 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
358 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
359 outb(oldlcr, baseio + UART_LCR);
360 }
361
362 static void mxser_set_must_fifo_value(struct mxser_port *info)
363 {
364 u8 oldlcr;
365 u8 efr;
366
367 oldlcr = inb(info->ioaddr + UART_LCR);
368 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
369
370 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
371 efr &= ~MOXA_MUST_EFR_BANK_MASK;
372 efr |= MOXA_MUST_EFR_BANK1;
373
374 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
375 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
376 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
377 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
378 outb(oldlcr, info->ioaddr + UART_LCR);
379 }
380
381 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
382 {
383 u8 oldlcr;
384 u8 efr;
385
386 oldlcr = inb(baseio + UART_LCR);
387 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
388
389 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
390 efr &= ~MOXA_MUST_EFR_BANK_MASK;
391 efr |= MOXA_MUST_EFR_BANK2;
392
393 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
394 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
395 outb(oldlcr, baseio + UART_LCR);
396 }
397
398 static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
399 {
400 u8 oldlcr;
401 u8 efr;
402
403 oldlcr = inb(baseio + UART_LCR);
404 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
405
406 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
407 efr &= ~MOXA_MUST_EFR_BANK_MASK;
408 efr |= MOXA_MUST_EFR_BANK2;
409
410 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
411 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
412 outb(oldlcr, baseio + UART_LCR);
413 }
414
415 static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
416 {
417 u8 oldlcr;
418 u8 efr;
419
420 oldlcr = inb(baseio + UART_LCR);
421 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
422
423 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
424 efr &= ~MOXA_MUST_EFR_SF_MASK;
425
426 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
427 outb(oldlcr, baseio + UART_LCR);
428 }
429
430 static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
431 {
432 u8 oldlcr;
433 u8 efr;
434
435 oldlcr = inb(baseio + UART_LCR);
436 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
437
438 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
439 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
440 efr |= MOXA_MUST_EFR_SF_TX1;
441
442 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
443 outb(oldlcr, baseio + UART_LCR);
444 }
445
446 static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
447 {
448 u8 oldlcr;
449 u8 efr;
450
451 oldlcr = inb(baseio + UART_LCR);
452 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
453
454 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
455 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
456
457 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
458 outb(oldlcr, baseio + UART_LCR);
459 }
460
461 static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
462 {
463 u8 oldlcr;
464 u8 efr;
465
466 oldlcr = inb(baseio + UART_LCR);
467 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
468
469 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
470 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
471 efr |= MOXA_MUST_EFR_SF_RX1;
472
473 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
474 outb(oldlcr, baseio + UART_LCR);
475 }
476
477 static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
478 {
479 u8 oldlcr;
480 u8 efr;
481
482 oldlcr = inb(baseio + UART_LCR);
483 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
484
485 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
486 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
487
488 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
489 outb(oldlcr, baseio + UART_LCR);
490 }
491
492 #ifdef CONFIG_PCI
493 static int __devinit CheckIsMoxaMust(unsigned long io)
494 {
495 u8 oldmcr, hwid;
496 int i;
497
498 outb(0, io + UART_LCR);
499 mxser_disable_must_enchance_mode(io);
500 oldmcr = inb(io + UART_MCR);
501 outb(0, io + UART_MCR);
502 mxser_set_must_xon1_value(io, 0x11);
503 if ((hwid = inb(io + UART_MCR)) != 0) {
504 outb(oldmcr, io + UART_MCR);
505 return MOXA_OTHER_UART;
506 }
507
508 mxser_get_must_hardware_id(io, &hwid);
509 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
510 if (hwid == Gpci_uart_info[i].type)
511 return (int)hwid;
512 }
513 return MOXA_OTHER_UART;
514 }
515 #endif
516
517 static void process_txrx_fifo(struct mxser_port *info)
518 {
519 int i;
520
521 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
522 info->rx_trigger = 1;
523 info->rx_high_water = 1;
524 info->rx_low_water = 1;
525 info->xmit_fifo_size = 1;
526 } else
527 for (i = 0; i < UART_INFO_NUM; i++)
528 if (info->board->chip_flag == Gpci_uart_info[i].type) {
529 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
530 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
531 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
532 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
533 break;
534 }
535 }
536
537 static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
538 {
539 static unsigned char mxser_msr[MXSER_PORTS + 1];
540 unsigned char status = 0;
541
542 status = inb(baseaddr + UART_MSR);
543
544 mxser_msr[port] &= 0x0F;
545 mxser_msr[port] |= status;
546 status = mxser_msr[port];
547 if (mode)
548 mxser_msr[port] = 0;
549
550 return status;
551 }
552
553 static int mxser_carrier_raised(struct tty_port *port)
554 {
555 struct mxser_port *mp = container_of(port, struct mxser_port, port);
556 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
557 }
558
559 static void mxser_dtr_rts(struct tty_port *port, int on)
560 {
561 struct mxser_port *mp = container_of(port, struct mxser_port, port);
562 unsigned long flags;
563
564 spin_lock_irqsave(&mp->slock, flags);
565 if (on)
566 outb(inb(mp->ioaddr + UART_MCR) |
567 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
568 else
569 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
570 mp->ioaddr + UART_MCR);
571 spin_unlock_irqrestore(&mp->slock, flags);
572 }
573
574 static int mxser_set_baud(struct tty_struct *tty, long newspd)
575 {
576 struct mxser_port *info = tty->driver_data;
577 int quot = 0, baud;
578 unsigned char cval;
579
580 if (!info->ioaddr)
581 return -1;
582
583 if (newspd > info->max_baud)
584 return -1;
585
586 if (newspd == 134) {
587 quot = 2 * info->baud_base / 269;
588 tty_encode_baud_rate(tty, 134, 134);
589 } else if (newspd) {
590 quot = info->baud_base / newspd;
591 if (quot == 0)
592 quot = 1;
593 baud = info->baud_base/quot;
594 tty_encode_baud_rate(tty, baud, baud);
595 } else {
596 quot = 0;
597 }
598
599 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
600 info->timeout += HZ / 50; /* Add .02 seconds of slop */
601
602 if (quot) {
603 info->MCR |= UART_MCR_DTR;
604 outb(info->MCR, info->ioaddr + UART_MCR);
605 } else {
606 info->MCR &= ~UART_MCR_DTR;
607 outb(info->MCR, info->ioaddr + UART_MCR);
608 return 0;
609 }
610
611 cval = inb(info->ioaddr + UART_LCR);
612
613 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
614
615 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
616 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
617 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
618
619 #ifdef BOTHER
620 if (C_BAUD(tty) == BOTHER) {
621 quot = info->baud_base % newspd;
622 quot *= 8;
623 if (quot % newspd > newspd / 2) {
624 quot /= newspd;
625 quot++;
626 } else
627 quot /= newspd;
628
629 mxser_set_must_enum_value(info->ioaddr, quot);
630 } else
631 #endif
632 mxser_set_must_enum_value(info->ioaddr, 0);
633
634 return 0;
635 }
636
637 /*
638 * This routine is called to set the UART divisor registers to match
639 * the specified baud rate for a serial port.
640 */
641 static int mxser_change_speed(struct tty_struct *tty,
642 struct ktermios *old_termios)
643 {
644 struct mxser_port *info = tty->driver_data;
645 unsigned cflag, cval, fcr;
646 int ret = 0;
647 unsigned char status;
648
649 cflag = tty->termios->c_cflag;
650 if (!info->ioaddr)
651 return ret;
652
653 if (mxser_set_baud_method[tty->index] == 0)
654 mxser_set_baud(tty, tty_get_baud_rate(tty));
655
656 /* byte size and parity */
657 switch (cflag & CSIZE) {
658 case CS5:
659 cval = 0x00;
660 break;
661 case CS6:
662 cval = 0x01;
663 break;
664 case CS7:
665 cval = 0x02;
666 break;
667 case CS8:
668 cval = 0x03;
669 break;
670 default:
671 cval = 0x00;
672 break; /* too keep GCC shut... */
673 }
674 if (cflag & CSTOPB)
675 cval |= 0x04;
676 if (cflag & PARENB)
677 cval |= UART_LCR_PARITY;
678 if (!(cflag & PARODD))
679 cval |= UART_LCR_EPAR;
680 if (cflag & CMSPAR)
681 cval |= UART_LCR_SPAR;
682
683 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
684 if (info->board->chip_flag) {
685 fcr = UART_FCR_ENABLE_FIFO;
686 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
687 mxser_set_must_fifo_value(info);
688 } else
689 fcr = 0;
690 } else {
691 fcr = UART_FCR_ENABLE_FIFO;
692 if (info->board->chip_flag) {
693 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
694 mxser_set_must_fifo_value(info);
695 } else {
696 switch (info->rx_trigger) {
697 case 1:
698 fcr |= UART_FCR_TRIGGER_1;
699 break;
700 case 4:
701 fcr |= UART_FCR_TRIGGER_4;
702 break;
703 case 8:
704 fcr |= UART_FCR_TRIGGER_8;
705 break;
706 default:
707 fcr |= UART_FCR_TRIGGER_14;
708 break;
709 }
710 }
711 }
712
713 /* CTS flow control flag and modem status interrupts */
714 info->IER &= ~UART_IER_MSI;
715 info->MCR &= ~UART_MCR_AFE;
716 if (cflag & CRTSCTS) {
717 info->port.flags |= ASYNC_CTS_FLOW;
718 info->IER |= UART_IER_MSI;
719 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
720 info->MCR |= UART_MCR_AFE;
721 } else {
722 status = inb(info->ioaddr + UART_MSR);
723 if (tty->hw_stopped) {
724 if (status & UART_MSR_CTS) {
725 tty->hw_stopped = 0;
726 if (info->type != PORT_16550A &&
727 !info->board->chip_flag) {
728 outb(info->IER & ~UART_IER_THRI,
729 info->ioaddr +
730 UART_IER);
731 info->IER |= UART_IER_THRI;
732 outb(info->IER, info->ioaddr +
733 UART_IER);
734 }
735 tty_wakeup(tty);
736 }
737 } else {
738 if (!(status & UART_MSR_CTS)) {
739 tty->hw_stopped = 1;
740 if ((info->type != PORT_16550A) &&
741 (!info->board->chip_flag)) {
742 info->IER &= ~UART_IER_THRI;
743 outb(info->IER, info->ioaddr +
744 UART_IER);
745 }
746 }
747 }
748 }
749 } else {
750 info->port.flags &= ~ASYNC_CTS_FLOW;
751 }
752 outb(info->MCR, info->ioaddr + UART_MCR);
753 if (cflag & CLOCAL) {
754 info->port.flags &= ~ASYNC_CHECK_CD;
755 } else {
756 info->port.flags |= ASYNC_CHECK_CD;
757 info->IER |= UART_IER_MSI;
758 }
759 outb(info->IER, info->ioaddr + UART_IER);
760
761 /*
762 * Set up parity check flag
763 */
764 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
765 if (I_INPCK(tty))
766 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
767 if (I_BRKINT(tty) || I_PARMRK(tty))
768 info->read_status_mask |= UART_LSR_BI;
769
770 info->ignore_status_mask = 0;
771
772 if (I_IGNBRK(tty)) {
773 info->ignore_status_mask |= UART_LSR_BI;
774 info->read_status_mask |= UART_LSR_BI;
775 /*
776 * If we're ignore parity and break indicators, ignore
777 * overruns too. (For real raw support).
778 */
779 if (I_IGNPAR(tty)) {
780 info->ignore_status_mask |=
781 UART_LSR_OE |
782 UART_LSR_PE |
783 UART_LSR_FE;
784 info->read_status_mask |=
785 UART_LSR_OE |
786 UART_LSR_PE |
787 UART_LSR_FE;
788 }
789 }
790 if (info->board->chip_flag) {
791 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
792 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
793 if (I_IXON(tty)) {
794 mxser_enable_must_rx_software_flow_control(
795 info->ioaddr);
796 } else {
797 mxser_disable_must_rx_software_flow_control(
798 info->ioaddr);
799 }
800 if (I_IXOFF(tty)) {
801 mxser_enable_must_tx_software_flow_control(
802 info->ioaddr);
803 } else {
804 mxser_disable_must_tx_software_flow_control(
805 info->ioaddr);
806 }
807 }
808
809
810 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
811 outb(cval, info->ioaddr + UART_LCR);
812
813 return ret;
814 }
815
816 static void mxser_check_modem_status(struct tty_struct *tty,
817 struct mxser_port *port, int status)
818 {
819 /* update input line counters */
820 if (status & UART_MSR_TERI)
821 port->icount.rng++;
822 if (status & UART_MSR_DDSR)
823 port->icount.dsr++;
824 if (status & UART_MSR_DDCD)
825 port->icount.dcd++;
826 if (status & UART_MSR_DCTS)
827 port->icount.cts++;
828 port->mon_data.modem_status = status;
829 wake_up_interruptible(&port->port.delta_msr_wait);
830
831 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
832 if (status & UART_MSR_DCD)
833 wake_up_interruptible(&port->port.open_wait);
834 }
835
836 if (port->port.flags & ASYNC_CTS_FLOW) {
837 if (tty->hw_stopped) {
838 if (status & UART_MSR_CTS) {
839 tty->hw_stopped = 0;
840
841 if ((port->type != PORT_16550A) &&
842 (!port->board->chip_flag)) {
843 outb(port->IER & ~UART_IER_THRI,
844 port->ioaddr + UART_IER);
845 port->IER |= UART_IER_THRI;
846 outb(port->IER, port->ioaddr +
847 UART_IER);
848 }
849 tty_wakeup(tty);
850 }
851 } else {
852 if (!(status & UART_MSR_CTS)) {
853 tty->hw_stopped = 1;
854 if (port->type != PORT_16550A &&
855 !port->board->chip_flag) {
856 port->IER &= ~UART_IER_THRI;
857 outb(port->IER, port->ioaddr +
858 UART_IER);
859 }
860 }
861 }
862 }
863 }
864
865 static int mxser_startup(struct tty_struct *tty)
866 {
867 struct mxser_port *info = tty->driver_data;
868 unsigned long page;
869 unsigned long flags;
870
871 page = __get_free_page(GFP_KERNEL);
872 if (!page)
873 return -ENOMEM;
874
875 spin_lock_irqsave(&info->slock, flags);
876
877 if (info->port.flags & ASYNC_INITIALIZED) {
878 free_page(page);
879 spin_unlock_irqrestore(&info->slock, flags);
880 return 0;
881 }
882
883 if (!info->ioaddr || !info->type) {
884 set_bit(TTY_IO_ERROR, &tty->flags);
885 free_page(page);
886 spin_unlock_irqrestore(&info->slock, flags);
887 return 0;
888 }
889 if (info->port.xmit_buf)
890 free_page(page);
891 else
892 info->port.xmit_buf = (unsigned char *) page;
893
894 /*
895 * Clear the FIFO buffers and disable them
896 * (they will be reenabled in mxser_change_speed())
897 */
898 if (info->board->chip_flag)
899 outb((UART_FCR_CLEAR_RCVR |
900 UART_FCR_CLEAR_XMIT |
901 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
902 else
903 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
904 info->ioaddr + UART_FCR);
905
906 /*
907 * At this point there's no way the LSR could still be 0xFF;
908 * if it is, then bail out, because there's likely no UART
909 * here.
910 */
911 if (inb(info->ioaddr + UART_LSR) == 0xff) {
912 spin_unlock_irqrestore(&info->slock, flags);
913 if (capable(CAP_SYS_ADMIN)) {
914 if (tty)
915 set_bit(TTY_IO_ERROR, &tty->flags);
916 return 0;
917 } else
918 return -ENODEV;
919 }
920
921 /*
922 * Clear the interrupt registers.
923 */
924 (void) inb(info->ioaddr + UART_LSR);
925 (void) inb(info->ioaddr + UART_RX);
926 (void) inb(info->ioaddr + UART_IIR);
927 (void) inb(info->ioaddr + UART_MSR);
928
929 /*
930 * Now, initialize the UART
931 */
932 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
933 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
934 outb(info->MCR, info->ioaddr + UART_MCR);
935
936 /*
937 * Finally, enable interrupts
938 */
939 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
940
941 if (info->board->chip_flag)
942 info->IER |= MOXA_MUST_IER_EGDAI;
943 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
944
945 /*
946 * And clear the interrupt registers again for luck.
947 */
948 (void) inb(info->ioaddr + UART_LSR);
949 (void) inb(info->ioaddr + UART_RX);
950 (void) inb(info->ioaddr + UART_IIR);
951 (void) inb(info->ioaddr + UART_MSR);
952
953 clear_bit(TTY_IO_ERROR, &tty->flags);
954 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
955
956 /*
957 * and set the speed of the serial port
958 */
959 mxser_change_speed(tty, NULL);
960 info->port.flags |= ASYNC_INITIALIZED;
961 spin_unlock_irqrestore(&info->slock, flags);
962
963 return 0;
964 }
965
966 /*
967 * This routine will shutdown a serial port; interrupts maybe disabled, and
968 * DTR is dropped if the hangup on close termio flag is on.
969 */
970 static void mxser_shutdown(struct tty_struct *tty)
971 {
972 struct mxser_port *info = tty->driver_data;
973 unsigned long flags;
974
975 if (!(info->port.flags & ASYNC_INITIALIZED))
976 return;
977
978 spin_lock_irqsave(&info->slock, flags);
979
980 /*
981 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
982 * here so the queue might never be waken up
983 */
984 wake_up_interruptible(&info->port.delta_msr_wait);
985
986 /*
987 * Free the IRQ, if necessary
988 */
989 if (info->port.xmit_buf) {
990 free_page((unsigned long) info->port.xmit_buf);
991 info->port.xmit_buf = NULL;
992 }
993
994 info->IER = 0;
995 outb(0x00, info->ioaddr + UART_IER);
996
997 if (tty->termios->c_cflag & HUPCL)
998 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
999 outb(info->MCR, info->ioaddr + UART_MCR);
1000
1001 /* clear Rx/Tx FIFO's */
1002 if (info->board->chip_flag)
1003 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
1004 MOXA_MUST_FCR_GDA_MODE_ENABLE,
1005 info->ioaddr + UART_FCR);
1006 else
1007 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1008 info->ioaddr + UART_FCR);
1009
1010 /* read data port to reset things */
1011 (void) inb(info->ioaddr + UART_RX);
1012
1013 set_bit(TTY_IO_ERROR, &tty->flags);
1014
1015 info->port.flags &= ~ASYNC_INITIALIZED;
1016
1017 if (info->board->chip_flag)
1018 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1019
1020 spin_unlock_irqrestore(&info->slock, flags);
1021 }
1022
1023 /*
1024 * This routine is called whenever a serial port is opened. It
1025 * enables interrupts for a serial port, linking in its async structure into
1026 * the IRQ chain. It also performs the serial-specific
1027 * initialization for the tty structure.
1028 */
1029 static int mxser_open(struct tty_struct *tty, struct file *filp)
1030 {
1031 struct mxser_port *info;
1032 unsigned long flags;
1033 int retval, line;
1034
1035 line = tty->index;
1036 if (line == MXSER_PORTS)
1037 return 0;
1038 if (line < 0 || line > MXSER_PORTS)
1039 return -ENODEV;
1040 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1041 if (!info->ioaddr)
1042 return -ENODEV;
1043
1044 tty->driver_data = info;
1045 tty_port_tty_set(&info->port, tty);
1046 /*
1047 * Start up serial port
1048 */
1049 spin_lock_irqsave(&info->port.lock, flags);
1050 info->port.count++;
1051 spin_unlock_irqrestore(&info->port.lock, flags);
1052 retval = mxser_startup(tty);
1053 if (retval)
1054 return retval;
1055
1056 retval = tty_port_block_til_ready(&info->port, tty, filp);
1057 if (retval)
1058 return retval;
1059
1060 return 0;
1061 }
1062
1063 static void mxser_flush_buffer(struct tty_struct *tty)
1064 {
1065 struct mxser_port *info = tty->driver_data;
1066 char fcr;
1067 unsigned long flags;
1068
1069
1070 spin_lock_irqsave(&info->slock, flags);
1071 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1072
1073 fcr = inb(info->ioaddr + UART_FCR);
1074 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1075 info->ioaddr + UART_FCR);
1076 outb(fcr, info->ioaddr + UART_FCR);
1077
1078 spin_unlock_irqrestore(&info->slock, flags);
1079
1080 tty_wakeup(tty);
1081 }
1082
1083
1084 static void mxser_close_port(struct tty_struct *tty, struct tty_port *port)
1085 {
1086 struct mxser_port *info = container_of(port, struct mxser_port, port);
1087 unsigned long timeout;
1088 /*
1089 * Save the termios structure, since this port may have
1090 * separate termios for callout and dialin.
1091 *
1092 * FIXME: Can this go ?
1093 */
1094 if (port->flags & ASYNC_NORMAL_ACTIVE)
1095 info->normal_termios = *tty->termios;
1096 /*
1097 * At this point we stop accepting input. To do this, we
1098 * disable the receive line status interrupts, and tell the
1099 * interrupt driver to stop checking the data ready bit in the
1100 * line status register.
1101 */
1102 info->IER &= ~UART_IER_RLSI;
1103 if (info->board->chip_flag)
1104 info->IER &= ~MOXA_MUST_RECV_ISR;
1105
1106 if (port->flags & ASYNC_INITIALIZED) {
1107 outb(info->IER, info->ioaddr + UART_IER);
1108 /*
1109 * Before we drop DTR, make sure the UART transmitter
1110 * has completely drained; this is especially
1111 * important if there is a transmit FIFO!
1112 */
1113 timeout = jiffies + HZ;
1114 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
1115 schedule_timeout_interruptible(5);
1116 if (time_after(jiffies, timeout))
1117 break;
1118 }
1119 }
1120 mxser_shutdown(tty);
1121
1122 }
1123
1124 /*
1125 * Direct copy of drivers/char/tty_port.c with one key difference:
1126 * ASYNC_CLOSING is avoided because this causes a soft lock in
1127 * tty_wait_until_sent.
1128 * Why this happens is unknown (to me, hoping someone can shed light).
1129 * Maybe because the console tty shares the same IRQ?
1130 * Adding printk for each transmitted character (mxser_transmit_chars)
1131 * also "fixes" the bug.
1132 * Console "sh" process gets stuck in schedule from:
1133 * mxser_close -> tty_port_close_start -> tty_wait_until_sent
1134 * -> schedule_timeout -> schedule
1135 * Kernel printout: http://ideone.com/e845mr
1136 */
1137 int mxser_tty_port_close_start(struct tty_port *port,
1138 struct tty_struct *tty, struct file *filp)
1139 {
1140 unsigned long flags;
1141
1142 spin_lock_irqsave(&port->lock, flags);
1143 if (tty_hung_up_p(filp)) {
1144 spin_unlock_irqrestore(&port->lock, flags);
1145 return 0;
1146 }
1147
1148 if (tty->count == 1 && port->count != 1) {
1149 pr_warn(
1150 "tty_port_close_start: tty->count = 1 port"
1151 " count = %d.\n", port->count);
1152 port->count = 1;
1153 }
1154 if (--port->count < 0) {
1155 pr_warn("tty_port_close_start: count = %d\n",
1156 port->count);
1157 port->count = 0;
1158 }
1159
1160 if (port->count) {
1161 spin_unlock_irqrestore(&port->lock, flags);
1162 if (port->ops->drop)
1163 port->ops->drop(port);
1164 return 0;
1165 }
1166
1167 /* set_bit(ASYNCB_CLOSING, &port->flags); */
1168 tty->closing = 1;
1169 spin_unlock_irqrestore(&port->lock, flags);
1170 /* Don't block on a stalled port, just pull the chain */
1171 if (tty->flow_stopped)
1172 tty_driver_flush_buffer(tty);
1173
1174 if (test_bit(ASYNCB_INITIALIZED, &port->flags) &&
1175 port->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1176 tty_wait_until_sent(tty, port->closing_wait);
1177
1178 if (port->drain_delay) {
1179 unsigned int bps = tty_get_baud_rate(tty);
1180 long timeout;
1181
1182 if (bps > 1200)
1183 timeout = max_t(long, (HZ * 10 * port->drain_delay)
1184 / bps, HZ / 10);
1185 else
1186 timeout = 2 * HZ;
1187 schedule_timeout_interruptible(timeout);
1188 }
1189 /* Don't call port->drop for the last reference. Callers will want
1190 to drop the last active reference in ->shutdown() or the tty
1191 shutdown path */
1192 return 1;
1193 }
1194
1195 /*
1196 * This routine is called when the serial port gets closed. First, we
1197 * wait for the last remaining data to be sent. Then, we unlink its
1198 * async structure from the interrupt chain if necessary, and we free
1199 * that IRQ if nothing is left in the chain.
1200 */
1201 static void mxser_close(struct tty_struct *tty, struct file *filp)
1202 {
1203 struct mxser_port *info = tty->driver_data;
1204 struct tty_port *port = &info->port;
1205
1206 /* Linux 2.6.34.14: tty: Fix regressions in the char driver conversion:
1207 * http://git.kernel.org/?p=linux/kernel/git/stable/linux-stable.git;
1208 * a=commit;h=a2d1e3516c80027b2da17fb0b7ccd36f0ac33aa7 */
1209 if (tty->index == MXSER_PORTS || info == NULL)
1210 return;
1211 #ifdef CONFIG_ARCH_MOXART
1212 if (mxser_tty_port_close_start(port, tty, filp) == 0)
1213 #else
1214 if (tty_port_close_start(port, tty, filp) == 0)
1215 #endif
1216 return;
1217 mxser_close_port(tty, port);
1218 mxser_flush_buffer(tty);
1219 /* Right now the tty_port set is done outside of the close_end helper
1220 as we don't yet have everyone using refcounts */
1221 tty_port_close_end(port, tty);
1222 tty_port_tty_set(port, NULL);
1223 }
1224
1225 static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1226 {
1227 int c, total = 0;
1228 struct mxser_port *info = tty->driver_data;
1229 unsigned long flags;
1230
1231 /* printk(KERN_INFO "mxser_write: info->xmit_cnt=%d count=%d\n",
1232 info->xmit_cnt, count); */
1233
1234 if (!info->port.xmit_buf)
1235 return 0;
1236
1237 while (1) {
1238 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1239 SERIAL_XMIT_SIZE - info->xmit_head));
1240
1241 if (c <= 0)
1242 break;
1243
1244 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1245 spin_lock_irqsave(&info->slock, flags);
1246 info->xmit_head = (info->xmit_head + c) &
1247 (SERIAL_XMIT_SIZE - 1);
1248 info->xmit_cnt += c;
1249 spin_unlock_irqrestore(&info->slock, flags);
1250
1251 buf += c;
1252 count -= c;
1253 total += c;
1254
1255 /* printk(KERN_INFO "mxser_write: c=%d\n", c); */
1256 }
1257
1258 if (info->xmit_cnt && !tty->stopped) {
1259 if (!tty->hw_stopped ||
1260 (info->type == PORT_16550A) ||
1261 (info->board->chip_flag)) {
1262 spin_lock_irqsave(&info->slock, flags);
1263 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1264 UART_IER);
1265 info->IER |= UART_IER_THRI;
1266 outb(info->IER, info->ioaddr + UART_IER);
1267 spin_unlock_irqrestore(&info->slock, flags);
1268 }
1269 }
1270 return total;
1271 }
1272
1273 static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1274 {
1275 struct mxser_port *info = tty->driver_data;
1276 unsigned long flags;
1277
1278 if (!info->port.xmit_buf)
1279 return 0;
1280
1281 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1282 return 0;
1283
1284 spin_lock_irqsave(&info->slock, flags);
1285 info->port.xmit_buf[info->xmit_head++] = ch;
1286 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1287 info->xmit_cnt++;
1288 spin_unlock_irqrestore(&info->slock, flags);
1289 if (!tty->stopped) {
1290 if (!tty->hw_stopped ||
1291 (info->type == PORT_16550A) ||
1292 info->board->chip_flag) {
1293 spin_lock_irqsave(&info->slock, flags);
1294 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1295 info->IER |= UART_IER_THRI;
1296 outb(info->IER, info->ioaddr + UART_IER);
1297 spin_unlock_irqrestore(&info->slock, flags);
1298 }
1299 }
1300 return 1;
1301 }
1302
1303
1304 static void mxser_flush_chars(struct tty_struct *tty)
1305 {
1306 struct mxser_port *info = tty->driver_data;
1307 unsigned long flags;
1308
1309 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1310 (tty->hw_stopped && info->type != PORT_16550A &&
1311 !info->board->chip_flag))
1312 return;
1313
1314 spin_lock_irqsave(&info->slock, flags);
1315
1316 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1317 info->IER |= UART_IER_THRI;
1318 outb(info->IER, info->ioaddr + UART_IER);
1319
1320 spin_unlock_irqrestore(&info->slock, flags);
1321 }
1322
1323 static int mxser_write_room(struct tty_struct *tty)
1324 {
1325 struct mxser_port *info = tty->driver_data;
1326 int ret;
1327
1328 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1329 return ret < 0 ? 0 : ret;
1330 }
1331
1332 static int mxser_chars_in_buffer(struct tty_struct *tty)
1333 {
1334 struct mxser_port *info = tty->driver_data;
1335 /* printk(KERN_INFO "info->xmit_cnt = %d\n", info->xmit_cnt); */
1336 return info->xmit_cnt;
1337 }
1338
1339 /*
1340 * ------------------------------------------------------------
1341 * friends of mxser_ioctl()
1342 * ------------------------------------------------------------
1343 */
1344 static int mxser_get_serial_info(struct tty_struct *tty,
1345 struct serial_struct __user *retinfo)
1346 {
1347 struct mxser_port *info = tty->driver_data;
1348 struct serial_struct tmp = {
1349 .type = info->type,
1350 .line = tty->index,
1351 .port = info->ioaddr,
1352 .irq = info->board->irq,
1353 .flags = info->port.flags,
1354 .baud_base = info->baud_base,
1355 .close_delay = info->port.close_delay,
1356 .closing_wait = info->port.closing_wait,
1357 .custom_divisor = info->custom_divisor,
1358 .hub6 = 0
1359 };
1360 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1361 return -EFAULT;
1362 return 0;
1363 }
1364
1365 static int mxser_set_serial_info(struct tty_struct *tty,
1366 struct serial_struct __user *new_info)
1367 {
1368 struct mxser_port *info = tty->driver_data;
1369 struct serial_struct new_serial;
1370 speed_t baud;
1371 unsigned long sl_flags;
1372 unsigned int flags;
1373 int retval = 0;
1374
1375 if (!new_info || !info->ioaddr)
1376 return -ENODEV;
1377 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1378 return -EFAULT;
1379
1380 if (new_serial.irq != info->board->irq ||
1381 new_serial.port != info->ioaddr)
1382 return -EINVAL;
1383
1384 flags = info->port.flags & ASYNC_SPD_MASK;
1385
1386 if (!capable(CAP_SYS_ADMIN)) {
1387 if ((new_serial.baud_base != info->baud_base) ||
1388 (new_serial.close_delay != info->port.close_delay) ||
1389 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1390 return -EPERM;
1391 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1392 (new_serial.flags & ASYNC_USR_MASK));
1393 } else {
1394 /*
1395 * OK, past this point, all the error checking has been done.
1396 * At this point, we start making changes.....
1397 */
1398 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1399 (new_serial.flags & ASYNC_FLAGS));
1400 info->port.close_delay = new_serial.close_delay * HZ / 100;
1401 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
1402 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1403 ? 1 : 0;
1404 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
1405 (new_serial.baud_base != info->baud_base ||
1406 new_serial.custom_divisor !=
1407 info->custom_divisor)) {
1408 baud = new_serial.baud_base / new_serial.custom_divisor;
1409 tty_encode_baud_rate(tty, baud, baud);
1410 }
1411 }
1412
1413 info->type = new_serial.type;
1414
1415 process_txrx_fifo(info);
1416
1417 if (info->port.flags & ASYNC_INITIALIZED) {
1418 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1419 spin_lock_irqsave(&info->slock, sl_flags);
1420 mxser_change_speed(tty, NULL);
1421 spin_unlock_irqrestore(&info->slock, sl_flags);
1422 }
1423 } else
1424 retval = mxser_startup(tty);
1425
1426 return retval;
1427 }
1428
1429 /*
1430 * mxser_get_lsr_info - get line status register info
1431 *
1432 * Purpose: Let user call ioctl() to get info when the UART physically
1433 * is emptied. On bus types like RS485, the transmitter must
1434 * release the bus after transmitting. This must be done when
1435 * the transmit shift register is empty, not be done when the
1436 * transmit holding register is empty. This functionality
1437 * allows an RS485 driver to be written in user space.
1438 */
1439 static int mxser_get_lsr_info(struct mxser_port *info,
1440 unsigned int __user *value)
1441 {
1442 unsigned char status;
1443 unsigned int result;
1444 unsigned long flags;
1445
1446 spin_lock_irqsave(&info->slock, flags);
1447 status = inb(info->ioaddr + UART_LSR);
1448 spin_unlock_irqrestore(&info->slock, flags);
1449 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1450 return put_user(result, value);
1451 }
1452
1453 static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1454 {
1455 struct mxser_port *info = tty->driver_data;
1456 unsigned char control, status;
1457 unsigned long flags;
1458
1459
1460 if (tty->index == MXSER_PORTS)
1461 return -ENOIOCTLCMD;
1462 if (test_bit(TTY_IO_ERROR, &tty->flags))
1463 return -EIO;
1464
1465 control = info->MCR;
1466
1467 spin_lock_irqsave(&info->slock, flags);
1468 status = inb(info->ioaddr + UART_MSR);
1469 if (status & UART_MSR_ANY_DELTA)
1470 mxser_check_modem_status(tty, info, status);
1471 spin_unlock_irqrestore(&info->slock, flags);
1472 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1473 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1474 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1475 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1476 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1477 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1478 }
1479
1480 static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1481 unsigned int set, unsigned int clear)
1482 {
1483 struct mxser_port *info = tty->driver_data;
1484 unsigned long flags;
1485
1486
1487 if (tty->index == MXSER_PORTS)
1488 return -ENOIOCTLCMD;
1489 if (test_bit(TTY_IO_ERROR, &tty->flags))
1490 return -EIO;
1491
1492 spin_lock_irqsave(&info->slock, flags);
1493
1494 if (set & TIOCM_RTS)
1495 info->MCR |= UART_MCR_RTS;
1496 if (set & TIOCM_DTR)
1497 info->MCR |= UART_MCR_DTR;
1498
1499 if (clear & TIOCM_RTS)
1500 info->MCR &= ~UART_MCR_RTS;
1501 if (clear & TIOCM_DTR)
1502 info->MCR &= ~UART_MCR_DTR;
1503
1504 outb(info->MCR, info->ioaddr + UART_MCR);
1505 spin_unlock_irqrestore(&info->slock, flags);
1506 return 0;
1507 }
1508
1509 static int __init mxser_program_mode(int port)
1510 {
1511 int id, i, j, n;
1512
1513 outb(0, port);
1514 outb(0, port);
1515 outb(0, port);
1516 (void)inb(port);
1517 (void)inb(port);
1518 outb(0, port);
1519 (void)inb(port);
1520
1521 id = inb(port + 1) & 0x1F;
1522 if ((id != C168_ASIC_ID) &&
1523 (id != C104_ASIC_ID) &&
1524 (id != C102_ASIC_ID) &&
1525 (id != CI132_ASIC_ID) &&
1526 (id != CI134_ASIC_ID) &&
1527 (id != CI104J_ASIC_ID))
1528 return -1;
1529 for (i = 0, j = 0; i < 4; i++) {
1530 n = inb(port + 2);
1531 if (n == 'M') {
1532 j = 1;
1533 } else if ((j == 1) && (n == 1)) {
1534 j = 2;
1535 break;
1536 } else
1537 j = 0;
1538 }
1539 if (j != 2)
1540 id = -2;
1541 return id;
1542 }
1543
1544 static void __init mxser_normal_mode(int port)
1545 {
1546 int i, n;
1547
1548 outb(0xA5, port + 1);
1549 outb(0x80, port + 3);
1550 outb(12, port + 0); /* 9600 bps */
1551 outb(0, port + 1);
1552 outb(0x03, port + 3); /* 8 data bits */
1553 outb(0x13, port + 4); /* loop back mode */
1554 for (i = 0; i < 16; i++) {
1555 n = inb(port + 5);
1556 if ((n & 0x61) == 0x60)
1557 break;
1558 if ((n & 1) == 1)
1559 (void)inb(port);
1560 }
1561 outb(0x00, port + 4);
1562 }
1563
1564 #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1565 #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1566 #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1567 #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1568 #define EN_CCMD 0x000 /* Chip's command register */
1569 #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1570 #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1571 #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1572 #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1573 #define EN0_DCFG 0x00E /* Data configuration reg WR */
1574 #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1575 #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1576 #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1577 static int __init mxser_read_register(int port, unsigned short *regs)
1578 {
1579 int i, k, value, id;
1580 unsigned int j;
1581
1582 id = mxser_program_mode(port);
1583 if (id < 0)
1584 return id;
1585 for (i = 0; i < 14; i++) {
1586 k = (i & 0x3F) | 0x180;
1587 for (j = 0x100; j > 0; j >>= 1) {
1588 outb(CHIP_CS, port);
1589 if (k & j) {
1590 outb(CHIP_CS | CHIP_DO, port);
1591 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1592 } else {
1593 outb(CHIP_CS, port);
1594 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1595 }
1596 }
1597 (void)inb(port);
1598 value = 0;
1599 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1600 outb(CHIP_CS, port);
1601 outb(CHIP_CS | CHIP_SK, port);
1602 if (inb(port) & CHIP_DI)
1603 value |= j;
1604 }
1605 regs[i] = value;
1606 outb(0, port);
1607 }
1608 mxser_normal_mode(port);
1609 return id;
1610 }
1611
1612 static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1613 {
1614 struct mxser_port *port;
1615 struct tty_struct *tty;
1616 int result, status;
1617 unsigned int i, j;
1618 int ret = 0;
1619
1620 switch (cmd) {
1621 case MOXA_GET_MAJOR:
1622 if (printk_ratelimit())
1623 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1624 "%x (GET_MAJOR), fix your userspace\n",
1625 current->comm, cmd);
1626 return put_user(ttymajor, (int __user *)argp);
1627
1628 case MOXA_CHKPORTENABLE:
1629 result = 0;
1630 lock_kernel();
1631 for (i = 0; i < MXSER_BOARDS; i++)
1632 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1633 if (mxser_boards[i].ports[j].ioaddr)
1634 result |= (1 << i);
1635 unlock_kernel();
1636 return put_user(result, (unsigned long __user *)argp);
1637 case MOXA_GETDATACOUNT:
1638 lock_kernel();
1639 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1640 ret = -EFAULT;
1641 unlock_kernel();
1642 return ret;
1643 case MOXA_GETMSTATUS: {
1644 struct mxser_mstatus ms, __user *msu = argp;
1645 lock_kernel();
1646 for (i = 0; i < MXSER_BOARDS; i++)
1647 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1648 port = &mxser_boards[i].ports[j];
1649 memset(&ms, 0, sizeof(ms));
1650
1651 if (!port->ioaddr)
1652 goto copy;
1653
1654 tty = tty_port_tty_get(&port->port);
1655
1656 if (!tty || !tty->termios)
1657 ms.cflag = port->normal_termios.c_cflag;
1658 else
1659 ms.cflag = tty->termios->c_cflag;
1660 tty_kref_put(tty);
1661 status = inb(port->ioaddr + UART_MSR);
1662 if (status & UART_MSR_DCD)
1663 ms.dcd = 1;
1664 if (status & UART_MSR_DSR)
1665 ms.dsr = 1;
1666 if (status & UART_MSR_CTS)
1667 ms.cts = 1;
1668 copy:
1669 if (copy_to_user(msu, &ms, sizeof(ms))) {
1670 unlock_kernel();
1671 return -EFAULT;
1672 }
1673 msu++;
1674 }
1675 unlock_kernel();
1676 return 0;
1677 }
1678 case MOXA_ASPP_MON_EXT: {
1679 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1680 unsigned int cflag, iflag, p;
1681 u8 opmode;
1682
1683 me = kzalloc(sizeof(*me), GFP_KERNEL);
1684 if (!me)
1685 return -ENOMEM;
1686
1687 lock_kernel();
1688 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1689 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1690 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1691 i = MXSER_BOARDS;
1692 break;
1693 }
1694 port = &mxser_boards[i].ports[j];
1695 if (!port->ioaddr)
1696 continue;
1697
1698 status = mxser_get_msr(port->ioaddr, 0, p);
1699
1700 if (status & UART_MSR_TERI)
1701 port->icount.rng++;
1702 if (status & UART_MSR_DDSR)
1703 port->icount.dsr++;
1704 if (status & UART_MSR_DDCD)
1705 port->icount.dcd++;
1706 if (status & UART_MSR_DCTS)
1707 port->icount.cts++;
1708
1709 port->mon_data.modem_status = status;
1710 me->rx_cnt[p] = port->mon_data.rxcnt;
1711 me->tx_cnt[p] = port->mon_data.txcnt;
1712 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1713 me->up_txcnt[p] = port->mon_data.up_txcnt;
1714 me->modem_status[p] =
1715 port->mon_data.modem_status;
1716 tty = tty_port_tty_get(&port->port);
1717
1718 if (!tty || !tty->termios) {
1719 cflag = port->normal_termios.c_cflag;
1720 iflag = port->normal_termios.c_iflag;
1721 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1722 } else {
1723 cflag = tty->termios->c_cflag;
1724 iflag = tty->termios->c_iflag;
1725 me->baudrate[p] = tty_get_baud_rate(tty);
1726 }
1727 tty_kref_put(tty);
1728
1729 me->databits[p] = cflag & CSIZE;
1730 me->stopbits[p] = cflag & CSTOPB;
1731 me->parity[p] = cflag & (PARENB | PARODD |
1732 CMSPAR);
1733
1734 if (cflag & CRTSCTS)
1735 me->flowctrl[p] |= 0x03;
1736
1737 if (iflag & (IXON | IXOFF))
1738 me->flowctrl[p] |= 0x0C;
1739
1740 if (port->type == PORT_16550A)
1741 me->fifo[p] = 1;
1742
1743 opmode = inb(port->opmode_ioaddr) >>
1744 ((p % 4) * 2);
1745 opmode &= OP_MODE_MASK;
1746 me->iftype[p] = opmode;
1747 }
1748 }
1749 unlock_kernel();
1750 if (copy_to_user(argp, me, sizeof(*me)))
1751 ret = -EFAULT;
1752 kfree(me);
1753 return ret;
1754 }
1755 default:
1756 return -ENOIOCTLCMD;
1757 }
1758 return 0;
1759 }
1760
1761 static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1762 struct async_icount *cprev)
1763 {
1764 struct async_icount cnow;
1765 unsigned long flags;
1766 int ret;
1767
1768 spin_lock_irqsave(&info->slock, flags);
1769 cnow = info->icount; /* atomic copy */
1770 spin_unlock_irqrestore(&info->slock, flags);
1771
1772 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1773 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1774 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1775 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1776
1777 *cprev = cnow;
1778
1779 return ret;
1780 }
1781
1782 static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1783 unsigned int cmd, unsigned long arg)
1784 {
1785 struct mxser_port *info = tty->driver_data;
1786 struct async_icount cnow;
1787 unsigned long flags;
1788 void __user *argp = (void __user *)arg;
1789 int retval;
1790
1791 if (tty->index == MXSER_PORTS)
1792 return mxser_ioctl_special(cmd, argp);
1793
1794 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1795 int p;
1796 unsigned long opmode;
1797 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1798 int shiftbit;
1799 unsigned char val, mask;
1800
1801 p = tty->index % 4;
1802 if (cmd == MOXA_SET_OP_MODE) {
1803 if (get_user(opmode, (int __user *) argp))
1804 return -EFAULT;
1805 if (opmode != RS232_MODE &&
1806 opmode != RS485_2WIRE_MODE &&
1807 opmode != RS422_MODE &&
1808 opmode != RS485_4WIRE_MODE)
1809 return -EFAULT;
1810 lock_kernel();
1811 mask = ModeMask[p];
1812 shiftbit = p * 2;
1813 val = inb(info->opmode_ioaddr);
1814 val &= mask;
1815 val |= (opmode << shiftbit);
1816 outb(val, info->opmode_ioaddr);
1817 unlock_kernel();
1818 } else {
1819 lock_kernel();
1820 shiftbit = p * 2;
1821 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1822 opmode &= OP_MODE_MASK;
1823 unlock_kernel();
1824 if (put_user(opmode, (int __user *)argp))
1825 return -EFAULT;
1826 }
1827 return 0;
1828 }
1829
1830 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
1831 test_bit(TTY_IO_ERROR, &tty->flags))
1832 return -EIO;
1833
1834 switch (cmd) {
1835 case TIOCGSERIAL:
1836 lock_kernel();
1837 retval = mxser_get_serial_info(tty, argp);
1838 unlock_kernel();
1839 return retval;
1840 case TIOCSSERIAL:
1841 lock_kernel();
1842 retval = mxser_set_serial_info(tty, argp);
1843 unlock_kernel();
1844 return retval;
1845 case TIOCSERGETLSR: /* Get line status register */
1846 return mxser_get_lsr_info(info, argp);
1847 /*
1848 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1849 * - mask passed in arg for lines of interest
1850 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1851 * Caller should use TIOCGICOUNT to see which one it was
1852 */
1853 case TIOCMIWAIT:
1854 spin_lock_irqsave(&info->slock, flags);
1855 cnow = info->icount; /* note the counters on entry */
1856 spin_unlock_irqrestore(&info->slock, flags);
1857
1858 return wait_event_interruptible(info->port.delta_msr_wait,
1859 mxser_cflags_changed(info, arg, &cnow));
1860 case MOXA_HighSpeedOn:
1861 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1862 case MOXA_SDS_RSTICOUNTER:
1863 lock_kernel();
1864 info->mon_data.rxcnt = 0;
1865 info->mon_data.txcnt = 0;
1866 unlock_kernel();
1867 return 0;
1868
1869 case MOXA_ASPP_OQUEUE:{
1870 int len, lsr;
1871
1872 lock_kernel();
1873 len = mxser_chars_in_buffer(tty);
1874 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
1875 len += (lsr ? 0 : 1);
1876 unlock_kernel();
1877
1878 return put_user(len, (int __user *)argp);
1879 }
1880 case MOXA_ASPP_MON: {
1881 int mcr, status;
1882
1883 lock_kernel();
1884 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1885 mxser_check_modem_status(tty, info, status);
1886
1887 mcr = inb(info->ioaddr + UART_MCR);
1888 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1889 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1890 else
1891 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1892
1893 if (mcr & MOXA_MUST_MCR_TX_XON)
1894 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1895 else
1896 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1897
1898 if (tty->hw_stopped)
1899 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1900 else
1901 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1902 unlock_kernel();
1903 if (copy_to_user(argp, &info->mon_data,
1904 sizeof(struct mxser_mon)))
1905 return -EFAULT;
1906
1907 return 0;
1908 }
1909 case MOXA_ASPP_LSTATUS: {
1910 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1911 return -EFAULT;
1912
1913 info->err_shadow = 0;
1914 return 0;
1915 }
1916 case MOXA_SET_BAUD_METHOD: {
1917 int method;
1918
1919 if (get_user(method, (int __user *)argp))
1920 return -EFAULT;
1921 mxser_set_baud_method[tty->index] = method;
1922 return put_user(method, (int __user *)argp);
1923 }
1924 default:
1925 return -ENOIOCTLCMD;
1926 }
1927 return 0;
1928 }
1929
1930 /*
1931 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1932 * Return: write counters to the user passed counter struct
1933 * NB: both 1->0 and 0->1 transitions are counted except for
1934 * RI where only 0->1 is counted.
1935 */
1936
1937 static int mxser_get_icount(struct tty_struct *tty,
1938 struct serial_icounter_struct *icount)
1939
1940 {
1941 struct mxser_port *info = tty->driver_data;
1942 struct async_icount cnow;
1943 unsigned long flags;
1944
1945 spin_lock_irqsave(&info->slock, flags);
1946 cnow = info->icount;
1947 spin_unlock_irqrestore(&info->slock, flags);
1948
1949 icount->frame = cnow.frame;
1950 icount->brk = cnow.brk;
1951 icount->overrun = cnow.overrun;
1952 icount->buf_overrun = cnow.buf_overrun;
1953 icount->parity = cnow.parity;
1954 icount->rx = cnow.rx;
1955 icount->tx = cnow.tx;
1956 icount->cts = cnow.cts;
1957 icount->dsr = cnow.dsr;
1958 icount->rng = cnow.rng;
1959 icount->dcd = cnow.dcd;
1960 return 0;
1961 }
1962
1963 static void mxser_stoprx(struct tty_struct *tty)
1964 {
1965 struct mxser_port *info = tty->driver_data;
1966
1967 info->ldisc_stop_rx = 1;
1968 if (I_IXOFF(tty)) {
1969 if (info->board->chip_flag) {
1970 info->IER &= ~MOXA_MUST_RECV_ISR;
1971 outb(info->IER, info->ioaddr + UART_IER);
1972 } else {
1973 info->x_char = STOP_CHAR(tty);
1974 outb(0, info->ioaddr + UART_IER);
1975 info->IER |= UART_IER_THRI;
1976 outb(info->IER, info->ioaddr + UART_IER);
1977 }
1978 }
1979
1980 if (tty->termios->c_cflag & CRTSCTS) {
1981 info->MCR &= ~UART_MCR_RTS;
1982 outb(info->MCR, info->ioaddr + UART_MCR);
1983 }
1984 }
1985
1986 /*
1987 * This routine is called by the upper-layer tty layer to signal that
1988 * incoming characters should be throttled.
1989 */
1990 static void mxser_throttle(struct tty_struct *tty)
1991 {
1992 mxser_stoprx(tty);
1993 }
1994
1995 static void mxser_unthrottle(struct tty_struct *tty)
1996 {
1997 struct mxser_port *info = tty->driver_data;
1998
1999 /* startrx */
2000 info->ldisc_stop_rx = 0;
2001 if (I_IXOFF(tty)) {
2002 if (info->x_char)
2003 info->x_char = 0;
2004 else {
2005 if (info->board->chip_flag) {
2006 info->IER |= MOXA_MUST_RECV_ISR;
2007 outb(info->IER, info->ioaddr + UART_IER);
2008 } else {
2009 info->x_char = START_CHAR(tty);
2010 outb(0, info->ioaddr + UART_IER);
2011 info->IER |= UART_IER_THRI;
2012 outb(info->IER, info->ioaddr + UART_IER);
2013 }
2014 }
2015 }
2016
2017 if (tty->termios->c_cflag & CRTSCTS) {
2018 info->MCR |= UART_MCR_RTS;
2019 outb(info->MCR, info->ioaddr + UART_MCR);
2020 }
2021 }
2022
2023 /*
2024 * mxser_stop() and mxser_start()
2025 *
2026 * This routines are called before setting or resetting tty->stopped.
2027 * They enable or disable transmitter interrupts, as necessary.
2028 */
2029 static void mxser_stop(struct tty_struct *tty)
2030 {
2031 struct mxser_port *info = tty->driver_data;
2032 unsigned long flags;
2033
2034 spin_lock_irqsave(&info->slock, flags);
2035 if (info->IER & UART_IER_THRI) {
2036 info->IER &= ~UART_IER_THRI;
2037 outb(info->IER, info->ioaddr + UART_IER);
2038 }
2039 spin_unlock_irqrestore(&info->slock, flags);
2040 }
2041
2042 static void mxser_start(struct tty_struct *tty)
2043 {
2044 struct mxser_port *info = tty->driver_data;
2045 unsigned long flags;
2046
2047 spin_lock_irqsave(&info->slock, flags);
2048 if (info->xmit_cnt && info->port.xmit_buf) {
2049 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
2050 info->IER |= UART_IER_THRI;
2051 outb(info->IER, info->ioaddr + UART_IER);
2052 }
2053 spin_unlock_irqrestore(&info->slock, flags);
2054 }
2055
2056 static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2057 {
2058 struct mxser_port *info = tty->driver_data;
2059 unsigned long flags;
2060
2061 spin_lock_irqsave(&info->slock, flags);
2062 mxser_change_speed(tty, old_termios);
2063 spin_unlock_irqrestore(&info->slock, flags);
2064
2065 if ((old_termios->c_cflag & CRTSCTS) &&
2066 !(tty->termios->c_cflag & CRTSCTS)) {
2067 tty->hw_stopped = 0;
2068 mxser_start(tty);
2069 }
2070
2071 /* Handle sw stopped */
2072 if ((old_termios->c_iflag & IXON) &&
2073 !(tty->termios->c_iflag & IXON)) {
2074 tty->stopped = 0;
2075
2076 if (info->board->chip_flag) {
2077 spin_lock_irqsave(&info->slock, flags);
2078 mxser_disable_must_rx_software_flow_control(
2079 info->ioaddr);
2080 spin_unlock_irqrestore(&info->slock, flags);
2081 }
2082
2083 mxser_start(tty);
2084 }
2085 }
2086
2087 /*
2088 * mxser_wait_until_sent() --- wait until the transmitter is empty
2089 */
2090 static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2091 {
2092 struct mxser_port *info = tty->driver_data;
2093 unsigned long orig_jiffies, char_time;
2094 int lsr;
2095
2096 /* printk(KERN_INFO "mxser_wait_until_sent\n"); */
2097
2098 if (info->type == PORT_UNKNOWN)
2099 return;
2100
2101 if (info->xmit_fifo_size == 0)
2102 return; /* Just in case.... */
2103
2104 orig_jiffies = jiffies;
2105 /*
2106 * Set the check interval to be 1/5 of the estimated time to
2107 * send a single character, and make it at least 1. The check
2108 * interval should also be less than the timeout.
2109 *
2110 * Note: we have to use pretty tight timings here to satisfy
2111 * the NIST-PCTS.
2112 */
2113 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2114 char_time = char_time / 5;
2115 if (char_time == 0)
2116 char_time = 1;
2117 if (timeout && timeout < char_time)
2118 char_time = timeout;
2119 /*
2120 * If the transmitter hasn't cleared in twice the approximate
2121 * amount of time to send the entire FIFO, it probably won't
2122 * ever clear. This assumes the UART isn't doing flow
2123 * control, which is currently the case. Hence, if it ever
2124 * takes longer than info->timeout, this is probably due to a
2125 * UART bug of some kind. So, we clamp the timeout parameter at
2126 * 2*info->timeout.
2127 */
2128 if (!timeout || timeout > 2 * info->timeout)
2129 timeout = 2 * info->timeout;
2130 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2131 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2132 timeout, char_time);
2133 printk("jiff=%lu...", jiffies);
2134 #endif
2135 lock_kernel();
2136 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
2137 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2138 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2139 #endif
2140 schedule_timeout_interruptible(char_time);
2141 if (signal_pending(current))
2142 break;
2143 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2144 break;
2145 }
2146 set_current_state(TASK_RUNNING);
2147 unlock_kernel();
2148
2149 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2150 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2151 #endif
2152 }
2153
2154 /*
2155 * This routine is called by tty_hangup() when a hangup is signaled.
2156 */
2157 static void mxser_hangup(struct tty_struct *tty)
2158 {
2159 struct mxser_port *info = tty->driver_data;
2160
2161 mxser_flush_buffer(tty);
2162 mxser_shutdown(tty);
2163 tty_port_hangup(&info->port);
2164 }
2165
2166 /*
2167 * mxser_rs_break() --- routine which turns the break handling on or off
2168 */
2169 static int mxser_rs_break(struct tty_struct *tty, int break_state)
2170 {
2171 struct mxser_port *info = tty->driver_data;
2172 unsigned long flags;
2173
2174 spin_lock_irqsave(&info->slock, flags);
2175 if (break_state == -1)
2176 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2177 info->ioaddr + UART_LCR);
2178 else
2179 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2180 info->ioaddr + UART_LCR);
2181 spin_unlock_irqrestore(&info->slock, flags);
2182 return 0;
2183 }
2184
2185 static void mxser_receive_chars(struct tty_struct *tty,
2186 struct mxser_port *port, int *status)
2187 {
2188 unsigned char ch, gdl;
2189 int ignored = 0;
2190 int cnt = 0;
2191 int recv_room;
2192 int max = 256;
2193
2194 recv_room = tty->receive_room;
2195 if (recv_room == 0 && !port->ldisc_stop_rx)
2196 mxser_stoprx(tty);
2197 if (port->board->chip_flag != MOXA_OTHER_UART) {
2198
2199 if (*status & UART_LSR_SPECIAL)
2200 goto intr_old;
2201 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2202 (*status & MOXA_MUST_LSR_RERR))
2203 goto intr_old;
2204 if (*status & MOXA_MUST_LSR_RERR)
2205 goto intr_old;
2206
2207 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2208
2209 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2210 gdl &= MOXA_MUST_GDL_MASK;
2211 if (gdl >= recv_room) {
2212 if (!port->ldisc_stop_rx)
2213 mxser_stoprx(tty);
2214 }
2215 while (gdl--) {
2216 ch = inb(port->ioaddr + UART_RX);
2217 tty_insert_flip_char(tty, ch, 0);
2218 cnt++;
2219 }
2220 goto end_intr;
2221 }
2222 intr_old:
2223
2224 do {
2225 if (max-- < 0)
2226 break;
2227
2228 ch = inb(port->ioaddr + UART_RX);
2229 if (port->board->chip_flag && (*status & UART_LSR_OE))
2230 outb(0x23, port->ioaddr + UART_FCR);
2231 *status &= port->read_status_mask;
2232 if (*status & port->ignore_status_mask) {
2233 if (++ignored > 100)
2234 break;
2235 } else {
2236 char flag = 0;
2237 if (*status & UART_LSR_SPECIAL) {
2238 if (*status & UART_LSR_BI) {
2239 flag = TTY_BREAK;
2240 port->icount.brk++;
2241
2242 if (port->port.flags & ASYNC_SAK)
2243 do_SAK(tty);
2244 } else if (*status & UART_LSR_PE) {
2245 flag = TTY_PARITY;
2246 port->icount.parity++;
2247 } else if (*status & UART_LSR_FE) {
2248 flag = TTY_FRAME;
2249 port->icount.frame++;
2250 } else if (*status & UART_LSR_OE) {
2251 flag = TTY_OVERRUN;
2252 port->icount.overrun++;
2253 } else
2254 flag = TTY_BREAK;
2255 }
2256 tty_insert_flip_char(tty, ch, flag);
2257 cnt++;
2258 if (cnt >= recv_room) {
2259 if (!port->ldisc_stop_rx)
2260 mxser_stoprx(tty);
2261 break;
2262 }
2263
2264 }
2265
2266 if (port->board->chip_flag)
2267 break;
2268
2269 *status = inb(port->ioaddr + UART_LSR);
2270 } while (*status & UART_LSR_DR);
2271
2272 end_intr:
2273 mxvar_log.rxcnt[tty->index] += cnt;
2274 port->mon_data.rxcnt += cnt;
2275 port->mon_data.up_rxcnt += cnt;
2276
2277 /*
2278 * We are called from an interrupt context with &port->slock
2279 * being held. Drop it temporarily in order to prevent
2280 * recursive locking.
2281 */
2282 spin_unlock(&port->slock);
2283 tty_flip_buffer_push(tty);
2284 spin_lock(&port->slock);
2285 }
2286
2287 static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
2288 {
2289 int count, cnt;
2290
2291 if (port->x_char) {
2292 outb(port->x_char, port->ioaddr + UART_TX);
2293 port->x_char = 0;
2294 mxvar_log.txcnt[tty->index]++;
2295 port->mon_data.txcnt++;
2296 port->mon_data.up_txcnt++;
2297 port->icount.tx++;
2298 return;
2299 }
2300
2301 if (port->port.xmit_buf == NULL)
2302 return;
2303
2304 if (port->xmit_cnt <= 0 || tty->stopped ||
2305 (tty->hw_stopped &&
2306 (port->type != PORT_16550A) &&
2307 (!port->board->chip_flag))) {
2308 port->IER &= ~UART_IER_THRI;
2309 outb(port->IER, port->ioaddr + UART_IER);
2310 return;
2311 }
2312
2313 cnt = port->xmit_cnt;
2314 count = port->xmit_fifo_size;
2315 do {
2316 outb(port->port.xmit_buf[port->xmit_tail++],
2317 port->ioaddr + UART_TX);
2318 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2319 if (--port->xmit_cnt <= 0)
2320 break;
2321 } while (--count > 0);
2322 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
2323
2324 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2325 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2326 port->icount.tx += (cnt - port->xmit_cnt);
2327
2328 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2329 tty_wakeup(tty);
2330
2331 if (port->xmit_cnt <= 0) {
2332 port->IER &= ~UART_IER_THRI;
2333 outb(port->IER, port->ioaddr + UART_IER);
2334 }
2335 }
2336
2337 /*
2338 * This is the serial driver's generic interrupt routine
2339 */
2340 static irqreturn_t mxser_interrupt(int irq, void *dev_id)
2341 {
2342 int status, iir, i;
2343 struct mxser_board *brd = NULL;
2344 struct mxser_port *port;
2345 int max, irqbits, bits, msr;
2346 unsigned int int_cnt, pass_counter = 0;
2347 int handled = IRQ_NONE;
2348 struct tty_struct *tty;
2349
2350 for (i = 0; i < MXSER_BOARDS; i++)
2351 if (dev_id == &mxser_boards[i]) {
2352 brd = dev_id;
2353 break;
2354 }
2355
2356 if (i == MXSER_BOARDS)
2357 goto irq_stop;
2358 if (brd == NULL)
2359 goto irq_stop;
2360 max = brd->info->nports;
2361 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2362 irqbits = inb(brd->vector) & brd->vector_mask;
2363 if (irqbits == brd->vector_mask)
2364 break;
2365
2366 handled = IRQ_HANDLED;
2367 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2368 if (irqbits == brd->vector_mask)
2369 break;
2370 if (bits & irqbits)
2371 continue;
2372 port = &brd->ports[i];
2373
2374 int_cnt = 0;
2375 spin_lock(&port->slock);
2376 do {
2377 iir = inb(port->ioaddr + UART_IIR);
2378 if (iir & UART_IIR_NO_INT)
2379 break;
2380 iir &= MOXA_MUST_IIR_MASK;
2381 tty = tty_port_tty_get(&port->port);
2382 if (!tty ||
2383 (port->port.flags & ASYNC_CLOSING) ||
2384 !(port->port.flags &
2385 ASYNC_INITIALIZED)) {
2386 status = inb(port->ioaddr + UART_LSR);
2387 outb(0x27, port->ioaddr + UART_FCR);
2388 inb(port->ioaddr + UART_MSR);
2389 tty_kref_put(tty);
2390 break;
2391 }
2392
2393 status = inb(port->ioaddr + UART_LSR);
2394
2395 if (status & UART_LSR_PE)
2396 port->err_shadow |= NPPI_NOTIFY_PARITY;
2397 if (status & UART_LSR_FE)
2398 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2399 if (status & UART_LSR_OE)
2400 port->err_shadow |=
2401 NPPI_NOTIFY_HW_OVERRUN;
2402 if (status & UART_LSR_BI)
2403 port->err_shadow |= NPPI_NOTIFY_BREAK;
2404
2405 if (port->board->chip_flag) {
2406 if (iir == MOXA_MUST_IIR_GDA ||
2407 iir == MOXA_MUST_IIR_RDA ||
2408 iir == MOXA_MUST_IIR_RTO ||
2409 iir == MOXA_MUST_IIR_LSR)
2410 mxser_receive_chars(tty, port,
2411 &status);
2412
2413 } else {
2414 status &= port->read_status_mask;
2415 if (status & UART_LSR_DR)
2416 mxser_receive_chars(tty, port,
2417 &status);
2418 }
2419 msr = inb(port->ioaddr + UART_MSR);
2420 if (msr & UART_MSR_ANY_DELTA)
2421 mxser_check_modem_status(tty, port, msr);
2422
2423 if (port->board->chip_flag) {
2424 if (iir == 0x02 && (status &
2425 UART_LSR_THRE))
2426 mxser_transmit_chars(tty, port);
2427 } else {
2428 if (status & UART_LSR_THRE)
2429 mxser_transmit_chars(tty, port);
2430 }
2431 tty_kref_put(tty);
2432 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2433 spin_unlock(&port->slock);
2434 }
2435 }
2436
2437 irq_stop:
2438 return handled;
2439 }
2440
2441 static const struct tty_operations mxser_ops = {
2442 .open = mxser_open,
2443 .close = mxser_close,
2444 .write = mxser_write,
2445 .put_char = mxser_put_char,
2446 .flush_chars = mxser_flush_chars,
2447 .write_room = mxser_write_room,
2448 .chars_in_buffer = mxser_chars_in_buffer,
2449 .flush_buffer = mxser_flush_buffer,
2450 .ioctl = mxser_ioctl,
2451 .throttle = mxser_throttle,
2452 .unthrottle = mxser_unthrottle,
2453 .set_termios = mxser_set_termios,
2454 .stop = mxser_stop,
2455 .start = mxser_start,
2456 .hangup = mxser_hangup,
2457 .break_ctl = mxser_rs_break,
2458 .wait_until_sent = mxser_wait_until_sent,
2459 .tiocmget = mxser_tiocmget,
2460 .tiocmset = mxser_tiocmset,
2461 .get_icount = mxser_get_icount,
2462 };
2463
2464 struct tty_port_operations mxser_port_ops = {
2465 .carrier_raised = mxser_carrier_raised,
2466 .dtr_rts = mxser_dtr_rts,
2467 };
2468
2469 /*
2470 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2471 */
2472
2473 static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2474 unsigned int irq)
2475 {
2476 if (irq)
2477 free_irq(brd->irq, brd);
2478 if (pdev != NULL) { /* PCI */
2479 #ifdef CONFIG_PCI
2480 pci_release_region(pdev, 2);
2481 pci_release_region(pdev, 3);
2482 #endif
2483 } else {
2484 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2485 release_region(brd->vector, 1);
2486 }
2487 }
2488
2489 static int __devinit mxser_initbrd(struct mxser_board *brd,
2490 struct pci_dev *pdev)
2491 {
2492 struct mxser_port *info;
2493 unsigned int i;
2494 int retval;
2495
2496 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2497 brd->ports[0].max_baud);
2498
2499 for (i = 0; i < brd->info->nports; i++) {
2500 info = &brd->ports[i];
2501 tty_port_init(&info->port);
2502 info->port.ops = &mxser_port_ops;
2503 info->board = brd;
2504 info->stop_rx = 0;
2505 info->ldisc_stop_rx = 0;
2506
2507 /* Enhance mode enabled here */
2508 if (brd->chip_flag != MOXA_OTHER_UART) {
2509 pr_info("mxser: brd->ports[%d]: mxser_enable_must_enchance_mode\n"
2510 "info->ioaddr = 0x%lx\n", i, info->ioaddr);
2511 mxser_enable_must_enchance_mode(info->ioaddr);
2512 }
2513
2514 info->port.flags = ASYNC_SHARE_IRQ;
2515 info->type = brd->uart_type;
2516
2517 process_txrx_fifo(info);
2518
2519 info->custom_divisor = info->baud_base * 16;
2520 info->port.close_delay = 5 * HZ / 10;
2521 info->port.closing_wait = 30 * HZ;
2522 info->normal_termios = mxvar_sdriver->init_termios;
2523 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2524 info->err_shadow = 0;
2525 spin_lock_init(&info->slock);
2526
2527 /* before set INT ISR, disable all int */
2528 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2529 info->ioaddr + UART_IER);
2530 }
2531
2532 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2533 brd);
2534 if (retval) {
2535 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2536 "conflict with another device.\n",
2537 brd->info->name, brd->irq);
2538 /* We hold resources, we need to release them. */
2539 mxser_release_res(brd, pdev, 0);
2540 }
2541 return retval;
2542 }
2543
2544 static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
2545 {
2546 int id, i, bits;
2547 unsigned short regs[16], irq;
2548 unsigned char scratch, scratch2;
2549
2550 #ifdef CONFIG_ARCH_MOXART
2551 brd->chip_flag = MOXA_MUST_MU860_HWID;
2552 brd->info = &mxser_cards[32];
2553 brd->vector_mask = 0x0c;
2554 brd->irq = IRQ_UART;
2555 brd->vector = IO_ADDRESS(MOXART_UART_INT_VEC_BASE);
2556 brd->uart_type = PORT_16550A;
2557 for (i = 0; i < 2; i++) {
2558 brd->ports[i].ioaddr = IO_ADDRESS(MOXART_UART3_BASE) + i * 32;
2559 brd->ports[i].baud_base = 921600;
2560 brd->ports[i].max_baud = 921600;
2561 brd->ports[i].opmode_ioaddr = IO_ADDRESS(MOXART_UART_MODE_BASE);
2562 }
2563
2564 #else
2565
2566 brd->chip_flag = MOXA_OTHER_UART;
2567
2568 id = mxser_read_register(cap, regs);
2569 switch (id) {
2570 case C168_ASIC_ID:
2571 brd->info = &mxser_cards[0];
2572 break;
2573 case C104_ASIC_ID:
2574 brd->info = &mxser_cards[1];
2575 break;
2576 case CI104J_ASIC_ID:
2577 brd->info = &mxser_cards[2];
2578 break;
2579 case C102_ASIC_ID:
2580 brd->info = &mxser_cards[5];
2581 break;
2582 case CI132_ASIC_ID:
2583 brd->info = &mxser_cards[6];
2584 break;
2585 case CI134_ASIC_ID:
2586 brd->info = &mxser_cards[7];
2587 break;
2588 default:
2589 return 0;
2590 }
2591
2592 irq = 0;
2593 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2594 Flag-hack checks if configuration should be read as 2-port here. */
2595 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
2596 irq = regs[9] & 0xF000;
2597 irq = irq | (irq >> 4);
2598 if (irq != (regs[9] & 0xFF00))
2599 goto err_irqconflict;
2600 } else if (brd->info->nports == 4) {
2601 irq = regs[9] & 0xF000;
2602 irq = irq | (irq >> 4);
2603 irq = irq | (irq >> 8);
2604 if (irq != regs[9])
2605 goto err_irqconflict;
2606 } else if (brd->info->nports == 8) {
2607 irq = regs[9] & 0xF000;
2608 irq = irq | (irq >> 4);
2609 irq = irq | (irq >> 8);
2610 if ((irq != regs[9]) || (irq != regs[10]))
2611 goto err_irqconflict;
2612 }
2613
2614 if (!irq) {
2615 printk(KERN_ERR "mxser: interrupt number unset\n");
2616 return -EIO;
2617 }
2618 brd->irq = ((int)(irq & 0xF000) >> 12);
2619 for (i = 0; i < 8; i++)
2620 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
2621 if ((regs[12] & 0x80) == 0) {
2622 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2623 return -EIO;
2624 }
2625 brd->vector = (int)regs[11]; /* interrupt vector */
2626 if (id == 1)
2627 brd->vector_mask = 0x00FF;
2628 else
2629 brd->vector_mask = 0x000F;
2630 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2631 if (regs[12] & bits) {
2632 brd->ports[i].baud_base = 921600;
2633 brd->ports[i].max_baud = 921600;
2634 } else {
2635 brd->ports[i].baud_base = 115200;
2636 brd->ports[i].max_baud = 115200;
2637 }
2638 }
2639 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2640 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2641 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2642 outb(scratch2, cap + UART_LCR);
2643 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2644 scratch = inb(cap + UART_IIR);
2645
2646 if (scratch & 0xC0)
2647 brd->uart_type = PORT_16550A;
2648 else
2649 brd->uart_type = PORT_16450;
2650
2651 #endif
2652
2653 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
2654 "mxser(IO)")) {
2655 printk(KERN_ERR "mxser: can't request ports I/O region: "
2656 "0x%.8lx-0x%.8lx\n",
2657 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2658 8 * brd->info->nports - 1);
2659 return -EIO;
2660 }
2661 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2662 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2663 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2664 "0x%.8lx-0x%.8lx\n",
2665 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2666 8 * brd->info->nports - 1);
2667 return -EIO;
2668 }
2669 return brd->info->nports;
2670
2671 err_irqconflict:
2672 printk(KERN_ERR "mxser: invalid interrupt number\n");
2673 return -EIO;
2674 }
2675
2676 static int __devinit mxser_probe(struct pci_dev *pdev,
2677 const struct pci_device_id *ent)
2678 {
2679 #ifdef CONFIG_PCI
2680 struct mxser_board *brd;
2681 unsigned int i, j;
2682 unsigned long ioaddress;
2683 int retval = -EINVAL;
2684
2685 for (i = 0; i < MXSER_BOARDS; i++)
2686 if (mxser_boards[i].info == NULL)
2687 break;
2688
2689 if (i >= MXSER_BOARDS) {
2690 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2691 "not configured\n", MXSER_BOARDS);
2692 goto err;
2693 }
2694
2695 brd = &mxser_boards[i];
2696 brd->idx = i * MXSER_PORTS_PER_BOARD;
2697 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
2698 mxser_cards[ent->driver_data].name,
2699 pdev->bus->number, PCI_SLOT(pdev->devfn));
2700
2701 retval = pci_enable_device(pdev);
2702 if (retval) {
2703 dev_err(&pdev->dev, "PCI enable failed\n");
2704 goto err;
2705 }
2706
2707 /* io address */
2708 ioaddress = pci_resource_start(pdev, 2);
2709 retval = pci_request_region(pdev, 2, "mxser(IO)");
2710 if (retval)
2711 goto err;
2712
2713 brd->info = &mxser_cards[ent->driver_data];
2714 for (i = 0; i < brd->info->nports; i++)
2715 brd->ports[i].ioaddr = ioaddress + 8 * i;
2716
2717 /* vector */
2718 ioaddress = pci_resource_start(pdev, 3);
2719 retval = pci_request_region(pdev, 3, "mxser(vector)");
2720 if (retval)
2721 goto err_relio;
2722 brd->vector = ioaddress;
2723
2724 /* irq */
2725 brd->irq = pdev->irq;
2726
2727 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2728 brd->uart_type = PORT_16550A;
2729 brd->vector_mask = 0;
2730
2731 for (i = 0; i < brd->info->nports; i++) {
2732 for (j = 0; j < UART_INFO_NUM; j++) {
2733 if (Gpci_uart_info[j].type == brd->chip_flag) {
2734 brd->ports[i].max_baud =
2735 Gpci_uart_info[j].max_baud;
2736
2737 /* exception....CP-102 */
2738 if (brd->info->flags & MXSER_HIGHBAUD)
2739 brd->ports[i].max_baud = 921600;
2740 break;
2741 }
2742 }
2743 }
2744
2745 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2746 for (i = 0; i < brd->info->nports; i++) {
2747 if (i < 4)
2748 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2749 else
2750 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
2751 }
2752 outb(0, ioaddress + 4); /* default set to RS232 mode */
2753 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
2754 }
2755
2756 for (i = 0; i < brd->info->nports; i++) {
2757 brd->vector_mask |= (1 << i);
2758 brd->ports[i].baud_base = 921600;
2759 }
2760
2761 /* mxser_initbrd will hook ISR. */
2762 retval = mxser_initbrd(brd, pdev);
2763 if (retval)
2764 goto err_null;
2765
2766 for (i = 0; i < brd->info->nports; i++)
2767 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2768
2769 pci_set_drvdata(pdev, brd);
2770
2771 return 0;
2772 err_relio:
2773 pci_release_region(pdev, 2);
2774 err_null:
2775 brd->info = NULL;
2776 err:
2777 return retval;
2778 #else
2779 return -ENODEV;
2780 #endif
2781 }
2782
2783 static void __devexit mxser_remove(struct pci_dev *pdev)
2784 {
2785 struct mxser_board *brd = pci_get_drvdata(pdev);
2786 unsigned int i;
2787
2788 for (i = 0; i < brd->info->nports; i++)
2789 tty_unregister_device(mxvar_sdriver, brd->idx + i);
2790
2791 mxser_release_res(brd, pdev, 1);
2792 brd->info = NULL;
2793 }
2794
2795 static struct pci_driver mxser_driver = {
2796 .name = "mxser",
2797 .id_table = mxser_pcibrds,
2798 .probe = mxser_probe,
2799 .remove = __devexit_p(mxser_remove)
2800 };
2801
2802 static int __init mxser_module_init(void)
2803 {
2804 struct mxser_board *brd;
2805 unsigned int b, i, m;
2806 int retval;
2807
2808 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2809 if (!mxvar_sdriver)
2810 return -ENOMEM;
2811
2812 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2813 MXSER_VERSION);
2814
2815 /* Initialize the tty_driver structure */
2816 mxvar_sdriver->owner = THIS_MODULE;
2817 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2818 #ifdef CONFIG_ARCH_MOXART
2819 mxvar_sdriver->name = "ttyM";
2820 #else
2821 mxvar_sdriver->name = "ttyMI";
2822 #endif
2823 mxvar_sdriver->major = ttymajor;
2824 mxvar_sdriver->minor_start = 0;
2825 mxvar_sdriver->num = MXSER_PORTS + 1;
2826 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2827 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2828 mxvar_sdriver->init_termios = tty_std_termios;
2829 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2830 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2831 tty_set_operations(mxvar_sdriver, &mxser_ops);
2832
2833 retval = tty_register_driver(mxvar_sdriver);
2834 if (retval) {
2835 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2836 "tty driver !\n");
2837 goto err_put;
2838 }
2839
2840 /* Start finding ISA boards here */
2841 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2842 #ifndef CONFIG_ARCH_MOXART
2843 /* no continue if no ioaddr param fed to module
2844 (force past for UC-7112-LX) */
2845 if (!ioaddr[b])
2846 continue;
2847 #endif
2848
2849 brd = &mxser_boards[m];
2850 retval = mxser_get_ISA_conf(ioaddr[b], brd);
2851 if (retval <= 0) {
2852 brd->info = NULL;
2853 continue;
2854 }
2855
2856 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2857 brd->info->name, ioaddr[b]);
2858
2859 /* mxser_initbrd will hook ISR. */
2860 if (mxser_initbrd(brd, NULL) < 0) {
2861 brd->info = NULL;
2862 continue;
2863 }
2864
2865 brd->idx = m * MXSER_PORTS_PER_BOARD;
2866 for (i = 0; i < brd->info->nports; i++)
2867 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
2868
2869 m++;
2870 }
2871
2872 retval = pci_register_driver(&mxser_driver);
2873 if (retval) {
2874 printk(KERN_ERR "mxser: can't register pci driver\n");
2875 if (!m) {
2876 retval = -ENODEV;
2877 goto err_unr;
2878 } /* else: we have some ISA cards under control */
2879 }
2880
2881 return 0;
2882 err_unr:
2883 tty_unregister_driver(mxvar_sdriver);
2884 err_put:
2885 put_tty_driver(mxvar_sdriver);
2886 return retval;
2887 }
2888
2889 static void __exit mxser_module_exit(void)
2890 {
2891 unsigned int i, j;
2892
2893 pci_unregister_driver(&mxser_driver);
2894
2895 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2896 if (mxser_boards[i].info != NULL)
2897 for (j = 0; j < mxser_boards[i].info->nports; j++)
2898 tty_unregister_device(mxvar_sdriver,
2899 mxser_boards[i].idx + j);
2900 tty_unregister_driver(mxvar_sdriver);
2901 put_tty_driver(mxvar_sdriver);
2902
2903 for (i = 0; i < MXSER_BOARDS; i++)
2904 if (mxser_boards[i].info != NULL)
2905 mxser_release_res(&mxser_boards[i], NULL, 1);
2906 }
2907
2908 module_init(mxser_module_init);
2909 module_exit(mxser_module_exit);
Linux ARM platform port for MOXA ART SoC