2 * TI OMAP1 Real Time Clock interface for Linux
4 * Copyright (C) 2003 MontaVista Software, Inc.
5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
7 * Copyright (C) 2006 David Brownell (new RTC framework)
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/ioport.h>
19 #include <linux/delay.h>
20 #include <linux/rtc.h>
21 #include <linux/bcd.h>
22 #include <linux/platform_device.h>
27 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
28 * with century-range alarm matching, driven by the 32kHz clock.
30 * The main user-visible ways it differs from PC RTCs are by omitting
31 * "don't care" alarm fields and sub-second periodic IRQs, and having
32 * an autoadjust mechanism to calibrate to the true oscillator rate.
34 * Board-specific wiring options include using split power mode with
35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
37 * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment.
40 #define OMAP_RTC_BASE 0xfffb4800
43 #define OMAP_RTC_SECONDS_REG 0x00
44 #define OMAP_RTC_MINUTES_REG 0x04
45 #define OMAP_RTC_HOURS_REG 0x08
46 #define OMAP_RTC_DAYS_REG 0x0C
47 #define OMAP_RTC_MONTHS_REG 0x10
48 #define OMAP_RTC_YEARS_REG 0x14
49 #define OMAP_RTC_WEEKS_REG 0x18
51 #define OMAP_RTC_ALARM_SECONDS_REG 0x20
52 #define OMAP_RTC_ALARM_MINUTES_REG 0x24
53 #define OMAP_RTC_ALARM_HOURS_REG 0x28
54 #define OMAP_RTC_ALARM_DAYS_REG 0x2c
55 #define OMAP_RTC_ALARM_MONTHS_REG 0x30
56 #define OMAP_RTC_ALARM_YEARS_REG 0x34
58 #define OMAP_RTC_CTRL_REG 0x40
59 #define OMAP_RTC_STATUS_REG 0x44
60 #define OMAP_RTC_INTERRUPTS_REG 0x48
62 #define OMAP_RTC_COMP_LSB_REG 0x4c
63 #define OMAP_RTC_COMP_MSB_REG 0x50
64 #define OMAP_RTC_OSC_REG 0x54
66 /* OMAP_RTC_CTRL_REG bit fields: */
67 #define OMAP_RTC_CTRL_SPLIT (1<<7)
68 #define OMAP_RTC_CTRL_DISABLE (1<<6)
69 #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
70 #define OMAP_RTC_CTRL_TEST (1<<4)
71 #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
72 #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
73 #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
74 #define OMAP_RTC_CTRL_STOP (1<<0)
76 /* OMAP_RTC_STATUS_REG bit fields: */
77 #define OMAP_RTC_STATUS_POWER_UP (1<<7)
78 #define OMAP_RTC_STATUS_ALARM (1<<6)
79 #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
80 #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
81 #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
82 #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
83 #define OMAP_RTC_STATUS_RUN (1<<1)
84 #define OMAP_RTC_STATUS_BUSY (1<<0)
86 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
87 #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
88 #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
91 #define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr))
92 #define rtc_write(val, addr) omap_writeb(val, OMAP_RTC_BASE + (addr))
95 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
96 * so the only other requirement is that register accesses which
97 * require BUSY to be clear are made with IRQs locally disabled
99 static void rtc_wait_not_busy(void)
104 /* BUSY may stay active for 1/32768 second (~30 usec) */
105 for (count
= 0; count
< 50; count
++) {
106 status
= rtc_read(OMAP_RTC_STATUS_REG
);
107 if ((status
& (u8
)OMAP_RTC_STATUS_BUSY
) == 0)
111 /* now we have ~15 usec to read/write various registers */
114 static irqreturn_t
rtc_irq(int irq
, void *rtc
)
116 unsigned long events
= 0;
119 irq_data
= rtc_read(OMAP_RTC_STATUS_REG
);
122 if (irq_data
& OMAP_RTC_STATUS_ALARM
) {
123 rtc_write(OMAP_RTC_STATUS_ALARM
, OMAP_RTC_STATUS_REG
);
124 events
|= RTC_IRQF
| RTC_AF
;
127 /* 1/sec periodic/update irq? */
128 if (irq_data
& OMAP_RTC_STATUS_1S_EVENT
)
129 events
|= RTC_IRQF
| RTC_UF
;
131 rtc_update_irq(rtc
, 1, events
);
136 #ifdef CONFIG_RTC_INTF_DEV
139 omap_rtc_ioctl(struct device
*dev
, unsigned int cmd
, unsigned long arg
)
155 reg
= rtc_read(OMAP_RTC_INTERRUPTS_REG
);
157 /* AIE = Alarm Interrupt Enable */
159 reg
&= ~OMAP_RTC_INTERRUPTS_IT_ALARM
;
162 reg
|= OMAP_RTC_INTERRUPTS_IT_ALARM
;
164 /* UIE = Update Interrupt Enable (1/second) */
166 reg
&= ~OMAP_RTC_INTERRUPTS_IT_TIMER
;
169 reg
|= OMAP_RTC_INTERRUPTS_IT_TIMER
;
173 rtc_write(reg
, OMAP_RTC_INTERRUPTS_REG
);
180 #define omap_rtc_ioctl NULL
183 /* this hardware doesn't support "don't care" alarm fields */
184 static int tm2bcd(struct rtc_time
*tm
)
186 if (rtc_valid_tm(tm
) != 0)
189 tm
->tm_sec
= bin2bcd(tm
->tm_sec
);
190 tm
->tm_min
= bin2bcd(tm
->tm_min
);
191 tm
->tm_hour
= bin2bcd(tm
->tm_hour
);
192 tm
->tm_mday
= bin2bcd(tm
->tm_mday
);
194 tm
->tm_mon
= bin2bcd(tm
->tm_mon
+ 1);
197 if (tm
->tm_year
< 100 || tm
->tm_year
> 199)
199 tm
->tm_year
= bin2bcd(tm
->tm_year
- 100);
204 static void bcd2tm(struct rtc_time
*tm
)
206 tm
->tm_sec
= bcd2bin(tm
->tm_sec
);
207 tm
->tm_min
= bcd2bin(tm
->tm_min
);
208 tm
->tm_hour
= bcd2bin(tm
->tm_hour
);
209 tm
->tm_mday
= bcd2bin(tm
->tm_mday
);
210 tm
->tm_mon
= bcd2bin(tm
->tm_mon
) - 1;
212 tm
->tm_year
= bcd2bin(tm
->tm_year
) + 100;
216 static int omap_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
218 /* we don't report wday/yday/isdst ... */
222 tm
->tm_sec
= rtc_read(OMAP_RTC_SECONDS_REG
);
223 tm
->tm_min
= rtc_read(OMAP_RTC_MINUTES_REG
);
224 tm
->tm_hour
= rtc_read(OMAP_RTC_HOURS_REG
);
225 tm
->tm_mday
= rtc_read(OMAP_RTC_DAYS_REG
);
226 tm
->tm_mon
= rtc_read(OMAP_RTC_MONTHS_REG
);
227 tm
->tm_year
= rtc_read(OMAP_RTC_YEARS_REG
);
235 static int omap_rtc_set_time(struct device
*dev
, struct rtc_time
*tm
)
242 rtc_write(tm
->tm_year
, OMAP_RTC_YEARS_REG
);
243 rtc_write(tm
->tm_mon
, OMAP_RTC_MONTHS_REG
);
244 rtc_write(tm
->tm_mday
, OMAP_RTC_DAYS_REG
);
245 rtc_write(tm
->tm_hour
, OMAP_RTC_HOURS_REG
);
246 rtc_write(tm
->tm_min
, OMAP_RTC_MINUTES_REG
);
247 rtc_write(tm
->tm_sec
, OMAP_RTC_SECONDS_REG
);
254 static int omap_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
259 alm
->time
.tm_sec
= rtc_read(OMAP_RTC_ALARM_SECONDS_REG
);
260 alm
->time
.tm_min
= rtc_read(OMAP_RTC_ALARM_MINUTES_REG
);
261 alm
->time
.tm_hour
= rtc_read(OMAP_RTC_ALARM_HOURS_REG
);
262 alm
->time
.tm_mday
= rtc_read(OMAP_RTC_ALARM_DAYS_REG
);
263 alm
->time
.tm_mon
= rtc_read(OMAP_RTC_ALARM_MONTHS_REG
);
264 alm
->time
.tm_year
= rtc_read(OMAP_RTC_ALARM_YEARS_REG
);
269 alm
->enabled
= !!(rtc_read(OMAP_RTC_INTERRUPTS_REG
)
270 & OMAP_RTC_INTERRUPTS_IT_ALARM
);
275 static int omap_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
279 if (tm2bcd(&alm
->time
) < 0)
285 rtc_write(alm
->time
.tm_year
, OMAP_RTC_ALARM_YEARS_REG
);
286 rtc_write(alm
->time
.tm_mon
, OMAP_RTC_ALARM_MONTHS_REG
);
287 rtc_write(alm
->time
.tm_mday
, OMAP_RTC_ALARM_DAYS_REG
);
288 rtc_write(alm
->time
.tm_hour
, OMAP_RTC_ALARM_HOURS_REG
);
289 rtc_write(alm
->time
.tm_min
, OMAP_RTC_ALARM_MINUTES_REG
);
290 rtc_write(alm
->time
.tm_sec
, OMAP_RTC_ALARM_SECONDS_REG
);
292 reg
= rtc_read(OMAP_RTC_INTERRUPTS_REG
);
294 reg
|= OMAP_RTC_INTERRUPTS_IT_ALARM
;
296 reg
&= ~OMAP_RTC_INTERRUPTS_IT_ALARM
;
297 rtc_write(reg
, OMAP_RTC_INTERRUPTS_REG
);
304 static struct rtc_class_ops omap_rtc_ops
= {
305 .ioctl
= omap_rtc_ioctl
,
306 .read_time
= omap_rtc_read_time
,
307 .set_time
= omap_rtc_set_time
,
308 .read_alarm
= omap_rtc_read_alarm
,
309 .set_alarm
= omap_rtc_set_alarm
,
312 static int omap_rtc_alarm
;
313 static int omap_rtc_timer
;
315 static int __init
omap_rtc_probe(struct platform_device
*pdev
)
317 struct resource
*res
, *mem
;
318 struct rtc_device
*rtc
;
321 omap_rtc_timer
= platform_get_irq(pdev
, 0);
322 if (omap_rtc_timer
<= 0) {
323 pr_debug("%s: no update irq?\n", pdev
->name
);
327 omap_rtc_alarm
= platform_get_irq(pdev
, 1);
328 if (omap_rtc_alarm
<= 0) {
329 pr_debug("%s: no alarm irq?\n", pdev
->name
);
333 /* NOTE: using static mapping for RTC registers */
334 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
335 if (res
&& res
->start
!= OMAP_RTC_BASE
) {
336 pr_debug("%s: RTC registers at %08x, expected %08x\n",
337 pdev
->name
, (unsigned) res
->start
, OMAP_RTC_BASE
);
342 mem
= request_mem_region(res
->start
,
343 res
->end
- res
->start
+ 1,
348 pr_debug("%s: RTC registers at %08x are not free\n",
349 pdev
->name
, OMAP_RTC_BASE
);
353 rtc
= rtc_device_register(pdev
->name
, &pdev
->dev
,
354 &omap_rtc_ops
, THIS_MODULE
);
356 pr_debug("%s: can't register RTC device, err %ld\n",
357 pdev
->name
, PTR_ERR(rtc
));
360 platform_set_drvdata(pdev
, rtc
);
361 dev_set_drvdata(&rtc
->dev
, mem
);
363 /* clear pending irqs, and set 1/second periodic,
364 * which we'll use instead of update irqs
366 rtc_write(0, OMAP_RTC_INTERRUPTS_REG
);
368 /* clear old status */
369 reg
= rtc_read(OMAP_RTC_STATUS_REG
);
370 if (reg
& (u8
) OMAP_RTC_STATUS_POWER_UP
) {
371 pr_info("%s: RTC power up reset detected\n",
373 rtc_write(OMAP_RTC_STATUS_POWER_UP
, OMAP_RTC_STATUS_REG
);
375 if (reg
& (u8
) OMAP_RTC_STATUS_ALARM
)
376 rtc_write(OMAP_RTC_STATUS_ALARM
, OMAP_RTC_STATUS_REG
);
378 /* handle periodic and alarm irqs */
379 if (request_irq(omap_rtc_timer
, rtc_irq
, IRQF_DISABLED
,
380 dev_name(&rtc
->dev
), rtc
)) {
381 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
382 pdev
->name
, omap_rtc_timer
);
385 if (request_irq(omap_rtc_alarm
, rtc_irq
, IRQF_DISABLED
,
386 dev_name(&rtc
->dev
), rtc
)) {
387 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
388 pdev
->name
, omap_rtc_alarm
);
392 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
393 reg
= rtc_read(OMAP_RTC_CTRL_REG
);
394 if (reg
& (u8
) OMAP_RTC_CTRL_STOP
)
395 pr_info("%s: already running\n", pdev
->name
);
397 /* force to 24 hour mode */
398 new_ctrl
= reg
& ~(OMAP_RTC_CTRL_SPLIT
|OMAP_RTC_CTRL_AUTO_COMP
);
399 new_ctrl
|= OMAP_RTC_CTRL_STOP
;
401 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
403 * - Boards wired so that RTC_WAKE_INT does something, and muxed
404 * right (W13_1610_RTC_WAKE_INT is the default after chip reset),
405 * should initialize the device wakeup flag appropriately.
407 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
408 * rather than nPWRON_RESET, should forcibly enable split
409 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
410 * is write-only, and always reads as zero...)
412 device_init_wakeup(&pdev
->dev
, 0);
414 if (new_ctrl
& (u8
) OMAP_RTC_CTRL_SPLIT
)
415 pr_info("%s: split power mode\n", pdev
->name
);
418 rtc_write(new_ctrl
, OMAP_RTC_CTRL_REG
);
423 free_irq(omap_rtc_timer
, NULL
);
425 rtc_device_unregister(rtc
);
427 release_resource(mem
);
431 static int __exit
omap_rtc_remove(struct platform_device
*pdev
)
433 struct rtc_device
*rtc
= platform_get_drvdata(pdev
);
435 device_init_wakeup(&pdev
->dev
, 0);
437 /* leave rtc running, but disable irqs */
438 rtc_write(0, OMAP_RTC_INTERRUPTS_REG
);
440 free_irq(omap_rtc_timer
, rtc
);
441 free_irq(omap_rtc_alarm
, rtc
);
443 release_resource(dev_get_drvdata(&rtc
->dev
));
444 rtc_device_unregister(rtc
);
452 static int omap_rtc_suspend(struct platform_device
*pdev
, pm_message_t state
)
454 irqstat
= rtc_read(OMAP_RTC_INTERRUPTS_REG
);
456 /* FIXME the RTC alarm is not currently acting as a wakeup event
457 * source, and in fact this enable() call is just saving a flag
458 * that's never used...
460 if (device_may_wakeup(&pdev
->dev
))
461 enable_irq_wake(omap_rtc_alarm
);
463 rtc_write(0, OMAP_RTC_INTERRUPTS_REG
);
468 static int omap_rtc_resume(struct platform_device
*pdev
)
470 if (device_may_wakeup(&pdev
->dev
))
471 disable_irq_wake(omap_rtc_alarm
);
473 rtc_write(irqstat
, OMAP_RTC_INTERRUPTS_REG
);
478 #define omap_rtc_suspend NULL
479 #define omap_rtc_resume NULL
482 static void omap_rtc_shutdown(struct platform_device
*pdev
)
484 rtc_write(0, OMAP_RTC_INTERRUPTS_REG
);
487 MODULE_ALIAS("platform:omap_rtc");
488 static struct platform_driver omap_rtc_driver
= {
489 .remove
= __exit_p(omap_rtc_remove
),
490 .suspend
= omap_rtc_suspend
,
491 .resume
= omap_rtc_resume
,
492 .shutdown
= omap_rtc_shutdown
,
495 .owner
= THIS_MODULE
,
499 static int __init
rtc_init(void)
501 return platform_driver_probe(&omap_rtc_driver
, omap_rtc_probe
);
503 module_init(rtc_init
);
505 static void __exit
rtc_exit(void)
507 platform_driver_unregister(&omap_rtc_driver
);
509 module_exit(rtc_exit
);
511 MODULE_AUTHOR("George G. Davis (and others)");
512 MODULE_LICENSE("GPL");