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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / arch / arm / mach-s3c2410 / mach-bast.c
blobf7526690751e01a0443c60b90a69abc2bea0bd15
1 /* linux/arch/arm/mach-s3c2410/mach-bast.c
2 *
3 * Copyright (c) 2003,2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.simtec.co.uk/products/EB2410ITX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 14-Sep-2004 BJD USB power control
14 * 20-Aug-2004 BJD Added s3c2410_board struct
15 * 18-Aug-2004 BJD Added platform devices from default set
16 * 16-May-2003 BJD Created initial version
17 * 16-Aug-2003 BJD Fixed header files and copyright, added URL
18 * 05-Sep-2003 BJD Moved to v2.6 kernel
19 * 06-Jan-2003 BJD Updates for <arch/map.h>
20 * 18-Jan-2003 BJD Added serial port configuration
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/timer.h>
28 #include <linux/init.h>
29 #include <linux/device.h>
30
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33 #include <asm/mach/irq.h>
34
35 #include <asm/arch/bast-map.h>
36
37 #include <asm/hardware.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
40 #include <asm/mach-types.h>
41
42 //#include <asm/debug-ll.h>
43 #include <asm/arch/regs-serial.h>
44
45 #include "s3c2410.h"
46 #include "devs.h"
47 #include "cpu.h"
48 #include "usb-simtec.h"
49
50 /* macros for virtual address mods for the io space entries */
51 #define VA_C5(item) ((item) + BAST_VAM_CS5)
52 #define VA_C4(item) ((item) + BAST_VAM_CS4)
53 #define VA_C3(item) ((item) + BAST_VAM_CS3)
54 #define VA_C2(item) ((item) + BAST_VAM_CS2)
55
56 /* macros to modify the physical addresses for io space */
57
58 #define PA_CS2(item) ((item) + S3C2410_CS2)
59 #define PA_CS3(item) ((item) + S3C2410_CS3)
60 #define PA_CS4(item) ((item) + S3C2410_CS4)
61 #define PA_CS5(item) ((item) + S3C2410_CS5)
62
63 static struct map_desc bast_iodesc[] __initdata = {
64 /* ISA IO areas */
65
66 { S3C2410_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
67 { S3C2410_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
68
69 /* we could possibly compress the next set down into a set of smaller tables
70 * pagetables, but that would mean using an L2 section, and it still means
71 * we cannot actually feed the same register to an LDR due to 16K spacing
72 */
73
74 /* bast CPLD control registers, and external interrupt controls */
75 { BAST_VA_CTRL1, BAST_PA_CTRL1, SZ_1M, MT_DEVICE },
76 { BAST_VA_CTRL2, BAST_PA_CTRL2, SZ_1M, MT_DEVICE },
77 { BAST_VA_CTRL3, BAST_PA_CTRL3, SZ_1M, MT_DEVICE },
78 { BAST_VA_CTRL4, BAST_PA_CTRL4, SZ_1M, MT_DEVICE },
79
80 /* PC104 IRQ mux */
81 { BAST_VA_PC104_IRQREQ, BAST_PA_PC104_IRQREQ, SZ_1M, MT_DEVICE },
82 { BAST_VA_PC104_IRQRAW, BAST_PA_PC104_IRQRAW, SZ_1M, MT_DEVICE },
83 { BAST_VA_PC104_IRQMASK, BAST_PA_PC104_IRQMASK, SZ_1M, MT_DEVICE },
84
85 /* onboard 8bit lcd port */
86
87 { BAST_VA_LCD_RCMD1, BAST_PA_LCD_RCMD1, SZ_1M, MT_DEVICE },
88 { BAST_VA_LCD_WCMD1, BAST_PA_LCD_WCMD1, SZ_1M, MT_DEVICE },
89 { BAST_VA_LCD_RDATA1, BAST_PA_LCD_RDATA1, SZ_1M, MT_DEVICE },
90 { BAST_VA_LCD_WDATA1, BAST_PA_LCD_WDATA1, SZ_1M, MT_DEVICE },
91 { BAST_VA_LCD_RCMD2, BAST_PA_LCD_RCMD2, SZ_1M, MT_DEVICE },
92 { BAST_VA_LCD_WCMD2, BAST_PA_LCD_WCMD2, SZ_1M, MT_DEVICE },
93 { BAST_VA_LCD_RDATA2, BAST_PA_LCD_RDATA2, SZ_1M, MT_DEVICE },
94 { BAST_VA_LCD_WDATA2, BAST_PA_LCD_WDATA2, SZ_1M, MT_DEVICE },
95
96 /* peripheral space... one for each of fast/slow/byte/16bit */
97 /* note, ide is only decoded in word space, even though some registers
98 * are only 8bit */
99
100 /* slow, byte */
101 { VA_C2(BAST_VA_ISAIO), PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
102 { VA_C2(BAST_VA_ISAMEM), PA_CS2(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
103 { VA_C2(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
104 { VA_C2(BAST_VA_SUPERIO), PA_CS2(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
105 { VA_C2(BAST_VA_DM9000), PA_CS2(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
106 { VA_C2(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
107 { VA_C2(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
108 { VA_C2(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
109 { VA_C2(BAST_VA_IDESECAUX), PA_CS3(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE },
110
111 /* slow, word */
112 { VA_C3(BAST_VA_ISAIO), PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
113 { VA_C3(BAST_VA_ISAMEM), PA_CS3(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
114 { VA_C3(BAST_VA_ASIXNET), PA_CS3(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
115 { VA_C3(BAST_VA_SUPERIO), PA_CS3(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
116 { VA_C3(BAST_VA_DM9000), PA_CS3(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
117 { VA_C3(BAST_VA_IDEPRI), PA_CS3(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
118 { VA_C3(BAST_VA_IDESEC), PA_CS3(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
119 { VA_C3(BAST_VA_IDEPRIAUX), PA_CS3(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
120 { VA_C3(BAST_VA_IDESECAUX), PA_CS3(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE },
121
122 /* fast, byte */
123 { VA_C4(BAST_VA_ISAIO), PA_CS4(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
124 { VA_C4(BAST_VA_ISAMEM), PA_CS4(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
125 { VA_C4(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
126 { VA_C4(BAST_VA_SUPERIO), PA_CS4(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
127 { VA_C4(BAST_VA_DM9000), PA_CS4(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
128 { VA_C4(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
129 { VA_C4(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
130 { VA_C4(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
131 { VA_C4(BAST_VA_IDESECAUX), PA_CS5(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE },
132
133 /* fast, word */
134 { VA_C5(BAST_VA_ISAIO), PA_CS5(BAST_PA_ISAIO), SZ_16M, MT_DEVICE },
135 { VA_C5(BAST_VA_ISAMEM), PA_CS5(BAST_PA_ISAMEM), SZ_16M, MT_DEVICE },
136 { VA_C5(BAST_VA_ASIXNET), PA_CS5(BAST_PA_ASIXNET), SZ_1M, MT_DEVICE },
137 { VA_C5(BAST_VA_SUPERIO), PA_CS5(BAST_PA_SUPERIO), SZ_1M, MT_DEVICE },
138 { VA_C5(BAST_VA_DM9000), PA_CS5(BAST_PA_DM9000), SZ_1M, MT_DEVICE },
139 { VA_C5(BAST_VA_IDEPRI), PA_CS5(BAST_PA_IDEPRI), SZ_1M, MT_DEVICE },
140 { VA_C5(BAST_VA_IDESEC), PA_CS5(BAST_PA_IDESEC), SZ_1M, MT_DEVICE },
141 { VA_C5(BAST_VA_IDEPRIAUX), PA_CS5(BAST_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
142 { VA_C5(BAST_VA_IDESECAUX), PA_CS5(BAST_PA_IDESECAUX), SZ_1M, MT_DEVICE },
143 };
144
145 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
146 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
147 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
148
149 /* base baud rate for all our UARTs */
150 static unsigned long bast_serial_clock = 24*1000*1000;
151
152 static struct s3c2410_uartcfg bast_uartcfgs[] = {
153 [0] = {
154 .hwport = 0,
155 .flags = 0,
156 .clock = &bast_serial_clock,
157 .ucon = UCON,
158 .ulcon = ULCON,
159 .ufcon = UFCON,
160 },
161 [1] = {
162 .hwport = 1,
163 .flags = 0,
164
165 .clock = &bast_serial_clock,
166 .ucon = UCON,
167 .ulcon = ULCON,
168 .ufcon = UFCON,
169 },
170 /* port 2 is not actually used */
171 [2] = {
172 .hwport = 2,
173 .flags = 0,
174 .clock = &bast_serial_clock,
175 .ucon = UCON,
176 .ulcon = ULCON,
177 .ufcon = UFCON,
178 }
179 };
180
181 /* NOR Flash on BAST board */
182
183 static struct resource bast_nor_resource[] = {
184 [0] = {
185 .start = S3C2410_CS1 + 0x4000000,
186 .end = S3C2410_CS1 + 0x4000000 + (32*1024*1024) - 1,
187 .flags = IORESOURCE_MEM,
188 }
189 };
190
191 static struct platform_device bast_device_nor = {
192 .name = "bast-nor",
193 .id = -1,
194 .num_resources = ARRAY_SIZE(bast_nor_resource),
195 .resource = bast_nor_resource,
196 };
197
198 /* Standard BAST devices */
199
200 static struct platform_device *bast_devices[] __initdata = {
201 &s3c_device_usb,
202 &s3c_device_lcd,
203 &s3c_device_wdt,
204 &s3c_device_i2c,
205 &s3c_device_iis,
206 &s3c_device_rtc,
207 &bast_device_nor
208 };
209
210 static struct s3c2410_board bast_board __initdata = {
211 .devices = bast_devices,
212 .devices_count = ARRAY_SIZE(bast_devices)
213 };
214
215 void __init bast_map_io(void)
216 {
217 s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
218 s3c2410_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
219 s3c2410_set_board(&bast_board);
220 usb_simtec_init();
221 }
222
223 void __init bast_init_irq(void)
224 {
225 s3c2410_init_irq();
226 }
227
228 void __init bast_init_time(void)
229 {
230 s3c2410_init_time();
231 }
232
233 MACHINE_START(BAST, "Simtec-BAST")
234 MAINTAINER("Ben Dooks <ben@simtec.co.uk>")
235 BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
236 BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
237 MAPIO(bast_map_io)
238 INITIRQ(bast_init_irq)
239 INITTIME(bast_init_time)
240 MACHINE_END
MOXA 2.6.9 from sdlinux-moxaart.tgz