arch/arm/mach-s3c2410/mach-vr1000.c

   1 /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
   2  *
   3  * Copyright (c) 2003,2004 Simtec Electronics
   4  *   Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Machine support for Thorcom VR1000 board. Designed for Thorcom by
   7  * Simtec Electronics, http://www.simtec.co.uk/
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * Modifications:
  14  *     14-Sep-2004 BJD  USB Power control
  15  *     04-Sep-2004 BJD  Added new uart init, and io init
  16  *     21-Aug-2004 BJD  Added struct s3c2410_board
  17  *     06-Aug-2004 BJD  Fixed call to time initialisation
  18  *     05-Apr-2004 BJD  Copied to make mach-vr1000.c
  19 */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/types.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/list.h>
  25 #include <linux/timer.h>
  26 #include <linux/init.h>
  27
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30 #include <asm/mach/irq.h>
  31
  32 #include <asm/arch/bast-map.h>
  33 #include <asm/arch/vr1000-map.h>
  34
  35 #include <asm/hardware.h>
  36 #include <asm/io.h>
  37 #include <asm/irq.h>
  38 #include <asm/mach-types.h>
  39
  40 //#include <asm/debug-ll.h>
  41 #include <asm/arch/regs-serial.h>
  42
  43 #include "s3c2410.h"
  44 #include "devs.h"
  45 #include "cpu.h"
  46 #include "usb-simtec.h"
  47
  48 /* macros for virtual address mods for the io space entries */
  49 #define VA_C5(item) ((item) + BAST_VAM_CS5)
  50 #define VA_C4(item) ((item) + BAST_VAM_CS4)
  51 #define VA_C3(item) ((item) + BAST_VAM_CS3)
  52 #define VA_C2(item) ((item) + BAST_VAM_CS2)
  53
  54 /* macros to modify the physical addresses for io space */
  55
  56 #define PA_CS2(item) ((item) + S3C2410_CS2)
  57 #define PA_CS3(item) ((item) + S3C2410_CS3)
  58 #define PA_CS4(item) ((item) + S3C2410_CS4)
  59 #define PA_CS5(item) ((item) + S3C2410_CS5)
  60
  61 static struct map_desc vr1000_iodesc[] __initdata = {
  62   /* ISA IO areas */
  63
  64   { S3C2410_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO),    SZ_16M, MT_DEVICE },
  65   { S3C2410_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO),    SZ_16M, MT_DEVICE },
  66
  67   /* we could possibly compress the next set down into a set of smaller tables
  68    * pagetables, but that would mean using an L2 section, and it still means
  69    * we cannot actually feed the same register to an LDR due to 16K spacing
  70    */
  71
  72   /* bast CPLD control registers, and external interrupt controls */
  73   { VR1000_VA_CTRL1, VR1000_PA_CTRL1,                  SZ_1M, MT_DEVICE },
  74   { VR1000_VA_CTRL2, VR1000_PA_CTRL2,                  SZ_1M, MT_DEVICE },
  75   { VR1000_VA_CTRL3, VR1000_PA_CTRL3,                  SZ_1M, MT_DEVICE },
  76   { VR1000_VA_CTRL4, VR1000_PA_CTRL4,                  SZ_1M, MT_DEVICE },
  77
  78   /* peripheral space... one for each of fast/slow/byte/16bit */
  79   /* note, ide is only decoded in word space, even though some registers
  80    * are only 8bit */
  81
  82   /* slow, byte */
  83   { VA_C2(VR1000_VA_DM9000),  PA_CS2(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
  84   { VA_C2(VR1000_VA_IDEPRI),  PA_CS3(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
  85   { VA_C2(VR1000_VA_IDESEC),  PA_CS3(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
  86   { VA_C2(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
  87   { VA_C2(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
  88
  89   /* slow, word */
  90   { VA_C3(VR1000_VA_DM9000),  PA_CS3(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
  91   { VA_C3(VR1000_VA_IDEPRI),  PA_CS3(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
  92   { VA_C3(VR1000_VA_IDESEC),  PA_CS3(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
  93   { VA_C3(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
  94   { VA_C3(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
  95
  96   /* fast, byte */
  97   { VA_C4(VR1000_VA_DM9000),  PA_CS4(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
  98   { VA_C4(VR1000_VA_IDEPRI),  PA_CS5(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
  99   { VA_C4(VR1000_VA_IDESEC),  PA_CS5(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
 100   { VA_C4(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
 101   { VA_C4(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
 102
 103   /* fast, word */
 104   { VA_C5(VR1000_VA_DM9000),  PA_CS5(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
 105   { VA_C5(VR1000_VA_IDEPRI),  PA_CS5(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
 106   { VA_C5(VR1000_VA_IDESEC),  PA_CS5(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
 107   { VA_C5(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
 108   { VA_C5(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
 109 };
 110
 111 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 112 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 113 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 114
 115 /* base baud rate for all our UARTs */
 116 static unsigned long vr1000_serial_clock = 3692307;
 117
 118 static struct s3c2410_uartcfg vr1000_uartcfgs[] = {
 119         [0] = {
 120                 .hwport      = 0,
 121                 .flags       = 0,
 122                 .clock       = &vr1000_serial_clock,
 123                 .ucon        = UCON,
 124                 .ulcon       = ULCON,
 125                 .ufcon       = UFCON,
 126         },
 127         [1] = {
 128                 .hwport      = 1,
 129                 .flags       = 0,
 130                 .clock       = &vr1000_serial_clock,
 131                 .ucon        = UCON,
 132                 .ulcon       = ULCON,
 133                 .ufcon       = UFCON,
 134         },
 135         /* port 2 is not actually used */
 136         [2] = {
 137                 .hwport      = 2,
 138                 .flags       = 0,
 139                 .clock       = &vr1000_serial_clock,
 140                 .ucon        = UCON,
 141                 .ulcon       = ULCON,
 142                 .ufcon       = UFCON,
 143         }
 144 };
 145
 146 static struct platform_device *vr1000_devices[] __initdata = {
 147         &s3c_device_usb,
 148         &s3c_device_lcd,
 149         &s3c_device_wdt,
 150         &s3c_device_i2c,
 151         &s3c_device_iis,
 152 };
 153
 154 static struct s3c2410_board vr1000_board __initdata = {
 155         .devices       = vr1000_devices,
 156         .devices_count = ARRAY_SIZE(vr1000_devices)
 157 };
 158
 159
 160 void __init vr1000_map_io(void)
 161 {
 162         s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
 163         s3c2410_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
 164         s3c2410_set_board(&vr1000_board);
 165         usb_simtec_init();
 166 }
 167
 168 void __init vr1000_init_irq(void)
 169 {
 170         s3c2410_init_irq();
 171 }
 172
 173 void __init vr1000_init_time(void)
 174 {
 175         s3c2410_init_time();
 176 }
 177
 178 MACHINE_START(VR1000, "Thorcom-VR1000")
 179      MAINTAINER("Ben Dooks <ben@simtec.co.uk>")
 180      BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, S3C2410_VA_UART)
 181      BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
 182      MAPIO(vr1000_map_io)
 183      INITIRQ(vr1000_init_irq)
 184      INITTIME(vr1000_init_time)
 185 MACHINE_END