arch/arm/mach-sa1100/pm.c

   1 /*
   2  * SA1100 Power Management Routines
   3  *
   4  * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License.
   8  *
   9  * History:
  10  *
  11  * 2001-02-06:  Cliff Brake         Initial code
  12  *
  13  * 2001-02-25:  Sukjae Cho <sjcho@east.isi.edu> &
  14  *              Chester Kuo <chester@linux.org.tw>
  15  *                      Save more value for the resume function! Support
  16  *                      Bitsy/Assabet/Freebird board
  17  *
  18  * 2001-08-29:  Nicolas Pitre <nico@cam.org>
  19  *                      Cleaned up, pushed platform dependent stuff
  20  *                      in the platform specific files.
  21  *
  22  * 2002-05-27:  Nicolas Pitre   Killed sleep.h and the kmalloced save array.
  23  *                              Storage is local on the stack now.
  24  */
  25 #include <linux/init.h>
  26 #include <linux/suspend.h>
  27 #include <linux/errno.h>
  28 #include <linux/time.h>
  29
  30 #include <asm/hardware.h>
  31 #include <asm/memory.h>
  32 #include <asm/system.h>
  33 #include <asm/mach/time.h>
  34
  35 extern void sa1100_cpu_suspend(void);
  36 extern void sa1100_cpu_resume(void);
  37
  38 #define SAVE(x)         sleep_save[SLEEP_SAVE_##x] = x
  39 #define RESTORE(x)      x = sleep_save[SLEEP_SAVE_##x]
  40
  41 /*
  42  * List of global SA11x0 peripheral registers to preserve.
  43  * More ones like CP and general purpose register values are preserved
  44  * on the stack and then the stack pointer is stored last in sleep.S.
  45  */
  46 enum {  SLEEP_SAVE_SP = 0,
  47
  48         SLEEP_SAVE_OIER,
  49         SLEEP_SAVE_OSMR0, SLEEP_SAVE_OSMR1, SLEEP_SAVE_OSMR2, SLEEP_SAVE_OSMR3,
  50
  51         SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
  52         SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
  53
  54         SLEEP_SAVE_Ser1SDCR0,
  55
  56         SLEEP_SAVE_SIZE
  57 };
  58
  59
  60 static int sa11x0_pm_enter(u32 state)
  61 {
  62         unsigned long gpio, sleep_save[SLEEP_SAVE_SIZE];
  63         struct timespec delta, rtc;
  64
  65         if (state != PM_SUSPEND_MEM)
  66                 return -EINVAL;
  67
  68         /* preserve current time */
  69         rtc.tv_sec = RCNR;
  70         rtc.tv_nsec = 0;
  71         save_time_delta(&delta, &rtc);
  72         gpio = GPLR;
  73
  74         /* save vital registers */
  75         SAVE(OSMR0);
  76         SAVE(OSMR1);
  77         SAVE(OSMR2);
  78         SAVE(OSMR3);
  79         SAVE(OIER);
  80
  81         SAVE(GPDR);
  82         SAVE(GAFR);
  83
  84         SAVE(PPDR);
  85         SAVE(PPSR);
  86         SAVE(PPAR);
  87         SAVE(PSDR);
  88
  89         SAVE(Ser1SDCR0);
  90
  91         /* Clear previous reset status */
  92         RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR;
  93
  94         /* set resume return address */
  95         PSPR = virt_to_phys(sa1100_cpu_resume);
  96
  97         /* go zzz */
  98         sa1100_cpu_suspend();
  99
 100         /*
 101          * Ensure not to come back here if it wasn't intended
 102          */
 103         PSPR = 0;
 104
 105         /*
 106          * Ensure interrupt sources are disabled; we will re-init
 107          * the interrupt subsystem via the device manager.
 108          */
 109         ICLR = 0;
 110         ICCR = 1;
 111         ICMR = 0;
 112
 113         /* restore registers */
 114         RESTORE(GPDR);
 115         RESTORE(GAFR);
 116
 117         RESTORE(PPDR);
 118         RESTORE(PPSR);
 119         RESTORE(PPAR);
 120         RESTORE(PSDR);
 121
 122         RESTORE(Ser1SDCR0);
 123
 124         GPSR = gpio;
 125         GPCR = ~gpio;
 126
 127         /*
 128          * Clear the peripheral sleep-hold bit.
 129          */
 130         PSSR = PSSR_PH;
 131
 132         RESTORE(OSMR0);
 133         RESTORE(OSMR1);
 134         RESTORE(OSMR2);
 135         RESTORE(OSMR3);
 136         RESTORE(OIER);
 137
 138         /* OSMR0 is the system timer: make sure OSCR is sufficiently behind */
 139         OSCR = OSMR0 - LATCH;
 140
 141         /* restore current time */
 142         rtc.tv_sec = RCNR;
 143         restore_time_delta(&delta, &rtc);
 144
 145         return 0;
 146 }
 147
 148 unsigned long sleep_phys_sp(void *sp)
 149 {
 150         return virt_to_phys(sp);
 151 }
 152
 153 /*
 154  * Called after processes are frozen, but before we shut down devices.
 155  */
 156 static int sa11x0_pm_prepare(u32 state)
 157 {
 158         return 0;
 159 }
 160
 161 /*
 162  * Called after devices are re-setup, but before processes are thawed.
 163  */
 164 static int sa11x0_pm_finish(u32 state)
 165 {
 166         return 0;
 167 }
 168
 169 /*
 170  * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
 171  */
 172 static struct pm_ops sa11x0_pm_ops = {
 173         .pm_disk_mode   = PM_DISK_FIRMWARE,
 174         .prepare        = sa11x0_pm_prepare,
 175         .enter          = sa11x0_pm_enter,
 176         .finish         = sa11x0_pm_finish,
 177 };
 178
 179 static int __init sa11x0_pm_init(void)
 180 {
 181         pm_set_ops(&sa11x0_pm_ops);
 182         return 0;
 183 }
 184
 185 late_initcall(sa11x0_pm_init);