2 * linux/arch/m32r/mm/fault.c
4 * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
6 * Some code taken from i386 version.
7 * Copyright (C) 1995 Linus Torvalds
12 #include <linux/config.h>
13 #include <linux/signal.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/types.h>
19 #include <linux/ptrace.h>
20 #include <linux/mman.h>
22 #include <linux/smp.h>
23 #include <linux/smp_lock.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/tty.h>
27 #include <linux/vt_kern.h> /* For unblank_screen() */
28 #include <linux/highmem.h>
29 #include <linux/module.h>
32 #include <asm/system.h>
33 #include <asm/uaccess.h>
34 #include <asm/hardirq.h>
35 #include <asm/mmu_context.h>
36 #include <asm/tlbflush.h>
38 extern void die(const char *, struct pt_regs
*, long);
41 asmlinkage
unsigned int tlb_entry_i_dat
;
42 asmlinkage
unsigned int tlb_entry_d_dat
;
43 #define tlb_entry_i tlb_entry_i_dat
44 #define tlb_entry_d tlb_entry_d_dat
46 unsigned int tlb_entry_i_dat
[NR_CPUS
];
47 unsigned int tlb_entry_d_dat
[NR_CPUS
];
48 #define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
49 #define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
52 extern void init_tlb(void);
55 * Unlock any spinlocks which will prevent us from getting the
58 void bust_spinlocks(int yes
)
60 int loglevel_save
= console_loglevel
;
71 * OK, the message is on the console. Now we call printk()
72 * without oops_in_progress set so that printk will give klogd
73 * a poke. Hold onto your hats...
75 console_loglevel
= 15; /* NMI oopser may have shut the console up */
77 console_loglevel
= loglevel_save
;
80 /*======================================================================*
82 *======================================================================*
83 * This routine handles page faults. It determines the address,
84 * and the problem, and then passes it off to one of the appropriate
89 * error_code : See below
90 * address : M32R MMU MDEVA reg. (Operand ACE)
91 * : M32R BPC reg. (Instruction ACE)
94 * bit 0 == 0 means no page found, 1 means protection fault
95 * bit 1 == 0 means read, 1 means write
96 * bit 2 == 0 means kernel, 1 means user-mode
97 * bit 3 == 0 means data, 1 means instruction
98 *======================================================================*/
99 asmlinkage
void do_page_fault(struct pt_regs
*regs
, unsigned long error_code
,
100 unsigned long address
)
102 struct task_struct
*tsk
;
103 struct mm_struct
*mm
;
104 struct vm_area_struct
* vma
;
105 unsigned long page
, addr
;
110 * If BPSW IE bit enable --> set PSW IE bit
112 if (regs
->psw
& M32R_PSW_BIE
)
117 info
.si_code
= SEGV_MAPERR
;
120 * We fault-in kernel-space virtual memory on-demand. The
121 * 'reference' page table is init_mm.pgd.
123 * NOTE! We MUST NOT take any locks for this case. We may
124 * be in an interrupt or a critical region, and should
125 * only copy the information from the master page table,
128 * This verifies that the fault happens in kernel space
129 * (error_code & 4) == 0, and that the fault was not a
130 * protection error (error_code & 1) == 0.
132 if (address
>= TASK_SIZE
&& !(error_code
& 4))
138 * If we're in an interrupt or have no user context or are running in an
139 * atomic region then we must not take the fault..
141 if (in_atomic() || !mm
)
142 goto bad_area_nosemaphore
;
144 /* When running in the kernel we expect faults to occur only to
145 * addresses in user space. All other faults represent errors in the
146 * kernel and should generate an OOPS. Unfortunatly, in the case of an
147 * erroneous fault occuring in a code path which already holds mmap_sem
148 * we will deadlock attempting to validate the fault against the
149 * address space. Luckily the kernel only validly references user
150 * space from well defined areas of code, which are listed in the
153 * As the vast majority of faults will be valid we will only perform
154 * the source reference check when there is a possibilty of a deadlock.
155 * Attempt to lock the address space, if we cannot we then validate the
156 * source. If this is invalid we can skip the address space check,
157 * thus avoiding the deadlock.
159 if (!down_read_trylock(&mm
->mmap_sem
)) {
160 if ((error_code
& 4) == 0 &&
161 !search_exception_tables(regs
->psw
))
162 goto bad_area_nosemaphore
;
163 down_read(&mm
->mmap_sem
);
166 vma
= find_vma(mm
, address
);
169 if (vma
->vm_start
<= address
)
171 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
174 if (error_code
& 4) {
176 * accessing the stack below "spu" is always a bug.
177 * The "+ 4" is there due to the push instruction
178 * doing pre-decrement on the stack and that
179 * doesn't show up until later..
181 if (address
+ 4 < regs
->spu
)
185 if (expand_stack(vma
, address
))
188 * Ok, we have a good vm_area for this memory access, so
192 info
.si_code
= SEGV_ACCERR
;
194 switch (error_code
& 3) {
195 default: /* 3: write, present */
197 case 2: /* write, not present */
198 if (!(vma
->vm_flags
& VM_WRITE
))
202 case 1: /* read, present */
203 case 0: /* read, not present */
204 if (!(vma
->vm_flags
& (VM_READ
| VM_EXEC
)))
210 * If for any reason at all we couldn't handle the fault,
211 * make sure we exit gracefully rather than endlessly redo
214 addr
= (address
& PAGE_MASK
) | (error_code
& 8);
215 switch (handle_mm_fault(mm
, vma
, addr
, write
)) {
222 case VM_FAULT_SIGBUS
:
230 up_read(&mm
->mmap_sem
);
234 * Something tried to access memory that isn't in our memory map..
235 * Fix it, but check if it's kernel or user first..
238 up_read(&mm
->mmap_sem
);
240 bad_area_nosemaphore
:
241 /* User mode accesses just cause a SIGSEGV */
242 if (error_code
& 4) {
243 tsk
->thread
.address
= address
;
244 tsk
->thread
.error_code
= error_code
| (address
>= TASK_SIZE
);
245 tsk
->thread
.trap_no
= 14;
246 info
.si_signo
= SIGSEGV
;
248 /* info.si_code has been set above */
249 info
.si_addr
= (void __user
*)address
;
250 force_sig_info(SIGSEGV
, &info
, tsk
);
255 /* Are we prepared to handle this kernel fault? */
256 if (fixup_exception(regs
))
260 * Oops. The kernel tried to access some bad page. We'll have to
261 * terminate things with extreme prejudice.
266 if (address
< PAGE_SIZE
)
267 printk(KERN_ALERT
"Unable to handle kernel NULL pointer dereference");
269 printk(KERN_ALERT
"Unable to handle kernel paging request");
270 printk(" at virtual address %08lx\n",address
);
271 printk(KERN_ALERT
" printing bpc:\n");
272 printk("%08lx\n", regs
->bpc
);
273 page
= *(unsigned long *)MPTB
;
274 page
= ((unsigned long *) page
)[address
>> PGDIR_SHIFT
];
275 printk(KERN_ALERT
"*pde = %08lx\n", page
);
276 if (page
& _PAGE_PRESENT
) {
278 address
&= 0x003ff000;
279 page
= ((unsigned long *) __va(page
))[address
>> PAGE_SHIFT
];
280 printk(KERN_ALERT
"*pte = %08lx\n", page
);
282 die("Oops", regs
, error_code
);
287 * We ran out of memory, or some other thing happened to us that made
288 * us unable to handle the page fault gracefully.
291 up_read(&mm
->mmap_sem
);
294 down_read(&mm
->mmap_sem
);
297 printk("VM: killing process %s\n", tsk
->comm
);
303 up_read(&mm
->mmap_sem
);
305 /* Kernel mode? Handle exception or die */
306 if (!(error_code
& 4))
309 tsk
->thread
.address
= address
;
310 tsk
->thread
.error_code
= error_code
;
311 tsk
->thread
.trap_no
= 14;
312 info
.si_signo
= SIGBUS
;
314 info
.si_code
= BUS_ADRERR
;
315 info
.si_addr
= (void __user
*)address
;
316 force_sig_info(SIGBUS
, &info
, tsk
);
322 * Synchronize this task's top level page-table
323 * with the 'reference' page table.
325 * Do _not_ use "tsk" here. We might be inside
326 * an interrupt in the middle of a task switch..
328 int offset
= pgd_index(address
);
333 pgd
= (pgd_t
*)*(unsigned long *)MPTB
;
334 pgd
= offset
+ (pgd_t
*)pgd
;
335 pgd_k
= init_mm
.pgd
+ offset
;
337 if (!pgd_present(*pgd_k
))
341 * set_pgd(pgd, *pgd_k); here would be useless on PAE
342 * and redundant with the set_pmd() on non-PAE.
345 pmd
= pmd_offset(pgd
, address
);
346 pmd_k
= pmd_offset(pgd_k
, address
);
347 if (!pmd_present(*pmd_k
))
349 set_pmd(pmd
, *pmd_k
);
351 pte_k
= pte_offset_kernel(pmd_k
, address
);
352 if (!pte_present(*pte_k
))
355 addr
= (address
& PAGE_MASK
) | (error_code
& 8);
356 update_mmu_cache(NULL
, addr
, *pte_k
);
361 /*======================================================================*
363 *======================================================================*/
364 #define TLB_MASK (NR_TLB_ENTRIES - 1)
365 #define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
366 #define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
367 void update_mmu_cache(struct vm_area_struct
*vma
, unsigned long vaddr
,
370 unsigned long *entry1
, *entry2
;
371 unsigned long pte_data
, flags
;
372 unsigned int *entry_dat
;
373 int inst
= vaddr
& 8;
376 /* Ptrace may call this routine. */
377 if (vma
&& current
->active_mm
!= vma
->vm_mm
)
380 local_irq_save(flags
);
382 vaddr
= (vaddr
& PAGE_MASK
) | get_asid();
384 #ifdef CONFIG_CHIP_OPSP
385 entry1
= (unsigned long *)ITLB_BASE
;
386 for(i
= 0 ; i
< NR_TLB_ENTRIES
; i
++) {
387 if(*entry1
++ == vaddr
) {
388 pte_data
= pte_val(pte
);
389 set_tlb_data(entry1
, pte_data
);
394 entry2
= (unsigned long *)DTLB_BASE
;
395 for(i
= 0 ; i
< NR_TLB_ENTRIES
; i
++) {
396 if(*entry2
++ == vaddr
) {
397 pte_data
= pte_val(pte
);
398 set_tlb_data(entry2
, pte_data
);
403 local_irq_restore(flags
);
406 pte_data
= pte_val(pte
);
410 * entry1: ITLB entry address
411 * entry2: DTLB entry address
413 __asm__
__volatile__ (
414 "seth %0, #high(%4) \n\t"
415 "st %2, @(%5, %0) \n\t"
417 "st %1, @(%6, %0) \n\t"
418 "add3 r4, %0, %7 \n\t"
421 "ld %1, @(%6, %0) \n\t"
427 : "=&r" (entry1
), "=&r" (entry2
)
428 : "r" (vaddr
), "r" (pte_data
), "i" (MMU_REG_BASE
),
429 "i" (MSVA_offset
), "i" (MTOP_offset
), "i" (MIDXI_offset
)
433 if ((!inst
&& entry2
>= DTLB_END
) || (inst
&& entry1
>= ITLB_END
))
437 local_irq_restore(flags
);
441 /* Valid entry not found */
444 * Update ITLB or DTLB entry
445 * entry1: TLB entry address
446 * entry2: TLB base address
449 entry2
= (unsigned long *)DTLB_BASE
;
450 entry_dat
= &tlb_entry_d
;
452 entry2
= (unsigned long *)ITLB_BASE
;
453 entry_dat
= &tlb_entry_i
;
455 entry1
= entry2
+ (((*entry_dat
- 1) & TLB_MASK
) << 1);
457 for (i
= 0 ; i
< NR_TLB_ENTRIES
; i
++) {
458 if (!(entry1
[1] & 2)) /* Valid bit check */
461 if (entry1
!= entry2
)
464 entry1
+= TLB_MASK
<< 1;
467 if (i
>= NR_TLB_ENTRIES
) { /* Empty entry not found */
468 entry1
= entry2
+ (*entry_dat
<< 1);
469 *entry_dat
= (*entry_dat
+ 1) & TLB_MASK
;
471 *entry1
++ = vaddr
; /* Set TLB tag */
472 set_tlb_data(entry1
, pte_data
);
478 /*======================================================================*
479 * flush_tlb_page() : flushes one page
480 *======================================================================*/
481 void local_flush_tlb_page(struct vm_area_struct
*vma
, unsigned long page
)
483 if (vma
->vm_mm
&& mm_context(vma
->vm_mm
) != NO_CONTEXT
) {
486 local_irq_save(flags
);
488 page
|= (mm_context(vma
->vm_mm
) & MMU_CONTEXT_ASID_MASK
);
489 __flush_tlb_page(page
);
490 local_irq_restore(flags
);
494 /*======================================================================*
495 * flush_tlb_range() : flushes a range of pages
496 *======================================================================*/
497 void local_flush_tlb_range(struct vm_area_struct
*vma
, unsigned long start
,
500 struct mm_struct
*mm
;
503 if (mm_context(mm
) != NO_CONTEXT
) {
507 local_irq_save(flags
);
508 size
= (end
- start
+ (PAGE_SIZE
- 1)) >> PAGE_SHIFT
;
509 if (size
> (NR_TLB_ENTRIES
/ 4)) { /* Too many TLB to flush */
510 mm_context(mm
) = NO_CONTEXT
;
511 if (mm
== current
->mm
)
512 activate_context(mm
);
516 asid
= mm_context(mm
) & MMU_CONTEXT_ASID_MASK
;
518 end
+= (PAGE_SIZE
- 1);
523 while (start
< end
) {
524 __flush_tlb_page(start
);
528 local_irq_restore(flags
);
532 /*======================================================================*
533 * flush_tlb_mm() : flushes the specified mm context TLB's
534 *======================================================================*/
535 void local_flush_tlb_mm(struct mm_struct
*mm
)
537 /* Invalidate all TLB of this process. */
538 /* Instead of invalidating each TLB, we get new MMU context. */
539 if (mm_context(mm
) != NO_CONTEXT
) {
542 local_irq_save(flags
);
543 mm_context(mm
) = NO_CONTEXT
;
544 if (mm
== current
->mm
)
545 activate_context(mm
);
546 local_irq_restore(flags
);
550 /*======================================================================*
551 * flush_tlb_all() : flushes all processes TLBs
552 *======================================================================*/
553 void local_flush_tlb_all(void)
557 local_irq_save(flags
);
559 local_irq_restore(flags
);
562 /*======================================================================*
564 *======================================================================*/
565 void __init
init_mmu(void)
569 mmu_context_cache
= MMU_CONTEXT_FIRST_VERSION
;
570 set_asid(mmu_context_cache
& MMU_CONTEXT_ASID_MASK
);
571 *(volatile unsigned long *)MPTB
= (unsigned long)swapper_pg_dir
;