arch/m68knommu/mm/memory.c

   1 /*
   2  *  linux/arch/m68knommu/mm/memory.c
   3  *
   4  *  Copyright (C) 1998  Kenneth Albanowski <kjahds@kjahds.com>,
   5  *  Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
   6  *
   7  *  Based on:
   8  *
   9  *  linux/arch/m68k/mm/memory.c
  10  *
  11  *  Copyright (C) 1995  Hamish Macdonald
  12  */
  13
  14 #include <linux/config.h>
  15 #include <linux/mm.h>
  16 #include <linux/kernel.h>
  17 #include <linux/string.h>
  18 #include <linux/types.h>
  19 #include <linux/slab.h>
  20
  21 #include <asm/setup.h>
  22 #include <asm/segment.h>
  23 #include <asm/page.h>
  24 #include <asm/pgtable.h>
  25 #include <asm/system.h>
  26 #include <asm/traps.h>
  27 #include <asm/shglcore.h>
  28 #include <asm/io.h>
  29
  30 /*
  31  * cache_clear() semantics: Clear any cache entries for the area in question,
  32  * without writing back dirty entries first. This is useful if the data will
  33  * be overwritten anyway, e.g. by DMA to memory. The range is defined by a
  34  * _physical_ address.
  35  */
  36
  37 void cache_clear (unsigned long paddr, int len)
  38 {
  39 }
  40
  41
  42 /*
  43  *      Define cache invalidate functions. The ColdFire 5407 is really
  44  *      the only processor that needs to do some work here. Anything
  45  *      that has separate data and instruction caches will be a problem.
  46  */
  47 #ifdef CONFIG_M5407
  48
  49 static __inline__ void cache_invalidate_lines(unsigned long paddr, int len)
  50 {
  51         unsigned long   sset, eset;
  52
  53         sset = (paddr & 0x00000ff0);
  54         eset = ((paddr + len) & 0x0000ff0) + 0x10;
  55
  56         __asm__ __volatile__ (
  57                 "nop\n\t"
  58                 "clrl   %%d0\n\t"
  59                 "1:\n\t"
  60                 "movel  %0,%%a0\n\t"
  61                 "addl   %%d0,%%a0\n\t"
  62                 "2:\n\t"
  63                 ".word  0xf4e8\n\t"
  64                 "addl   #0x10,%%a0\n\t"
  65                 "cmpl   %1,%%a0\n\t"
  66                 "blt    2b\n\t"
  67                 "addql  #1,%%d0\n\t"
  68                 "cmpil  #4,%%d0\n\t"
  69                 "bne    1b"
  70                 : : "a" (sset), "a" (eset) : "d0", "a0" );
  71 }
  72
  73 #else
  74 #define cache_invalidate_lines(a,b)
  75 #endif
  76
  77
  78 /*
  79  * cache_push() semantics: Write back any dirty cache data in the given area,
  80  * and invalidate the range in the instruction cache. It needs not (but may)
  81  * invalidate those entries also in the data cache. The range is defined by a
  82  * _physical_ address.
  83  */
  84
  85 void cache_push (unsigned long paddr, int len)
  86 {
  87         cache_invalidate_lines(paddr, len);
  88 }
  89
  90
  91 /*
  92  * cache_push_v() semantics: Write back any dirty cache data in the given
  93  * area, and invalidate those entries at least in the instruction cache. This
  94  * is intended to be used after data has been written that can be executed as
  95  * code later. The range is defined by a _user_mode_ _virtual_ address  (or,
  96  * more exactly, the space is defined by the %sfc/%dfc register.)
  97  */
  98
  99 void cache_push_v (unsigned long vaddr, int len)
 100 {
 101         cache_invalidate_lines(vaddr, len);
 102 }
 103
 104 /* Map some physical address range into the kernel address space. The
 105  * code is copied and adapted from map_chunk().
 106  */
 107
 108 unsigned long kernel_map(unsigned long paddr, unsigned long size,
 109                          int nocacheflag, unsigned long *memavailp )
 110 {
 111         return paddr;
 112 }
 113
 114
 115 int is_in_rom(unsigned long addr)
 116 {
 117         extern unsigned long _ramstart, _ramend;
 118
 119         /*
 120          *      What we are really trying to do is determine if addr is
 121          *      in an allocated kernel memory region. If not then assume
 122          *      we cannot free it or otherwise de-allocate it. Ideally
 123          *      we could restrict this to really being in a ROM or flash,
 124          *      but that would need to be done on a board by board basis,
 125          *      not globally.
 126          */
 127         if ((addr < _ramstart) || (addr >= _ramend))
 128                 return(1);
 129
 130         /* Default case, not in ROM */
 131         return(0);
 132 }
 133