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[linux-2.6.9-moxart.git] / arch / x86_64 / kernel / mce.c
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1 /*
2 * Machine check handler.
3 * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
4 * Rest from unknown author(s).
5 * 2004 Andi Kleen. Rewrote most of it.
6 */
8 #include <linux/init.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/string.h>
13 #include <linux/rcupdate.h>
14 #include <linux/kallsyms.h>
15 #include <linux/sysdev.h>
16 #include <linux/miscdevice.h>
17 #include <linux/fs.h>
18 #include <asm/processor.h>
19 #include <asm/msr.h>
20 #include <asm/mce.h>
21 #include <asm/kdebug.h>
22 #include <asm/uaccess.h>
24 #define MISC_MCELOG_MINOR 227
25 #define NR_BANKS 5
27 static int mce_dont_init;
29 /* 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic,
30 3: never panic or exit (for testing only) */
31 static int tolerant = 1;
32 static int banks;
33 static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL };
36 * Lockless MCE logging infrastructure.
37 * This avoids deadlocks on printk locks without having to break locks. Also
38 * separate MCEs from kernel messages to avoid bogus bug reports.
41 struct mce_log mcelog = {
42 MCE_LOG_SIGNATURE,
43 MCE_LOG_LEN,
44 };
46 static void mce_log(struct mce *mce)
48 unsigned next, entry;
49 mce->finished = 0;
50 smp_wmb();
51 for (;;) {
52 entry = rcu_dereference(mcelog.next);
53 /* When the buffer fills up discard new entries. Assume
54 that the earlier errors are the more interesting. */
55 if (entry >= MCE_LOG_LEN) {
56 set_bit(MCE_OVERFLOW, &mcelog.flags);
57 return;
59 /* Old left over entry. Skip. */
60 if (mcelog.entry[entry].finished)
61 continue;
62 smp_rmb();
63 next = entry + 1;
64 if (cmpxchg(&mcelog.next, entry, next) == entry)
65 break;
67 memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
68 smp_wmb();
69 mcelog.entry[entry].finished = 1;
70 smp_wmb();
73 static void print_mce(struct mce *m)
75 printk(KERN_EMERG "\n"
76 KERN_EMERG
77 "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
78 m->cpu, m->mcgstatus, m->bank, m->status);
79 if (m->rip) {
80 printk(KERN_EMERG
81 "RIP%s %02x:<%016Lx> ",
82 !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
83 m->cs, m->rip);
84 if (m->cs == __KERNEL_CS)
85 print_symbol("{%s}", m->rip);
86 printk("\n");
88 printk(KERN_EMERG "TSC %Lx ", m->tsc);
89 if (m->addr)
90 printk("ADDR %Lx ", m->addr);
91 if (m->misc)
92 printk("MISC %Lx ", m->misc);
93 printk("\n");
96 static void mce_panic(char *msg, struct mce *backup, unsigned long start)
98 int i;
99 oops_begin();
100 for (i = 0; i < MCE_LOG_LEN; i++) {
101 unsigned long tsc = mcelog.entry[i].tsc;
102 if (time_before(tsc, start))
103 continue;
104 print_mce(&mcelog.entry[i]);
105 if (backup && mcelog.entry[i].tsc == backup->tsc)
106 backup = NULL;
108 if (backup)
109 print_mce(backup);
110 if (tolerant >= 3)
111 printk("Fake panic: %s\n", msg);
112 else
113 panic(msg);
116 static int mce_available(struct cpuinfo_x86 *c)
118 return test_bit(X86_FEATURE_MCE, &c->x86_capability) &&
119 test_bit(X86_FEATURE_MCA, &c->x86_capability);
123 * The actual machine check handler
126 void do_machine_check(struct pt_regs * regs, long error_code)
128 struct mce m, panicm;
129 int nowayout = (tolerant < 1);
130 int kill_it = 0;
131 u64 mcestart = 0;
132 int i;
133 int panicm_found = 0;
135 if (regs)
136 notify_die(DIE_NMI, "machine check", regs, error_code, 255, SIGKILL);
137 if (!banks)
138 return;
140 memset(&m, 0, sizeof(struct mce));
141 m.cpu = hard_smp_processor_id();
142 rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
143 if (!(m.mcgstatus & MCG_STATUS_RIPV))
144 kill_it = 1;
146 rdtscll(mcestart);
147 barrier();
149 for (i = 0; i < banks; i++) {
150 if (!bank[i])
151 continue;
153 m.misc = 0;
154 m.addr = 0;
155 m.bank = i;
156 m.tsc = 0;
158 rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
159 if ((m.status & MCI_STATUS_VAL) == 0)
160 continue;
162 if (m.status & MCI_STATUS_EN) {
163 /* In theory _OVER could be a nowayout too, but
164 assume any overflowed errors were no fatal. */
165 nowayout |= !!(m.status & MCI_STATUS_PCC);
166 kill_it |= !!(m.status & MCI_STATUS_UC);
169 if (m.status & MCI_STATUS_MISCV)
170 rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
171 if (m.status & MCI_STATUS_ADDRV)
172 rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
174 if (regs && (m.mcgstatus & MCG_STATUS_RIPV)) {
175 m.rip = regs->rip;
176 m.cs = regs->cs;
177 } else {
178 m.rip = 0;
179 m.cs = 0;
182 if (error_code != -1)
183 rdtscll(m.tsc);
184 wrmsrl(MSR_IA32_MC0_STATUS + i*4, 0);
185 mce_log(&m);
187 /* Did this bank cause the exception? */
188 /* Assume that the bank with uncorrectable errors did it,
189 and that there is only a single one. */
190 if ((m.status & MCI_STATUS_UC) && (m.status & MCI_STATUS_EN)) {
191 panicm = m;
192 panicm_found = 1;
196 /* Never do anything final in the polling timer */
197 if (!regs)
198 goto out;
200 /* If we didn't find an uncorrectable error, pick
201 the last one (shouldn't happen, just being safe). */
202 if (!panicm_found)
203 panicm = m;
204 if (nowayout)
205 mce_panic("Machine check", &panicm, mcestart);
206 if (kill_it) {
207 int user_space = 0;
209 if (m.mcgstatus & MCG_STATUS_RIPV)
210 user_space = panicm.rip && (panicm.cs & 3);
212 /* When the machine was in user space and the CPU didn't get
213 confused it's normally not necessary to panic, unless you
214 are paranoid (tolerant == 0)
216 RED-PEN could be more tolerant for MCEs in idle,
217 but most likely they occur at boot anyways, where
218 it is best to just halt the machine. */
219 if ((!user_space && (panic_on_oops || tolerant < 2)) ||
220 (unsigned)current->pid <= 1)
221 mce_panic("Uncorrected machine check", &panicm, mcestart);
223 /* do_exit takes an awful lot of locks and has as
224 slight risk of deadlocking. If you don't want that
225 don't set tolerant >= 2 */
226 if (tolerant < 3)
227 do_exit(SIGBUS);
230 out:
231 /* Last thing done in the machine check exception to clear state. */
232 wrmsrl(MSR_IA32_MCG_STATUS, 0);
236 * Periodic polling timer for "silent" machine check errors.
239 static int check_interval = 5 * 60; /* 5 minutes */
240 static void mcheck_timer(void *data);
241 static DECLARE_WORK(mcheck_work, mcheck_timer, NULL);
243 static void mcheck_check_cpu(void *info)
245 if (mce_available(&current_cpu_data))
246 do_machine_check(NULL, 0);
249 static void mcheck_timer(void *data)
251 on_each_cpu(mcheck_check_cpu, NULL, 1, 1);
252 schedule_delayed_work(&mcheck_work, check_interval * HZ);
256 static __init int periodic_mcheck_init(void)
258 if (check_interval)
259 schedule_delayed_work(&mcheck_work, check_interval*HZ);
260 return 0;
262 __initcall(periodic_mcheck_init);
266 * Initialize Machine Checks for a CPU.
268 static void mce_init(void *dummy)
270 u64 cap;
271 int i;
273 rdmsrl(MSR_IA32_MCG_CAP, cap);
274 banks = cap & 0xff;
275 if (banks > NR_BANKS) {
276 printk(KERN_INFO "MCE: warning: using only %d banks\n", banks);
277 banks = NR_BANKS;
280 /* Log the machine checks left over from the previous reset.
281 This also clears all registers */
282 do_machine_check(NULL, -1);
284 set_in_cr4(X86_CR4_MCE);
286 if (cap & MCG_CTL_P)
287 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
289 for (i = 0; i < banks; i++) {
290 wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
291 wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
295 /* Add per CPU specific workarounds here */
296 static void __init mce_cpu_quirks(struct cpuinfo_x86 *c)
298 /* This should be disabled by the BIOS, but isn't always */
299 if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 15) {
300 /* disable GART TBL walk error reporting, which trips off
301 incorrectly with the IOMMU & 3ware & Cerberus. */
302 clear_bit(10, &bank[4]);
307 * Called for each booted CPU to set up machine checks.
308 * Must be called with preempt off.
310 void __init mcheck_init(struct cpuinfo_x86 *c)
312 static unsigned long mce_cpus __initdata = 0;
314 mce_cpu_quirks(c);
316 if (mce_dont_init ||
317 test_and_set_bit(smp_processor_id(), &mce_cpus) ||
318 !mce_available(c))
319 return;
321 mce_init(NULL);
325 * Character device to read and clear the MCE log.
328 static void collect_tscs(void *data)
330 unsigned long *cpu_tsc = (unsigned long *)data;
331 rdtscll(cpu_tsc[smp_processor_id()]);
334 static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, loff_t *off)
336 unsigned long cpu_tsc[NR_CPUS];
337 static DECLARE_MUTEX(mce_read_sem);
338 unsigned next;
339 char __user *buf = ubuf;
340 int i, err;
342 down(&mce_read_sem);
343 next = rcu_dereference(mcelog.next);
345 /* Only supports full reads right now */
346 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
347 up(&mce_read_sem);
348 return -EINVAL;
351 err = 0;
352 for (i = 0; i < next; i++) {
353 if (!mcelog.entry[i].finished)
354 continue;
355 smp_rmb();
356 err |= copy_to_user(buf, mcelog.entry + i, sizeof(struct mce));
357 buf += sizeof(struct mce);
360 memset(mcelog.entry, 0, next * sizeof(struct mce));
361 mcelog.next = 0;
362 smp_wmb();
364 synchronize_kernel();
366 /* Collect entries that were still getting written before the synchronize. */
368 on_each_cpu(collect_tscs, cpu_tsc, 1, 1);
369 for (i = next; i < MCE_LOG_LEN; i++) {
370 if (mcelog.entry[i].finished &&
371 mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
372 err |= copy_to_user(buf, mcelog.entry+i, sizeof(struct mce));
373 smp_rmb();
374 buf += sizeof(struct mce);
375 memset(&mcelog.entry[i], 0, sizeof(struct mce));
378 up(&mce_read_sem);
379 return err ? -EFAULT : buf - ubuf;
382 static int mce_ioctl(struct inode *i, struct file *f,unsigned int cmd, unsigned long arg)
384 int __user *p = (int __user *)arg;
385 if (!capable(CAP_SYS_ADMIN))
386 return -EPERM;
387 switch (cmd) {
388 case MCE_GET_RECORD_LEN:
389 return put_user(sizeof(struct mce), p);
390 case MCE_GET_LOG_LEN:
391 return put_user(MCE_LOG_LEN, p);
392 case MCE_GETCLEAR_FLAGS: {
393 unsigned flags;
394 do {
395 flags = mcelog.flags;
396 } while (cmpxchg(&mcelog.flags, flags, 0) != flags);
397 return put_user(flags, p);
399 default:
400 return -ENOTTY;
404 static struct file_operations mce_chrdev_ops = {
405 .read = mce_read,
406 .ioctl = mce_ioctl,
409 static struct miscdevice mce_log_device = {
410 MISC_MCELOG_MINOR,
411 "mcelog",
412 &mce_chrdev_ops,
416 * Old style boot options parsing. Only for compatibility.
419 static int __init mcheck_disable(char *str)
421 mce_dont_init = 1;
422 return 0;
425 /* mce=off disables machine check. Note you can reenable it later
426 using sysfs */
427 static int __init mcheck_enable(char *str)
429 if (!strcmp(str, "off"))
430 mce_dont_init = 1;
431 else
432 printk("mce= argument %s ignored. Please use /sys", str);
433 return 0;
436 __setup("nomce", mcheck_disable);
437 __setup("mce", mcheck_enable);
440 * Sysfs support
443 /* On resume clear all MCE state. Don't want to see leftovers from the BIOS. */
444 static int mce_resume(struct sys_device *dev)
446 on_each_cpu(mce_init, NULL, 1, 1);
447 return 0;
450 /* Reinit MCEs after user configuration changes */
451 static void mce_restart(void)
453 if (check_interval)
454 cancel_delayed_work(&mcheck_work);
455 /* Timer race is harmless here */
456 on_each_cpu(mce_init, NULL, 1, 1);
457 if (check_interval)
458 schedule_delayed_work(&mcheck_work, check_interval*HZ);
461 static struct sysdev_class mce_sysclass = {
462 .resume = mce_resume,
463 set_kset_name("machinecheck"),
466 static struct sys_device device_mce = {
467 .id = 0,
468 .cls = &mce_sysclass,
471 /* Why are there no generic functions for this? */
472 #define ACCESSOR(name, var, start) \
473 static ssize_t show_ ## name(struct sys_device *s, char *buf) { \
474 return sprintf(buf, "%lx\n", (unsigned long)var); \
476 static ssize_t set_ ## name(struct sys_device *s,const char *buf,size_t siz) { \
477 char *end; \
478 unsigned long new = simple_strtoul(buf, &end, 0); \
479 if (end == buf) return -EINVAL; \
480 var = new; \
481 start; \
482 return end-buf; \
484 static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
486 ACCESSOR(bank0ctl,bank[0],mce_restart())
487 ACCESSOR(bank1ctl,bank[1],mce_restart())
488 ACCESSOR(bank2ctl,bank[2],mce_restart())
489 ACCESSOR(bank3ctl,bank[3],mce_restart())
490 ACCESSOR(bank4ctl,bank[4],mce_restart())
491 ACCESSOR(tolerant,tolerant,)
492 ACCESSOR(check_interval,check_interval,mce_restart())
494 static __init int mce_init_device(void)
496 int err;
497 if (!mce_available(&boot_cpu_data))
498 return -EIO;
499 err = sysdev_class_register(&mce_sysclass);
500 if (!err)
501 err = sysdev_register(&device_mce);
502 if (!err) {
503 /* could create per CPU objects, but it is not worth it. */
504 sysdev_create_file(&device_mce, &attr_bank0ctl);
505 sysdev_create_file(&device_mce, &attr_bank1ctl);
506 sysdev_create_file(&device_mce, &attr_bank2ctl);
507 sysdev_create_file(&device_mce, &attr_bank3ctl);
508 sysdev_create_file(&device_mce, &attr_bank4ctl);
509 sysdev_create_file(&device_mce, &attr_tolerant);
510 sysdev_create_file(&device_mce, &attr_check_interval);
513 misc_register(&mce_log_device);
514 return err;
517 device_initcall(mce_init_device);