MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / net / wireless / prism54 / oid_mgt.c
blob333926d324ba20cad7f2d6fb325b9ec0a2522b8a
1 /*
2 * Copyright (C) 2003,2004 Aurelien Alleaume <slts@free.fr>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include "prismcompat.h"
20 #include "islpci_dev.h"
21 #include "islpci_mgt.h"
22 #include "isl_oid.h"
23 #include "oid_mgt.h"
24 #include "isl_ioctl.h"
26 /* to convert between channel and freq */
27 const int frequency_list_bg[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
28 2447, 2452, 2457, 2462, 2467, 2472, 2484
31 int
32 channel_of_freq(int f)
34 int c = 0;
36 if ((f >= 2412) && (f <= 2484)) {
37 while ((c < 14) && (f != frequency_list_bg[c]))
38 c++;
39 return (c >= 14) ? 0 : ++c;
40 } else if ((f >= (int) 5000) && (f <= (int) 6000)) {
41 return ( (f - 5000) / 5 );
42 } else
43 return 0;
46 #define OID_STRUCT(name,oid,s,t) [name] = {oid, 0, sizeof(s), t}
47 #define OID_STRUCT_C(name,oid,s,t) OID_STRUCT(name,oid,s,t | OID_FLAG_CACHED)
48 #define OID_U32(name,oid) OID_STRUCT(name,oid,u32,OID_TYPE_U32)
49 #define OID_U32_C(name,oid) OID_STRUCT_C(name,oid,u32,OID_TYPE_U32)
50 #define OID_STRUCT_MLME(name,oid) OID_STRUCT(name,oid,struct obj_mlme,OID_TYPE_MLME)
51 #define OID_STRUCT_MLMEEX(name,oid) OID_STRUCT(name,oid,struct obj_mlmeex,OID_TYPE_MLMEEX)
53 #define OID_UNKNOWN(name,oid) OID_STRUCT(name,oid,0,0)
55 struct oid_t isl_oid[] = {
56 OID_STRUCT(GEN_OID_MACADDRESS, 0x00000000, u8[6], OID_TYPE_ADDR),
57 OID_U32(GEN_OID_LINKSTATE, 0x00000001),
58 OID_UNKNOWN(GEN_OID_WATCHDOG, 0x00000002),
59 OID_UNKNOWN(GEN_OID_MIBOP, 0x00000003),
60 OID_UNKNOWN(GEN_OID_OPTIONS, 0x00000004),
61 OID_UNKNOWN(GEN_OID_LEDCONFIG, 0x00000005),
63 /* 802.11 */
64 OID_U32_C(DOT11_OID_BSSTYPE, 0x10000000),
65 OID_STRUCT_C(DOT11_OID_BSSID, 0x10000001, u8[6], OID_TYPE_RAW),
66 OID_STRUCT_C(DOT11_OID_SSID, 0x10000002, struct obj_ssid,
67 OID_TYPE_SSID),
68 OID_U32(DOT11_OID_STATE, 0x10000003),
69 OID_U32(DOT11_OID_AID, 0x10000004),
70 OID_STRUCT(DOT11_OID_COUNTRYSTRING, 0x10000005, u8[4], OID_TYPE_RAW),
71 OID_STRUCT_C(DOT11_OID_SSIDOVERRIDE, 0x10000006, struct obj_ssid,
72 OID_TYPE_SSID),
74 OID_U32(DOT11_OID_MEDIUMLIMIT, 0x11000000),
75 OID_U32_C(DOT11_OID_BEACONPERIOD, 0x11000001),
76 OID_U32(DOT11_OID_DTIMPERIOD, 0x11000002),
77 OID_U32(DOT11_OID_ATIMWINDOW, 0x11000003),
78 OID_U32(DOT11_OID_LISTENINTERVAL, 0x11000004),
79 OID_U32(DOT11_OID_CFPPERIOD, 0x11000005),
80 OID_U32(DOT11_OID_CFPDURATION, 0x11000006),
82 OID_U32_C(DOT11_OID_AUTHENABLE, 0x12000000),
83 OID_U32_C(DOT11_OID_PRIVACYINVOKED, 0x12000001),
84 OID_U32_C(DOT11_OID_EXUNENCRYPTED, 0x12000002),
85 OID_U32_C(DOT11_OID_DEFKEYID, 0x12000003),
86 [DOT11_OID_DEFKEYX] = {0x12000004, 3, sizeof (struct obj_key),
87 OID_FLAG_CACHED | OID_TYPE_KEY}, /* DOT11_OID_DEFKEY1,...DOT11_OID_DEFKEY4 */
88 OID_UNKNOWN(DOT11_OID_STAKEY, 0x12000008),
89 OID_U32(DOT11_OID_REKEYTHRESHOLD, 0x12000009),
90 OID_UNKNOWN(DOT11_OID_STASC, 0x1200000a),
92 OID_U32(DOT11_OID_PRIVTXREJECTED, 0x1a000000),
93 OID_U32(DOT11_OID_PRIVRXPLAIN, 0x1a000001),
94 OID_U32(DOT11_OID_PRIVRXFAILED, 0x1a000002),
95 OID_U32(DOT11_OID_PRIVRXNOKEY, 0x1a000003),
97 OID_U32_C(DOT11_OID_RTSTHRESH, 0x13000000),
98 OID_U32_C(DOT11_OID_FRAGTHRESH, 0x13000001),
99 OID_U32_C(DOT11_OID_SHORTRETRIES, 0x13000002),
100 OID_U32_C(DOT11_OID_LONGRETRIES, 0x13000003),
101 OID_U32_C(DOT11_OID_MAXTXLIFETIME, 0x13000004),
102 OID_U32(DOT11_OID_MAXRXLIFETIME, 0x13000005),
103 OID_U32(DOT11_OID_AUTHRESPTIMEOUT, 0x13000006),
104 OID_U32(DOT11_OID_ASSOCRESPTIMEOUT, 0x13000007),
106 OID_UNKNOWN(DOT11_OID_ALOFT_TABLE, 0x1d000000),
107 OID_UNKNOWN(DOT11_OID_ALOFT_CTRL_TABLE, 0x1d000001),
108 OID_UNKNOWN(DOT11_OID_ALOFT_RETREAT, 0x1d000002),
109 OID_UNKNOWN(DOT11_OID_ALOFT_PROGRESS, 0x1d000003),
110 OID_U32(DOT11_OID_ALOFT_FIXEDRATE, 0x1d000004),
111 OID_UNKNOWN(DOT11_OID_ALOFT_RSSIGRAPH, 0x1d000005),
112 OID_UNKNOWN(DOT11_OID_ALOFT_CONFIG, 0x1d000006),
114 [DOT11_OID_VDCFX] = {0x1b000000, 7, 0, 0},
115 OID_U32(DOT11_OID_MAXFRAMEBURST, 0x1b000008),
117 OID_U32(DOT11_OID_PSM, 0x14000000),
118 OID_U32(DOT11_OID_CAMTIMEOUT, 0x14000001),
119 OID_U32(DOT11_OID_RECEIVEDTIMS, 0x14000002),
120 OID_U32(DOT11_OID_ROAMPREFERENCE, 0x14000003),
122 OID_U32(DOT11_OID_BRIDGELOCAL, 0x15000000),
123 OID_U32(DOT11_OID_CLIENTS, 0x15000001),
124 OID_U32(DOT11_OID_CLIENTSASSOCIATED, 0x15000002),
125 [DOT11_OID_CLIENTX] = {0x15000003, 2006, 0, 0}, /* DOT11_OID_CLIENTX,...DOT11_OID_CLIENT2007 */
127 OID_STRUCT(DOT11_OID_CLIENTFIND, 0x150007DB, u8[6], OID_TYPE_ADDR),
128 OID_STRUCT(DOT11_OID_WDSLINKADD, 0x150007DC, u8[6], OID_TYPE_ADDR),
129 OID_STRUCT(DOT11_OID_WDSLINKREMOVE, 0x150007DD, u8[6], OID_TYPE_ADDR),
130 OID_STRUCT(DOT11_OID_EAPAUTHSTA, 0x150007DE, u8[6], OID_TYPE_ADDR),
131 OID_STRUCT(DOT11_OID_EAPUNAUTHSTA, 0x150007DF, u8[6], OID_TYPE_ADDR),
132 OID_U32_C(DOT11_OID_DOT1XENABLE, 0x150007E0),
133 OID_UNKNOWN(DOT11_OID_MICFAILURE, 0x150007E1),
134 OID_UNKNOWN(DOT11_OID_REKEYINDICATE, 0x150007E2),
136 OID_U32(DOT11_OID_MPDUTXSUCCESSFUL, 0x16000000),
137 OID_U32(DOT11_OID_MPDUTXONERETRY, 0x16000001),
138 OID_U32(DOT11_OID_MPDUTXMULTIPLERETRIES, 0x16000002),
139 OID_U32(DOT11_OID_MPDUTXFAILED, 0x16000003),
140 OID_U32(DOT11_OID_MPDURXSUCCESSFUL, 0x16000004),
141 OID_U32(DOT11_OID_MPDURXDUPS, 0x16000005),
142 OID_U32(DOT11_OID_RTSSUCCESSFUL, 0x16000006),
143 OID_U32(DOT11_OID_RTSFAILED, 0x16000007),
144 OID_U32(DOT11_OID_ACKFAILED, 0x16000008),
145 OID_U32(DOT11_OID_FRAMERECEIVES, 0x16000009),
146 OID_U32(DOT11_OID_FRAMEERRORS, 0x1600000A),
147 OID_U32(DOT11_OID_FRAMEABORTS, 0x1600000B),
148 OID_U32(DOT11_OID_FRAMEABORTSPHY, 0x1600000C),
150 OID_U32(DOT11_OID_SLOTTIME, 0x17000000),
151 OID_U32(DOT11_OID_CWMIN, 0x17000001),
152 OID_U32(DOT11_OID_CWMAX, 0x17000002),
153 OID_U32(DOT11_OID_ACKWINDOW, 0x17000003),
154 OID_U32(DOT11_OID_ANTENNARX, 0x17000004),
155 OID_U32(DOT11_OID_ANTENNATX, 0x17000005),
156 OID_U32(DOT11_OID_ANTENNADIVERSITY, 0x17000006),
157 OID_U32_C(DOT11_OID_CHANNEL, 0x17000007),
158 OID_U32_C(DOT11_OID_EDTHRESHOLD, 0x17000008),
159 OID_U32(DOT11_OID_PREAMBLESETTINGS, 0x17000009),
160 OID_STRUCT(DOT11_OID_RATES, 0x1700000A, u8[IWMAX_BITRATES + 1],
161 OID_TYPE_RAW),
162 OID_U32(DOT11_OID_CCAMODESUPPORTED, 0x1700000B),
163 OID_U32(DOT11_OID_CCAMODE, 0x1700000C),
164 OID_UNKNOWN(DOT11_OID_RSSIVECTOR, 0x1700000D),
165 OID_UNKNOWN(DOT11_OID_OUTPUTPOWERTABLE, 0x1700000E),
166 OID_U32(DOT11_OID_OUTPUTPOWER, 0x1700000F),
167 OID_STRUCT(DOT11_OID_SUPPORTEDRATES, 0x17000010,
168 u8[IWMAX_BITRATES + 1], OID_TYPE_RAW),
169 OID_U32_C(DOT11_OID_FREQUENCY, 0x17000011),
170 [DOT11_OID_SUPPORTEDFREQUENCIES] =
171 {0x17000012, 0, sizeof (struct obj_frequencies)
172 + sizeof (u16) * IWMAX_FREQ, OID_TYPE_FREQUENCIES},
174 OID_U32(DOT11_OID_NOISEFLOOR, 0x17000013),
175 OID_STRUCT(DOT11_OID_FREQUENCYACTIVITY, 0x17000014, u8[IWMAX_FREQ + 1],
176 OID_TYPE_RAW),
177 OID_UNKNOWN(DOT11_OID_IQCALIBRATIONTABLE, 0x17000015),
178 OID_U32(DOT11_OID_NONERPPROTECTION, 0x17000016),
179 OID_U32(DOT11_OID_SLOTSETTINGS, 0x17000017),
180 OID_U32(DOT11_OID_NONERPTIMEOUT, 0x17000018),
181 OID_U32(DOT11_OID_PROFILES, 0x17000019),
182 OID_STRUCT(DOT11_OID_EXTENDEDRATES, 0x17000020,
183 u8[IWMAX_BITRATES + 1], OID_TYPE_RAW),
185 OID_STRUCT_MLME(DOT11_OID_DEAUTHENTICATE, 0x18000000),
186 OID_STRUCT_MLME(DOT11_OID_AUTHENTICATE, 0x18000001),
187 OID_STRUCT_MLME(DOT11_OID_DISASSOCIATE, 0x18000002),
188 OID_STRUCT_MLME(DOT11_OID_ASSOCIATE, 0x18000003),
189 OID_UNKNOWN(DOT11_OID_SCAN, 0x18000004),
190 OID_STRUCT_MLMEEX(DOT11_OID_BEACON, 0x18000005),
191 OID_STRUCT_MLMEEX(DOT11_OID_PROBE, 0x18000006),
192 OID_STRUCT_MLMEEX(DOT11_OID_DEAUTHENTICATEEX, 0x18000007),
193 OID_STRUCT_MLMEEX(DOT11_OID_AUTHENTICATEEX, 0x18000008),
194 OID_STRUCT_MLMEEX(DOT11_OID_DISASSOCIATEEX, 0x18000009),
195 OID_STRUCT_MLMEEX(DOT11_OID_ASSOCIATEEX, 0x1800000A),
196 OID_STRUCT_MLMEEX(DOT11_OID_REASSOCIATE, 0x1800000B),
197 OID_STRUCT_MLMEEX(DOT11_OID_REASSOCIATEEX, 0x1800000C),
199 OID_U32(DOT11_OID_NONERPSTATUS, 0x1E000000),
201 OID_U32(DOT11_OID_STATIMEOUT, 0x19000000),
202 OID_U32_C(DOT11_OID_MLMEAUTOLEVEL, 0x19000001),
203 OID_U32(DOT11_OID_BSSTIMEOUT, 0x19000002),
204 OID_UNKNOWN(DOT11_OID_ATTACHMENT, 0x19000003),
205 OID_STRUCT_C(DOT11_OID_PSMBUFFER, 0x19000004, struct obj_buffer,
206 OID_TYPE_BUFFER),
208 OID_U32(DOT11_OID_BSSS, 0x1C000000),
209 [DOT11_OID_BSSX] = {0x1C000001, 63, sizeof (struct obj_bss),
210 OID_TYPE_BSS}, /*DOT11_OID_BSS1,...,DOT11_OID_BSS64 */
211 OID_STRUCT(DOT11_OID_BSSFIND, 0x1C000042, struct obj_bss, OID_TYPE_BSS),
212 [DOT11_OID_BSSLIST] = {0x1C000043, 0, sizeof (struct
213 obj_bsslist) +
214 sizeof (struct obj_bss[IWMAX_BSS]),
215 OID_TYPE_BSSLIST},
217 OID_UNKNOWN(OID_INL_TUNNEL, 0xFF020000),
218 OID_UNKNOWN(OID_INL_MEMADDR, 0xFF020001),
219 OID_UNKNOWN(OID_INL_MEMORY, 0xFF020002),
220 OID_U32_C(OID_INL_MODE, 0xFF020003),
221 OID_UNKNOWN(OID_INL_COMPONENT_NR, 0xFF020004),
222 OID_STRUCT(OID_INL_VERSION, 0xFF020005, u8[8], OID_TYPE_RAW),
223 OID_UNKNOWN(OID_INL_INTERFACE_ID, 0xFF020006),
224 OID_UNKNOWN(OID_INL_COMPONENT_ID, 0xFF020007),
225 OID_U32_C(OID_INL_CONFIG, 0xFF020008),
226 OID_U32_C(OID_INL_DOT11D_CONFORMANCE, 0xFF02000C),
227 OID_U32(OID_INL_PHYCAPABILITIES, 0xFF02000D),
228 OID_U32_C(OID_INL_OUTPUTPOWER, 0xFF02000F),
233 mgt_init(islpci_private *priv)
235 int i;
237 priv->mib = kmalloc(OID_NUM_LAST * sizeof (void *), GFP_KERNEL);
238 if (!priv->mib)
239 return -ENOMEM;
241 memset(priv->mib, 0, OID_NUM_LAST * sizeof (void *));
243 /* Alloc the cache */
244 for (i = 0; i < OID_NUM_LAST; i++) {
245 if (isl_oid[i].flags & OID_FLAG_CACHED) {
246 priv->mib[i] = kmalloc(isl_oid[i].size *
247 (isl_oid[i].range + 1),
248 GFP_KERNEL);
249 if (!priv->mib[i])
250 return -ENOMEM;
251 memset(priv->mib[i], 0,
252 isl_oid[i].size * (isl_oid[i].range + 1));
253 } else
254 priv->mib[i] = NULL;
257 init_rwsem(&priv->mib_sem);
258 prism54_mib_init(priv);
260 return 0;
263 void
264 mgt_clean(islpci_private *priv)
266 int i;
268 if (!priv->mib)
269 return;
270 for (i = 0; i < OID_NUM_LAST; i++)
271 if (priv->mib[i]) {
272 kfree(priv->mib[i]);
273 priv->mib[i] = NULL;
275 kfree(priv->mib);
276 priv->mib = NULL;
279 void
280 mgt_le_to_cpu(int type, void *data)
282 switch (type) {
283 case OID_TYPE_U32:
284 *(u32 *) data = le32_to_cpu(*(u32 *) data);
285 break;
286 case OID_TYPE_BUFFER:{
287 struct obj_buffer *buff = data;
288 buff->size = le32_to_cpu(buff->size);
289 buff->addr = le32_to_cpu(buff->addr);
290 break;
292 case OID_TYPE_BSS:{
293 struct obj_bss *bss = data;
294 bss->age = le16_to_cpu(bss->age);
295 bss->channel = le16_to_cpu(bss->channel);
296 bss->capinfo = le16_to_cpu(bss->capinfo);
297 bss->rates = le16_to_cpu(bss->rates);
298 bss->basic_rates = le16_to_cpu(bss->basic_rates);
299 break;
301 case OID_TYPE_BSSLIST:{
302 struct obj_bsslist *list = data;
303 int i;
304 list->nr = le32_to_cpu(list->nr);
305 for (i = 0; i < list->nr; i++)
306 mgt_le_to_cpu(OID_TYPE_BSS, &list->bsslist[i]);
307 break;
309 case OID_TYPE_FREQUENCIES:{
310 struct obj_frequencies *freq = data;
311 int i;
312 freq->nr = le16_to_cpu(freq->nr);
313 for (i = 0; i < freq->nr; i++)
314 freq->mhz[i] = le16_to_cpu(freq->mhz[i]);
315 break;
317 case OID_TYPE_MLME:{
318 struct obj_mlme *mlme = data;
319 mlme->id = le16_to_cpu(mlme->id);
320 mlme->state = le16_to_cpu(mlme->state);
321 mlme->code = le16_to_cpu(mlme->code);
322 break;
324 case OID_TYPE_MLMEEX:{
325 struct obj_mlmeex *mlme = data;
326 mlme->id = le16_to_cpu(mlme->id);
327 mlme->state = le16_to_cpu(mlme->state);
328 mlme->code = le16_to_cpu(mlme->code);
329 mlme->size = le16_to_cpu(mlme->size);
330 break;
332 case OID_TYPE_SSID:
333 case OID_TYPE_KEY:
334 case OID_TYPE_ADDR:
335 case OID_TYPE_RAW:
336 break;
337 default:
338 BUG();
342 static void
343 mgt_cpu_to_le(int type, void *data)
345 switch (type) {
346 case OID_TYPE_U32:
347 *(u32 *) data = cpu_to_le32(*(u32 *) data);
348 break;
349 case OID_TYPE_BUFFER:{
350 struct obj_buffer *buff = data;
351 buff->size = cpu_to_le32(buff->size);
352 buff->addr = cpu_to_le32(buff->addr);
353 break;
355 case OID_TYPE_BSS:{
356 struct obj_bss *bss = data;
357 bss->age = cpu_to_le16(bss->age);
358 bss->channel = cpu_to_le16(bss->channel);
359 bss->capinfo = cpu_to_le16(bss->capinfo);
360 bss->rates = cpu_to_le16(bss->rates);
361 bss->basic_rates = cpu_to_le16(bss->basic_rates);
362 break;
364 case OID_TYPE_BSSLIST:{
365 struct obj_bsslist *list = data;
366 int i;
367 list->nr = cpu_to_le32(list->nr);
368 for (i = 0; i < list->nr; i++)
369 mgt_cpu_to_le(OID_TYPE_BSS, &list->bsslist[i]);
370 break;
372 case OID_TYPE_FREQUENCIES:{
373 struct obj_frequencies *freq = data;
374 int i;
375 freq->nr = cpu_to_le16(freq->nr);
376 for (i = 0; i < freq->nr; i++)
377 freq->mhz[i] = cpu_to_le16(freq->mhz[i]);
378 break;
380 case OID_TYPE_MLME:{
381 struct obj_mlme *mlme = data;
382 mlme->id = cpu_to_le16(mlme->id);
383 mlme->state = cpu_to_le16(mlme->state);
384 mlme->code = cpu_to_le16(mlme->code);
385 break;
387 case OID_TYPE_MLMEEX:{
388 struct obj_mlmeex *mlme = data;
389 mlme->id = cpu_to_le16(mlme->id);
390 mlme->state = cpu_to_le16(mlme->state);
391 mlme->code = cpu_to_le16(mlme->code);
392 mlme->size = cpu_to_le16(mlme->size);
393 break;
395 case OID_TYPE_SSID:
396 case OID_TYPE_KEY:
397 case OID_TYPE_ADDR:
398 case OID_TYPE_RAW:
399 break;
400 default:
401 BUG();
405 /* Note : data is modified during this function */
408 mgt_set_request(islpci_private *priv, enum oid_num_t n, int extra, void *data)
410 int ret = 0;
411 struct islpci_mgmtframe *response = NULL;
412 int response_op = PIMFOR_OP_ERROR;
413 int dlen;
414 void *cache, *_data = data;
415 u32 oid;
417 BUG_ON(OID_NUM_LAST <= n);
418 BUG_ON(extra > isl_oid[n].range);
420 if (!priv->mib)
421 /* memory has been freed */
422 return -1;
424 dlen = isl_oid[n].size;
425 cache = priv->mib[n];
426 cache += (cache ? extra * dlen : 0);
427 oid = isl_oid[n].oid + extra;
429 if (_data == NULL)
430 /* we are requested to re-set a cached value */
431 _data = cache;
432 else
433 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, _data);
434 /* If we are going to write to the cache, we don't want anyone to read
435 * it -> acquire write lock.
436 * Else we could acquire a read lock to be sure we don't bother the
437 * commit process (which takes a write lock). But I'm not sure if it's
438 * needed.
440 if (cache)
441 down_write(&priv->mib_sem);
443 if (islpci_get_state(priv) >= PRV_STATE_READY) {
444 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET, oid,
445 _data, dlen, &response);
446 if (!ret) {
447 response_op = response->header->operation;
448 islpci_mgt_release(response);
450 if (ret || response_op == PIMFOR_OP_ERROR)
451 ret = -EIO;
452 } else if (!cache)
453 ret = -EIO;
455 if (cache) {
456 if (!ret && data)
457 memcpy(cache, _data, dlen);
458 up_write(&priv->mib_sem);
461 /* re-set given data to what it was */
462 if (data)
463 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, data);
465 return ret;
469 mgt_get_request(islpci_private *priv, enum oid_num_t n, int extra, void *data,
470 union oid_res_t *res)
473 int ret = -EIO;
474 int reslen = 0;
475 struct islpci_mgmtframe *response = NULL;
477 int dlen;
478 void *cache, *_res = NULL;
479 u32 oid;
481 BUG_ON(OID_NUM_LAST <= n);
482 BUG_ON(extra > isl_oid[n].range);
484 res->ptr = NULL;
486 if (!priv->mib)
487 /* memory has been freed */
488 return -1;
490 dlen = isl_oid[n].size;
491 cache = priv->mib[n];
492 cache += cache ? extra * dlen : 0;
493 oid = isl_oid[n].oid + extra;
494 reslen = dlen;
496 if (cache)
497 down_read(&priv->mib_sem);
499 if (islpci_get_state(priv) >= PRV_STATE_READY) {
500 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_GET,
501 oid, data, dlen, &response);
502 if (ret || !response ||
503 response->header->operation == PIMFOR_OP_ERROR) {
504 if (response)
505 islpci_mgt_release(response);
506 ret = -EIO;
508 if (!ret) {
509 _res = response->data;
510 reslen = response->header->length;
512 } else if (cache) {
513 _res = cache;
514 ret = 0;
516 if ((isl_oid[n].flags & OID_FLAG_TYPE) == OID_TYPE_U32)
517 res->u = ret ? 0 : le32_to_cpu(*(u32 *) _res);
518 else {
519 res->ptr = kmalloc(reslen, GFP_KERNEL);
520 BUG_ON(res->ptr == NULL);
521 if (ret)
522 memset(res->ptr, 0, reslen);
523 else {
524 memcpy(res->ptr, _res, reslen);
525 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE,
526 res->ptr);
529 if (cache)
530 up_read(&priv->mib_sem);
532 if (response && !ret)
533 islpci_mgt_release(response);
535 if (reslen > isl_oid[n].size)
536 printk(KERN_DEBUG
537 "mgt_get_request(0x%x): received data length was bigger "
538 "than expected (%d > %d). Memory is probably corrupted...",
539 oid, reslen, isl_oid[n].size);
541 return ret;
544 /* lock outside */
546 mgt_commit_list(islpci_private *priv, enum oid_num_t *l, int n)
548 int i, ret = 0;
549 struct islpci_mgmtframe *response;
551 for (i = 0; i < n; i++) {
552 struct oid_t *t = &(isl_oid[l[i]]);
553 void *data = priv->mib[l[i]];
554 int j = 0;
555 u32 oid = t->oid;
556 BUG_ON(data == NULL);
557 while (j <= t->range) {
558 response = NULL;
559 ret |= islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET,
560 oid, data, t->size,
561 &response);
562 if (response) {
563 ret |= (response->header->operation ==
564 PIMFOR_OP_ERROR);
565 islpci_mgt_release(response);
567 j++;
568 oid++;
569 data += t->size;
572 return ret;
575 /* Lock outside */
577 void
578 mgt_set(islpci_private *priv, enum oid_num_t n, void *data)
580 BUG_ON(OID_NUM_LAST <= n);
581 BUG_ON(priv->mib[n] == NULL);
583 memcpy(priv->mib[n], data, isl_oid[n].size);
584 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, priv->mib[n]);
587 void
588 mgt_get(islpci_private *priv, enum oid_num_t n, void *res)
590 BUG_ON(OID_NUM_LAST <= n);
591 BUG_ON(priv->mib[n] == NULL);
592 BUG_ON(res == NULL);
594 memcpy(res, priv->mib[n], isl_oid[n].size);
595 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, res);
598 /* Commits the cache. Lock outside. */
600 static enum oid_num_t commit_part1[] = {
601 OID_INL_CONFIG,
602 OID_INL_MODE,
603 DOT11_OID_BSSTYPE,
604 DOT11_OID_CHANNEL,
605 DOT11_OID_MLMEAUTOLEVEL
608 static enum oid_num_t commit_part2[] = {
609 DOT11_OID_SSID,
610 DOT11_OID_PSMBUFFER,
611 DOT11_OID_AUTHENABLE,
612 DOT11_OID_PRIVACYINVOKED,
613 DOT11_OID_EXUNENCRYPTED,
614 DOT11_OID_DEFKEYX, /* MULTIPLE */
615 DOT11_OID_DEFKEYID,
616 DOT11_OID_DOT1XENABLE,
617 OID_INL_DOT11D_CONFORMANCE,
618 /* Do not initialize this - fw < 1.0.4.3 rejects it
619 OID_INL_OUTPUTPOWER,
623 /* update the MAC addr. */
624 static int
625 mgt_update_addr(islpci_private *priv)
627 struct islpci_mgmtframe *res = NULL;
628 int ret;
630 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_GET,
631 isl_oid[GEN_OID_MACADDRESS].oid, NULL,
632 isl_oid[GEN_OID_MACADDRESS].size, &res);
634 if ((ret == 0) && res && (res->header->operation != PIMFOR_OP_ERROR))
635 memcpy(priv->ndev->dev_addr, res->data, 6);
636 else
637 ret = -EIO;
638 if (res)
639 islpci_mgt_release(res);
641 return ret;
644 void
645 mgt_commit(islpci_private *priv)
647 int rvalue;
648 u32 u;
650 if (islpci_get_state(priv) < PRV_STATE_INIT)
651 return;
653 rvalue = mgt_commit_list(priv, commit_part1,
654 sizeof (commit_part1) /
655 sizeof (commit_part1[0]));
657 if (priv->iw_mode != IW_MODE_MONITOR)
658 rvalue |= mgt_commit_list(priv, commit_part2,
659 sizeof (commit_part2) /
660 sizeof (commit_part2[0]));
662 u = OID_INL_MODE;
663 rvalue |= mgt_commit_list(priv, &u, 1);
664 rvalue |= mgt_update_addr(priv);
666 if (rvalue) {
667 /* some request have failed. The device might be in an
668 incoherent state. We should reset it ! */
669 printk(KERN_DEBUG "%s: mgt_commit has failed. Restart the "
670 "device \n", priv->ndev->name);
674 /* This will tell you if you are allowed to answer a mlme(ex) request .*/
677 mgt_mlme_answer(islpci_private *priv)
679 u32 mlmeautolevel;
680 /* Acquire a read lock because if we are in a mode change, it's
681 * possible to answer true, while the card is leaving master to managed
682 * mode. Answering to a mlme in this situation could hang the card.
684 down_read(&priv->mib_sem);
685 mlmeautolevel =
686 le32_to_cpu(*(u32 *) priv->mib[DOT11_OID_MLMEAUTOLEVEL]);
687 up_read(&priv->mib_sem);
689 return ((priv->iw_mode == IW_MODE_MASTER) &&
690 (mlmeautolevel >= DOT11_MLME_INTERMEDIATE));
693 enum oid_num_t
694 mgt_oidtonum(u32 oid)
696 int i;
698 for (i = 0; i < OID_NUM_LAST; i++)
699 if (isl_oid[i].oid == oid)
700 return i;
702 printk(KERN_DEBUG "looking for an unknown oid 0x%x", oid);
704 return OID_NUM_LAST;
708 mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
710 switch (isl_oid[n].flags & OID_FLAG_TYPE) {
711 case OID_TYPE_U32:
712 return snprintf(str, PRIV_STR_SIZE, "%u\n", r->u);
713 break;
714 case OID_TYPE_BUFFER:{
715 struct obj_buffer *buff = r->ptr;
716 return snprintf(str, PRIV_STR_SIZE,
717 "size=%u\naddr=0x%X\n", buff->size,
718 buff->addr);
720 break;
721 case OID_TYPE_BSS:{
722 struct obj_bss *bss = r->ptr;
723 return snprintf(str, PRIV_STR_SIZE,
724 "age=%u\nchannel=%u\n"
725 "capinfo=0x%X\nrates=0x%X\n"
726 "basic_rates=0x%X\n", bss->age,
727 bss->channel, bss->capinfo,
728 bss->rates, bss->basic_rates);
730 break;
731 case OID_TYPE_BSSLIST:{
732 struct obj_bsslist *list = r->ptr;
733 int i, k;
734 k = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", list->nr);
735 for (i = 0; i < list->nr; i++)
736 k += snprintf(str + k, PRIV_STR_SIZE - k,
737 "bss[%u] : \nage=%u\nchannel=%u\n"
738 "capinfo=0x%X\nrates=0x%X\n"
739 "basic_rates=0x%X\n",
740 i, list->bsslist[i].age,
741 list->bsslist[i].channel,
742 list->bsslist[i].capinfo,
743 list->bsslist[i].rates,
744 list->bsslist[i].basic_rates);
745 return k;
747 break;
748 case OID_TYPE_FREQUENCIES:{
749 struct obj_frequencies *freq = r->ptr;
750 int i, t;
751 printk("nr : %u\n", freq->nr);
752 t = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", freq->nr);
753 for (i = 0; i < freq->nr; i++)
754 t += snprintf(str + t, PRIV_STR_SIZE - t,
755 "mhz[%u]=%u\n", i, freq->mhz[i]);
756 return t;
758 break;
759 case OID_TYPE_MLME:{
760 struct obj_mlme *mlme = r->ptr;
761 return snprintf(str, PRIV_STR_SIZE,
762 "id=0x%X\nstate=0x%X\ncode=0x%X\n",
763 mlme->id, mlme->state, mlme->code);
765 break;
766 case OID_TYPE_MLMEEX:{
767 struct obj_mlmeex *mlme = r->ptr;
768 return snprintf(str, PRIV_STR_SIZE,
769 "id=0x%X\nstate=0x%X\n"
770 "code=0x%X\nsize=0x%X\n", mlme->id,
771 mlme->state, mlme->code, mlme->size);
773 break;
774 case OID_TYPE_SSID:{
775 struct obj_ssid *ssid = r->ptr;
776 return snprintf(str, PRIV_STR_SIZE,
777 "length=%u\noctets=%.*s\n",
778 ssid->length, ssid->length,
779 ssid->octets);
781 break;
782 case OID_TYPE_KEY:{
783 struct obj_key *key = r->ptr;
784 int t, i;
785 t = snprintf(str, PRIV_STR_SIZE,
786 "type=0x%X\nlength=0x%X\nkey=0x",
787 key->type, key->length);
788 for (i = 0; i < key->length; i++)
789 t += snprintf(str + t, PRIV_STR_SIZE - t,
790 "%02X:", key->key[i]);
791 t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
792 return t;
794 break;
795 case OID_TYPE_RAW:
796 case OID_TYPE_ADDR:{
797 unsigned char *buff = r->ptr;
798 int t, i;
799 t = snprintf(str, PRIV_STR_SIZE, "hex data=");
800 for (i = 0; i < isl_oid[n].size; i++)
801 t += snprintf(str + t, PRIV_STR_SIZE - t,
802 "%02X:", buff[i]);
803 t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
804 return t;
806 break;
807 default:
808 BUG();
810 return 0;