5 #define APBDMA_DMA_CHAN_BASE 0x80
6 #define APBDMA_DMA_SRC_0x0 0x0
7 #define APBDMA_DMA_DEST_0x4 0x4
8 #define APBDMA_DMA_CYCLE_0x8 0x8
9 #define APBDMA_DMA_CMD_0xC 0xc
11 #define APBDMA_WIDTH_8BIT 0x0
12 #define APBDMA_WIDTH_16BIT 0x1
13 #define APBDMA_WIDTH_32BIT 0x2
15 #define APBDMA_TYPE_APB 0
16 #define APBDMA_TYPE_AHB 1
18 #define APBDMA_NO_TRIGGER_IRQ 0x0
19 #define APBDMA_TRIGGER_IRQ 0x1
21 #define APBDMA_CTL_FIX 0
22 #define APBDMA_CTL_INC1 1
23 #define APBDMA_CTL_INC2 2
24 #define APBDMA_CTL_INC4 4
25 #define APBDMA_CTL_INC8 8
26 #define APBDMA_CTL_INC16 16
27 #define APBDMA_CTL_DEC1 (-1)
28 #define APBDMA_CTL_DEC2 (-2)
29 #define APBDMA_CTL_DEC4 (-4)
33 /* add dma parameter */
34 unsigned int src
; // source address for dma
35 unsigned int dest
; // dest address for dma
36 unsigned int width
; // data width (0/1/2=>8/16/32)
37 unsigned int req_num
; // hardware request/grant number
38 int sctl
; // source incremental
39 int dctl
; // dest incremental
40 unsigned int stype
; // source type (0/1 => APB/AHB)
41 unsigned int dtype
; // dest type (0/1 => APB/AHB)
42 unsigned int burst
; // (0/1)==>(disable/enable)
43 unsigned int size
; // dma count
44 unsigned int irq
; // (0/1)==>(disable/enable)
51 unsigned int channel_base
;
57 apb_dma_data_t
*apb_dma_alloc(void);
58 void apb_dma_free(apb_dma_data_t
*priv
);
59 int apb_dma_init(apb_dma_data_t
*priv
);
60 inline void apb_dma_add(apb_dma_data_t
*priv
,apb_dma_parm_t
*parm
);
61 inline void apb_dma_start(apb_dma_data_t
*priv
);
62 void apb_dma_reset(apb_dma_data_t
*priv
);
63 inline void apb_dma_clear_int(apb_dma_data_t
*priv
);