include/asm-arm/arch-moxacpu/dma.h

   1
   2 /*
   3  * This is Moxa CPU DMA (include APB & AHB) define file.
   4  * Copyright (C) 2005 Moxa Group All Rights Reserved.
   5  *
   6  * History:
   7  *      Date            Author                  Comment
   8  *      12-01-2005      Victor Yu.              Create it.
   9  */
  10 #ifndef __ASM_ARCH_DMA_H
  11 #define __ASM_ARCH_DMA_H
  12
  13 #define MAX_DMA_ADDRESS                 0xffffffff
  14 #define MAX_DMA_CHANNELS                0
  15
  16 #define APB_DMA_MAX_CHANNEL             4
  17 #define AHB_DMA_MAX_CHANNEL             8
  18 #define TOTAL_DMA_MAX_CHANNEL           (APB_DMA_MAX_CHANNEL+AHB_DMA_MAX_CHANNEL)
  19
  20 // following define for APB DMA register struct
  21 union _command {
  22         unsigned int    ul;
  23 #define APB_DMA_ENABLE                  (1<<0)
  24 #define APB_DMA_FIN_INT_STS             (1<<1)
  25 #define APB_DMA_FIN_INT_EN              (1<<2)
  26 #define APB_DMA_BURST_MODE              (1<<3)
  27 #define APB_DMA_ERR_INT_STS             (1<<4)
  28 #define APB_DMA_ERR_INT_EN              (1<<5)
  29 #define APB_DMA_SOURCE_AHB              (1<<6)
  30 #define APB_DMA_SOURCE_APB              0
  31 #define APB_DMA_DEST_AHB                (1<<7)
  32 #define APB_DMA_DEST_APB                0
  33 #define APB_DMA_SOURCE_INC_0            0
  34 #define APB_DMA_SOURCE_INC_1_4          (1<<8)
  35 #define APB_DMA_SOURCE_INC_2_8          (2<<8)
  36 #define APB_DMA_SOURCE_INC_4_16         (3<<8)
  37 #define APB_DMA_SOURCE_DEC_1_4          (5<<8)
  38 #define APB_DMA_SOURCE_DEC_2_8          (6<<8)
  39 #define APB_DMA_SOURCE_DEC_4_16         (7<<8)
  40 #define APB_DMA_SOURCE_INC_MASK         (7<<8)
  41 #define APB_DMA_DEST_INC_0              0
  42 #define APB_DMA_DEST_INC_1_4            (1<<12)
  43 #define APB_DMA_DEST_INC_2_8            (2<<12)
  44 #define APB_DMA_DEST_INC_4_16           (3<<12)
  45 #define APB_DMA_DEST_DEC_1_4            (5<<12)
  46 #define APB_DMA_DEST_DEC_2_8            (6<<12)
  47 #define APB_DMA_DEST_DEC_4_16           (7<<12)
  48 #define APB_DMA_DEST_INC_MASK           (7<<12)
  49 #define APB_DMA_DEST_REQ_NO_MASK        (15<<16)
  50 #define APB_DMA_DATA_WIDTH_MASK         (3<<20)
  51 #define APB_DMA_DATA_WIDTH_4            0
  52 #define APB_DMA_DATA_WIDTH_2            (1<<20)
  53 #define APB_DMA_DATA_WIDTH_1            (2<<20)
  54 #define APB_DMA_SOURCE_REQ_NO_MASK      (15<<24)
  55         struct _bits {
  56                 unsigned int    enable:1;       // enable DMA
  57 #define APB_DMAB_ENABLE                 1
  58                 unsigned int    fin_int_sts:1;  // finished interrupt status
  59 #define APB_DMAB_FIN_INT_STS            1
  60                 unsigned int    fin_int_en:1;   // finished interrupt enable
  61 #define APB_DMAB_FIN_INT_EN             1
  62                 unsigned int    burst:1;        // burst mode
  63 #define APB_DMAB_BURST_MODE             1
  64                 unsigned int    err_int_sts:1;  // error interrupt status
  65 #define APB_DMAB_ERR_INT_STS            1
  66                 unsigned int    err_int_en:1;   // error interrupt enable
  67 #define APB_DMAB_ERR_INT_EN             1
  68                 unsigned int    source_sel:1;   // 0:APB (device),1:AHB (RAM)
  69 #define APB_DMAB_SOURCE_AHB             1
  70 #define APB_DMAB_SOURCE_APB             0
  71                 unsigned int    dest_sel:1;     // 0:APB,1:AHB
  72 #define APB_DMAB_DEST_AHB               1
  73 #define APB_DMAB_DEST_APB               0
  74                 unsigned int    source_inc:3;   // 000:no increment
  75                                                 // 001:+1(busrt=0),+4(burst=1)
  76                                                 // 010:+2(burst=0),+8(burst=1)
  77                                                 // 011:+4(burst=0),+16(burst=1)
  78                                                 // 101:-1(burst=0),-4(burst=1)
  79                                                 // 110:-2(burst=0),-8(burst=1)
  80                                                 // 111:-4(burst=0),-16(burst=1)
  81 #define APB_DMAB_SOURCE_INC_0           0
  82 #define APB_DMAB_SOURCE_INC_1_4         1
  83 #define APB_DMAB_SOURCE_INC_2_8         2
  84 #define APB_DMAB_SOURCE_INC_4_16        3
  85 #define APB_DMAB_SOURCE_DEC_1_4         5
  86 #define APB_DMAB_SOURCE_DEC_2_8         6
  87 #define APB_DMAB_SOURCE_DEC_4_16        7
  88 #define APB_DMAB_SOURCE_INC_MASK        7
  89                 unsigned int    reserved1:1;
  90                 unsigned int    dest_inc:3;     // 000:no increment
  91                                                 // 001:+1(busrt=0),+4(burst=1)
  92                                                 // 010:+2(burst=0),+8(burst=1)
  93                                                 // 011:+4(burst=0),+16(burst=1)
  94                                                 // 101:-1(burst=0),-4(burst=1)
  95                                                 // 110:-2 (burst=0),-8(burst=1)
  96                                                 // 111:-4(burst=0),-16(burst=1)
  97 #define APB_DMAB_DEST_INC_0             0
  98 #define APB_DMAB_DEST_INC_1_4           1
  99 #define APB_DMAB_DEST_INC_2_8           2
 100 #define APB_DMAB_DEST_INC_4_16          3
 101 #define APB_DMAB_DEST_DEC_1_4           5
 102 #define APB_DMAB_DEST_DEC_2_8           6
 103 #define APB_DMAB_DEST_DEC_4_16          7
 104 #define APB_DMAB_DEST_INC_MASK          7
 105                 unsigned int    reserved2:1;
 106                 unsigned int    dest_req_no:4;  // request signal select of dest
 107                                                 // addr for DMA hwd handshake
 108                                                 // 0:no request/grant signal
 109                                                 // 1-15:request/grant signal
 110 #define APB_DMAB_DEST_REQ_NO_MASK       15
 111                 unsigned int    data_width:2;   // data width of transfer
 112                                                 // 00:word, 01:half, 10:byte
 113 #define APB_DMAB_DATA_WIDTH_MASK        3
 114 #define APB_DMAB_DATA_WIDTH_4           0
 115 #define APB_DMAB_DATA_WIDTH_2           1
 116 #define APB_DMAB_DATA_WIDTH_1           2
 117                 unsigned int    reserved3:2;
 118                 unsigned int    source_req_no:4;// request signal select of dest
 119                                                 // addr for DMA hwd handshake
 120                                                 // 0:no request/grant signal
 121                                                 // 1-15:request/grant signal
 122 #define APB_DMAB_SOURCE_REQ_NO_MASK     15
 123                 unsigned int    reserved4:4;
 124         } bits;
 125 };
 126
 127 typedef struct _apb_dma_reg {
 128         unsigned int    source_addr;
 129         unsigned int    dest_addr;
 130         unsigned int    cycles; // is depended on burst mode
 131 #define APB_DMA_CYCLES_MASK     0x00ffffff
 132         union _command  command;
 133 } apb_dma_reg;
 134
 135 #define APB_DMA_SPI_TX_REQ_NO           1
 136 #define APB_DMA_SPI_RX_REQ_NO           2
 137 #define APB_DMA_SD_REQ_NO               5
 138 #define APB_DMA_AC97_TX_REQ_NO          6
 139 #define APB_DMA_AC97_RX_REQ_NO          7
 140 #define APB_DMA_USB_DEVICE_REQ_NO       9
 141
 142 // following APB DMA private data struct define
 143 typedef struct _apb_dma_conf_param {
 144         unsigned int    source_addr;    // need physical address
 145         unsigned int    dest_addr;      // need physical address
 146         unsigned int    size;           // total bytes number
 147         int             data_width;
 148         int             dest_inc;
 149         int             source_inc;
 150         int             dest_sel;       // APB or AHB
 151         int             source_sel;     // APB or AHB
 152         int             burst_mode;
 153 } apb_dma_conf_param;
 154
 155 typedef struct _apb_dma_priv {
 156         apb_dma_reg             *reg;
 157         void                    (*irq_handler)(void *param);
 158         void                    *irq_handler_param;
 159 #ifndef CONFIG_UCLINUX
 160         apb_dma_conf_param      *conf_param;
 161 #endif
 162         int                     used_flag;
 163         int                     error_flag;
 164         int                     req_no;
 165 } apb_dma_priv;
 166
 167 // following APB DMA function call phototype define
 168 extern apb_dma_priv *apb_dma_alloc(int req_no);
 169 extern void apb_dma_release(apb_dma_priv *priv);
 170 extern void apb_dma_set_irq(apb_dma_priv *priv, void (*func)(void *param), void *param);
 171 extern void apb_dma_release_irq(apb_dma_priv *priv);
 172 extern void apb_dma_conf(apb_dma_priv *priv, apb_dma_conf_param *param);
 173 extern void apb_dma_enable(apb_dma_priv *priv);
 174 extern void apb_dma_disable(apb_dma_priv *priv);
 175
 176 #endif /* _ASM_ARCH_DMA_H */