MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / include / asm-ia64 / mca.h
blob1d000699eeec11e450aa10c5d3b312ef03f6ec4d
1 /*
2 * File: mca.h
3 * Purpose: Machine check handling specific defines
5 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
6 * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
7 * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
8 */
10 #ifndef _ASM_IA64_MCA_H
11 #define _ASM_IA64_MCA_H
13 #if !defined(__ASSEMBLY__)
15 #include <linux/interrupt.h>
16 #include <linux/types.h>
18 #include <asm/param.h>
19 #include <asm/sal.h>
20 #include <asm/processor.h>
21 #include <asm/mca_asm.h>
23 #define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
25 typedef struct ia64_fptr {
26 unsigned long fp;
27 unsigned long gp;
28 } ia64_fptr_t;
30 typedef union cmcv_reg_u {
31 u64 cmcv_regval;
32 struct {
33 u64 cmcr_vector : 8;
34 u64 cmcr_reserved1 : 4;
35 u64 cmcr_ignored1 : 1;
36 u64 cmcr_reserved2 : 3;
37 u64 cmcr_mask : 1;
38 u64 cmcr_ignored2 : 47;
39 } cmcv_reg_s;
41 } cmcv_reg_t;
43 #define cmcv_mask cmcv_reg_s.cmcr_mask
44 #define cmcv_vector cmcv_reg_s.cmcr_vector
46 enum {
47 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
48 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1
51 /* the following data structure is used for TLB error recovery purposes */
52 extern struct ia64_mca_tlb_info {
53 u64 cr_lid;
54 u64 percpu_paddr;
55 u64 ptce_base;
56 u32 ptce_count[2];
57 u32 ptce_stride[2];
58 u64 pal_paddr;
59 u64 pal_base;
60 } ia64_mca_tlb_list[NR_CPUS];
62 /* Information maintained by the MC infrastructure */
63 typedef struct ia64_mc_info_s {
64 u64 imi_mca_handler;
65 size_t imi_mca_handler_size;
66 u64 imi_monarch_init_handler;
67 size_t imi_monarch_init_handler_size;
68 u64 imi_slave_init_handler;
69 size_t imi_slave_init_handler_size;
70 u8 imi_rendez_checkin[NR_CPUS];
72 } ia64_mc_info_t;
74 typedef struct ia64_mca_sal_to_os_state_s {
75 u64 imsto_os_gp; /* GP of the os registered with the SAL */
76 u64 imsto_pal_proc; /* PAL_PROC entry point - physical addr */
77 u64 imsto_sal_proc; /* SAL_PROC entry point - physical addr */
78 u64 imsto_sal_gp; /* GP of the SAL - physical */
79 u64 imsto_rendez_state; /* Rendez state information */
80 u64 imsto_sal_check_ra; /* Return address in SAL_CHECK while going
81 * back to SAL from OS after MCA handling.
83 u64 pal_min_state; /* from PAL in r17 */
84 u64 proc_state_param; /* from PAL in r18. See SDV 2:268 11.3.2.1 */
85 } ia64_mca_sal_to_os_state_t;
87 enum {
88 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
89 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
90 IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
91 IA64_MCA_HALT = -3 /* System to be halted by SAL */
94 enum {
95 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
96 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
99 typedef struct ia64_mca_os_to_sal_state_s {
100 u64 imots_os_status; /* OS status to SAL as to what happened
101 * with the MCA handling.
103 u64 imots_sal_gp; /* GP of the SAL - physical */
104 u64 imots_context; /* 0 if return to same context
105 1 if return to new context */
106 u64 *imots_new_min_state; /* Pointer to structure containing
107 * new values of registers in the min state
108 * save area.
110 u64 imots_sal_check_ra; /* Return address in SAL_CHECK while going
111 * back to SAL from OS after MCA handling.
113 } ia64_mca_os_to_sal_state_t;
115 extern void ia64_mca_init(void);
116 extern void ia64_os_mca_dispatch(void);
117 extern void ia64_os_mca_dispatch_end(void);
118 extern void ia64_mca_ucmc_handler(void);
119 extern void ia64_monarch_init_handler(void);
120 extern void ia64_slave_init_handler(void);
121 extern void ia64_mca_cmc_vector_setup(void);
122 extern int ia64_reg_MCA_extension(void*);
123 extern void ia64_unreg_MCA_extension(void);
125 #endif /* !__ASSEMBLY__ */
126 #endif /* _ASM_IA64_MCA_H */