include/linux/mtd/cfi.h

   1
   2 /* Common Flash Interface structures
   3  * See http://support.intel.com/design/flash/technote/index.htm
   4  * $Id: cfi.h,v 1.45 2004/07/20 02:44:27 dwmw2 Exp $
   5  */
   6
   7 #ifndef __MTD_CFI_H__
   8 #define __MTD_CFI_H__
   9
  10 #include <linux/config.h>
  11 #include <linux/version.h>
  12 #include <linux/delay.h>
  13 #include <linux/types.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/mtd/flashchip.h>
  16 #include <linux/mtd/map.h>
  17 #include <linux/mtd/cfi_endian.h>
  18
  19 #ifdef CONFIG_MTD_CFI_I1
  20 #define cfi_interleave(cfi) 1
  21 #define cfi_interleave_is_1(cfi) (cfi_interleave(cfi) == 1)
  22 #else
  23 #define cfi_interleave_is_1(cfi) (0)
  24 #endif
  25
  26 #ifdef CONFIG_MTD_CFI_I2
  27 # ifdef cfi_interleave
  28 #  undef cfi_interleave
  29 #  define cfi_interleave(cfi) ((cfi)->interleave)
  30 # else
  31 #  define cfi_interleave(cfi) 2
  32 # endif
  33 #define cfi_interleave_is_2(cfi) (cfi_interleave(cfi) == 2)
  34 #else
  35 #define cfi_interleave_is_2(cfi) (0)
  36 #endif
  37
  38 #ifdef CONFIG_MTD_CFI_I4
  39 # ifdef cfi_interleave
  40 #  undef cfi_interleave
  41 #  define cfi_interleave(cfi) ((cfi)->interleave)
  42 # else
  43 #  define cfi_interleave(cfi) 4
  44 # endif
  45 #define cfi_interleave_is_4(cfi) (cfi_interleave(cfi) == 4)
  46 #else
  47 #define cfi_interleave_is_4(cfi) (0)
  48 #endif
  49
  50 #ifdef CONFIG_MTD_CFI_I8
  51 # ifdef cfi_interleave
  52 #  undef cfi_interleave
  53 #  define cfi_interleave(cfi) ((cfi)->interleave)
  54 # else
  55 #  define cfi_interleave(cfi) 8
  56 # endif
  57 #define cfi_interleave_is_8(cfi) (cfi_interleave(cfi) == 8)
  58 #else
  59 #define cfi_interleave_is_8(cfi) (0)
  60 #endif
  61
  62 static inline int cfi_interleave_supported(int i)
  63 {
  64         switch (i) {
  65 #ifdef CONFIG_MTD_CFI_I1
  66         case 1:
  67 #endif
  68 #ifdef CONFIG_MTD_CFI_I2
  69         case 2:
  70 #endif
  71 #ifdef CONFIG_MTD_CFI_I4
  72         case 4:
  73 #endif
  74 #ifdef CONFIG_MTD_CFI_I8
  75         case 8:
  76 #endif
  77                 return 1;
  78
  79         default:
  80                 return 0;
  81         }
  82 }
  83
  84
  85 /* NB: these values must represents the number of bytes needed to meet the
  86  *     device type (x8, x16, x32).  Eg. a 32 bit device is 4 x 8 bytes.
  87  *     These numbers are used in calculations.
  88  */
  89 #define CFI_DEVICETYPE_X8  (8 / 8)
  90 #define CFI_DEVICETYPE_X16 (16 / 8)
  91 #define CFI_DEVICETYPE_X32 (32 / 8)
  92 #define CFI_DEVICETYPE_X64 (64 / 8)
  93
  94 /* NB: We keep these structures in memory in HOST byteorder, except
  95  * where individually noted.
  96  */
  97
  98 /* Basic Query Structure */
  99 struct cfi_ident {
 100         uint8_t  qry[3];
 101         uint16_t P_ID;
 102         uint16_t P_ADR;
 103         uint16_t A_ID;
 104         uint16_t A_ADR;
 105         uint8_t  VccMin;
 106         uint8_t  VccMax;
 107         uint8_t  VppMin;
 108         uint8_t  VppMax;
 109         uint8_t  WordWriteTimeoutTyp;
 110         uint8_t  BufWriteTimeoutTyp;
 111         uint8_t  BlockEraseTimeoutTyp;
 112         uint8_t  ChipEraseTimeoutTyp;
 113         uint8_t  WordWriteTimeoutMax;
 114         uint8_t  BufWriteTimeoutMax;
 115         uint8_t  BlockEraseTimeoutMax;
 116         uint8_t  ChipEraseTimeoutMax;
 117         uint8_t  DevSize;
 118         uint16_t InterfaceDesc;
 119         uint16_t MaxBufWriteSize;
 120         uint8_t  NumEraseRegions;
 121         uint32_t EraseRegionInfo[0]; /* Not host ordered */
 122 } __attribute__((packed));
 123
 124 /* Extended Query Structure for both PRI and ALT */
 125
 126 struct cfi_extquery {
 127         uint8_t  pri[3];
 128         uint8_t  MajorVersion;
 129         uint8_t  MinorVersion;
 130 } __attribute__((packed));
 131
 132 /* Vendor-Specific PRI for Intel/Sharp Extended Command Set (0x0001) */
 133
 134 struct cfi_pri_intelext {
 135         uint8_t  pri[3];
 136         uint8_t  MajorVersion;
 137         uint8_t  MinorVersion;
 138         uint32_t FeatureSupport; /* if bit 31 is set then an additional uint32_t feature
 139                                     block follows - FIXME - not currently supported */
 140         uint8_t  SuspendCmdSupport;
 141         uint16_t BlkStatusRegMask;
 142         uint8_t  VccOptimal;
 143         uint8_t  VppOptimal;
 144         uint8_t  NumProtectionFields;
 145         uint16_t ProtRegAddr;
 146         uint8_t  FactProtRegSize;
 147         uint8_t  UserProtRegSize;
 148 } __attribute__((packed));
 149
 150 /* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */
 151
 152 struct cfi_pri_amdstd {
 153         uint8_t  pri[3];
 154         uint8_t  MajorVersion;
 155         uint8_t  MinorVersion;
 156         uint8_t  SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
 157         uint8_t  EraseSuspend;
 158         uint8_t  BlkProt;
 159         uint8_t  TmpBlkUnprotect;
 160         uint8_t  BlkProtUnprot;
 161         uint8_t  SimultaneousOps;
 162         uint8_t  BurstMode;
 163         uint8_t  PageMode;
 164         uint8_t  VppMin;
 165         uint8_t  VppMax;
 166         uint8_t  TopBottom;
 167 } __attribute__((packed));
 168
 169 struct cfi_pri_query {
 170         uint8_t  NumFields;
 171         uint32_t ProtField[1]; /* Not host ordered */
 172 } __attribute__((packed));
 173
 174 struct cfi_bri_query {
 175         uint8_t  PageModeReadCap;
 176         uint8_t  NumFields;
 177         uint32_t ConfField[1]; /* Not host ordered */
 178 } __attribute__((packed));
 179
 180 #define P_ID_NONE 0
 181 #define P_ID_INTEL_EXT 1
 182 #define P_ID_AMD_STD 2
 183 #define P_ID_INTEL_STD 3
 184 #define P_ID_AMD_EXT 4
 185 #define P_ID_ST_ADV 32
 186 #define P_ID_MITSUBISHI_STD 256
 187 #define P_ID_MITSUBISHI_EXT 257
 188 #define P_ID_SST_PAGE 258
 189 #define P_ID_RESERVED 65535
 190
 191
 192 #define CFI_MODE_CFI    1
 193 #define CFI_MODE_JEDEC  0
 194
 195 struct cfi_private {
 196         uint16_t cmdset;
 197         void *cmdset_priv;
 198         int interleave;
 199         int device_type;
 200         int cfi_mode;           /* Are we a JEDEC device pretending to be CFI? */
 201         int addr_unlock1;
 202         int addr_unlock2;
 203         struct mtd_info *(*cmdset_setup)(struct map_info *);
 204         struct cfi_ident *cfiq; /* For now only one. We insist that all devs
 205                                   must be of the same type. */
 206         int mfr, id;
 207         int numchips;
 208         unsigned long chipshift; /* Because they're of the same type */
 209         const char *im_name;     /* inter_module name for cmdset_setup */
 210         struct flchip chips[0];  /* per-chip data structure for each chip */
 211 };
 212
 213 /*
 214  * Returns the command address according to the given geometry.
 215  */
 216 static inline uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs, int interleave, int type)
 217 {
 218         return (cmd_ofs * type) * interleave;
 219 }
 220
 221 /*
 222  * Transforms the CFI command for the given geometry (bus width & interleave).
 223  * It looks too long to be inline, but in the common case it should almost all
 224  * get optimised away.
 225  */
 226 static inline map_word cfi_build_cmd(u_char cmd, struct map_info *map, struct cfi_private *cfi)
 227 {
 228         map_word val = { {0} };
 229         int wordwidth, words_per_bus, chip_mode, chips_per_word;
 230         unsigned long onecmd;
 231         int i;
 232
 233         /* We do it this way to give the compiler a fighting chance
 234            of optimising away all the crap for 'bankwidth' larger than
 235            an unsigned long, in the common case where that support is
 236            disabled */
 237         if (map_bankwidth_is_large(map)) {
 238                 wordwidth = sizeof(unsigned long);
 239                 words_per_bus = (map_bankwidth(map)) / wordwidth; // i.e. normally 1
 240         } else {
 241                 wordwidth = map_bankwidth(map);
 242                 words_per_bus = 1;
 243         }
 244
 245         chip_mode = map_bankwidth(map) / cfi_interleave(cfi);
 246         chips_per_word = wordwidth * cfi_interleave(cfi) / map_bankwidth(map);
 247
 248         /* First, determine what the bit-pattern should be for a single
 249            device, according to chip mode and endianness... */
 250         switch (chip_mode) {
 251         default: BUG();
 252         case 1:
 253                 onecmd = cmd;
 254                 break;
 255         case 2:
 256                 onecmd = cpu_to_cfi16(cmd);
 257                 break;
 258         case 4:
 259                 onecmd = cpu_to_cfi32(cmd);
 260                 break;
 261         }
 262
 263         /* Now replicate it across the size of an unsigned long, or
 264            just to the bus width as appropriate */
 265         switch (chips_per_word) {
 266         default: BUG();
 267 #if BITS_PER_LONG >= 64
 268         case 8:
 269                 onecmd |= (onecmd << (chip_mode * 32));
 270 #endif
 271         case 4:
 272                 onecmd |= (onecmd << (chip_mode * 16));
 273         case 2:
 274                 onecmd |= (onecmd << (chip_mode * 8));
 275         case 1:
 276                 ;
 277         }
 278
 279         /* And finally, for the multi-word case, replicate it
 280            in all words in the structure */
 281         for (i=0; i < words_per_bus; i++) {
 282                 val.x[i] = onecmd;
 283         }
 284
 285         return val;
 286 }
 287 #define CMD(x)  cfi_build_cmd((x), map, cfi)
 288
 289 /*
 290  * Sends a CFI command to a bank of flash for the given geometry.
 291  *
 292  * Returns the offset in flash where the command was written.
 293  * If prev_val is non-null, it will be set to the value at the command address,
 294  * before the command was written.
 295  */
 296 static inline uint32_t cfi_send_gen_cmd(u_char cmd, uint32_t cmd_addr, uint32_t base,
 297                                 struct map_info *map, struct cfi_private *cfi,
 298                                 int type, map_word *prev_val)
 299 {
 300         map_word val;
 301         uint32_t addr = base + cfi_build_cmd_addr(cmd_addr, cfi_interleave(cfi), type);
 302
 303         val = cfi_build_cmd(cmd, map, cfi);
 304
 305         if (prev_val)
 306                 *prev_val = map_read(map, addr);
 307
 308         map_write(map, val, addr);
 309
 310         return addr - base;
 311 }
 312
 313 static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
 314 {
 315         map_word val = map_read(map, addr);
 316
 317         if (map_bankwidth_is_1(map)) {
 318                 return val.x[0];
 319         } else if (map_bankwidth_is_2(map)) {
 320                 return cfi16_to_cpu(val.x[0]);
 321         } else {
 322                 /* No point in a 64-bit byteswap since that would just be
 323                    swapping the responses from different chips, and we are
 324                    only interested in one chip (a representative sample) */
 325                 return cfi32_to_cpu(val.x[0]);
 326         }
 327 }
 328
 329 static inline void cfi_udelay(int us)
 330 {
 331         unsigned long t = us * HZ / 1000000;
 332         if (t) {
 333                 set_current_state(TASK_UNINTERRUPTIBLE);
 334                 schedule_timeout(t);
 335                 return;
 336         }
 337         udelay(us);
 338         cond_resched();
 339 }
 340
 341 static inline void cfi_spin_lock(spinlock_t *mutex)
 342 {
 343         spin_lock_bh(mutex);
 344 }
 345
 346 static inline void cfi_spin_unlock(spinlock_t *mutex)
 347 {
 348         spin_unlock_bh(mutex);
 349 }
 350
 351 struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size,
 352                              const char* name);
 353
 354 struct cfi_fixup {
 355         uint16_t mfr;
 356         uint16_t id;
 357         void (*fixup)(struct map_info *map, void* param);
 358         void* param;
 359 };
 360
 361 #define CFI_MFR_ANY 0xffff
 362 #define CFI_ID_ANY  0xffff
 363
 364 void cfi_fixup(struct map_info *map, struct cfi_fixup* fixups);
 365
 366 #endif /* __MTD_CFI_H__ */