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1 /*
2 * linux/arch/arm/mach-sa1100/sa1111.c
4 * SA1111 support
6 * Original code by John Dorsey
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This file contains all generic SA1111 support.
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
17 #include <linux/config.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/delay.h>
22 #include <linux/ptrace.h>
23 #include <linux/errno.h>
24 #include <linux/ioport.h>
25 #include <linux/device.h>
26 #include <linux/slab.h>
27 #include <linux/spinlock.h>
28 #include <linux/dma-mapping.h>
30 #include <asm/hardware.h>
31 #include <asm/mach-types.h>
32 #include <asm/io.h>
33 #include <asm/irq.h>
34 #include <asm/mach/irq.h>
36 #include <asm/hardware/sa1111.h>
38 #ifdef CONFIG_ARCH_PXA
39 #include <asm/arch/pxa-regs.h>
40 #endif
42 extern void __init sa1110_mb_enable(void);
45 * We keep the following data for the overall SA1111. Note that the
46 * struct device and struct resource are "fake"; they should be supplied
47 * by the bus above us. However, in the interests of getting all SA1111
48 * drivers converted over to the device model, we provide this as an
49 * anchor point for all the other drivers.
51 struct sa1111 {
52 struct device *dev;
53 unsigned long phys;
54 int irq;
55 spinlock_t lock;
56 void *base;
60 * We _really_ need to eliminate this. Its only users
61 * are the PWM and DMA checking code.
63 static struct sa1111 *g_sa1111;
65 struct sa1111_dev_info {
66 unsigned long offset;
67 unsigned long skpcr_mask;
68 unsigned int devid;
69 unsigned int irq[6];
72 static struct sa1111_dev_info sa1111_devices[] = {
74 .offset = SA1111_USB,
75 .skpcr_mask = SKPCR_UCLKEN,
76 .devid = SA1111_DEVID_USB,
77 .irq = {
78 IRQ_USBPWR,
79 IRQ_HCIM,
80 IRQ_HCIBUFFACC,
81 IRQ_HCIRMTWKP,
82 IRQ_NHCIMFCIR,
83 IRQ_USB_PORT_RESUME
87 .offset = 0x0600,
88 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
89 .devid = SA1111_DEVID_SAC,
90 .irq = {
91 AUDXMTDMADONEA,
92 AUDXMTDMADONEB,
93 AUDRCVDMADONEA,
94 AUDRCVDMADONEB
98 .offset = 0x0800,
99 .skpcr_mask = SKPCR_SCLKEN,
100 .devid = SA1111_DEVID_SSP,
103 .offset = SA1111_KBD,
104 .skpcr_mask = SKPCR_PTCLKEN,
105 .devid = SA1111_DEVID_PS2,
106 .irq = {
107 IRQ_TPRXINT,
108 IRQ_TPTXINT
112 .offset = SA1111_MSE,
113 .skpcr_mask = SKPCR_PMCLKEN,
114 .devid = SA1111_DEVID_PS2,
115 .irq = {
116 IRQ_MSRXINT,
117 IRQ_MSTXINT
121 .offset = 0x1800,
122 .skpcr_mask = 0,
123 .devid = SA1111_DEVID_PCMCIA,
124 .irq = {
125 IRQ_S0_READY_NINT,
126 IRQ_S0_CD_VALID,
127 IRQ_S0_BVD1_STSCHG,
128 IRQ_S1_READY_NINT,
129 IRQ_S1_CD_VALID,
130 IRQ_S1_BVD1_STSCHG,
136 * SA1111 interrupt support. Since clearing an IRQ while there are
137 * active IRQs causes the interrupt output to pulse, the upper levels
138 * will call us again if there are more interrupts to process.
140 static void
141 sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
143 unsigned int stat0, stat1, i;
145 stat0 = sa1111_readl(desc->data + SA1111_INTSTATCLR0);
146 stat1 = sa1111_readl(desc->data + SA1111_INTSTATCLR1);
148 sa1111_writel(stat0, desc->data + SA1111_INTSTATCLR0);
150 desc->chip->ack(irq);
152 sa1111_writel(stat1, desc->data + SA1111_INTSTATCLR1);
154 if (stat0 == 0 && stat1 == 0) {
155 do_bad_IRQ(irq, desc, regs);
156 return;
159 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
160 if (stat0 & 1)
161 do_edge_IRQ(i, irq_desc + i, regs);
163 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
164 if (stat1 & 1)
165 do_edge_IRQ(i, irq_desc + i, regs);
167 /* For level-based interrupts */
168 desc->chip->unmask(irq);
171 #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
172 #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
174 static void sa1111_ack_irq(unsigned int irq)
178 static void sa1111_mask_lowirq(unsigned int irq)
180 void *mapbase = get_irq_chipdata(irq);
181 unsigned long ie0;
183 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
184 ie0 &= ~SA1111_IRQMASK_LO(irq);
185 writel(ie0, mapbase + SA1111_INTEN0);
188 static void sa1111_unmask_lowirq(unsigned int irq)
190 void *mapbase = get_irq_chipdata(irq);
191 unsigned long ie0;
193 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
194 ie0 |= SA1111_IRQMASK_LO(irq);
195 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
199 * Attempt to re-trigger the interrupt. The SA1111 contains a register
200 * (INTSET) which claims to do this. However, in practice no amount of
201 * manipulation of INTEN and INTSET guarantees that the interrupt will
202 * be triggered. In fact, its very difficult, if not impossible to get
203 * INTSET to re-trigger the interrupt.
205 static int sa1111_retrigger_lowirq(unsigned int irq)
207 unsigned int mask = SA1111_IRQMASK_LO(irq);
208 void *mapbase = get_irq_chipdata(irq);
209 unsigned long ip0;
210 int i;
212 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
213 for (i = 0; i < 8; i++) {
214 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
215 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
216 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
217 break;
220 if (i == 8)
221 printk(KERN_ERR "Danger Will Robinson: failed to "
222 "re-trigger IRQ%d\n", irq);
223 return i == 8 ? -1 : 0;
226 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
228 unsigned int mask = SA1111_IRQMASK_LO(irq);
229 void *mapbase = get_irq_chipdata(irq);
230 unsigned long ip0;
232 if (flags == IRQT_PROBE)
233 return 0;
235 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
236 return -EINVAL;
238 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
239 if (flags & __IRQT_RISEDGE)
240 ip0 &= ~mask;
241 else
242 ip0 |= mask;
243 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
244 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
246 return 0;
249 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
251 unsigned int mask = SA1111_IRQMASK_LO(irq);
252 void *mapbase = get_irq_chipdata(irq);
253 unsigned long we0;
255 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
256 if (on)
257 we0 |= mask;
258 else
259 we0 &= ~mask;
260 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
262 return 0;
265 static struct irqchip sa1111_low_chip = {
266 .ack = sa1111_ack_irq,
267 .mask = sa1111_mask_lowirq,
268 .unmask = sa1111_unmask_lowirq,
269 .retrigger = sa1111_retrigger_lowirq,
270 .type = sa1111_type_lowirq,
271 .wake = sa1111_wake_lowirq,
274 static void sa1111_mask_highirq(unsigned int irq)
276 void *mapbase = get_irq_chipdata(irq);
277 unsigned long ie1;
279 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
280 ie1 &= ~SA1111_IRQMASK_HI(irq);
281 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
284 static void sa1111_unmask_highirq(unsigned int irq)
286 void *mapbase = get_irq_chipdata(irq);
287 unsigned long ie1;
289 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
290 ie1 |= SA1111_IRQMASK_HI(irq);
291 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
295 * Attempt to re-trigger the interrupt. The SA1111 contains a register
296 * (INTSET) which claims to do this. However, in practice no amount of
297 * manipulation of INTEN and INTSET guarantees that the interrupt will
298 * be triggered. In fact, its very difficult, if not impossible to get
299 * INTSET to re-trigger the interrupt.
301 static int sa1111_retrigger_highirq(unsigned int irq)
303 unsigned int mask = SA1111_IRQMASK_HI(irq);
304 void *mapbase = get_irq_chipdata(irq);
305 unsigned long ip1;
306 int i;
308 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
309 for (i = 0; i < 8; i++) {
310 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
311 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
312 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
313 break;
316 if (i == 8)
317 printk(KERN_ERR "Danger Will Robinson: failed to "
318 "re-trigger IRQ%d\n", irq);
319 return i == 8 ? -1 : 0;
322 static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
324 unsigned int mask = SA1111_IRQMASK_HI(irq);
325 void *mapbase = get_irq_chipdata(irq);
326 unsigned long ip1;
328 if (flags == IRQT_PROBE)
329 return 0;
331 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
332 return -EINVAL;
334 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
335 if (flags & __IRQT_RISEDGE)
336 ip1 &= ~mask;
337 else
338 ip1 |= mask;
339 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
340 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
342 return 0;
345 static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
347 unsigned int mask = SA1111_IRQMASK_HI(irq);
348 void *mapbase = get_irq_chipdata(irq);
349 unsigned long we1;
351 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
352 if (on)
353 we1 |= mask;
354 else
355 we1 &= ~mask;
356 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
358 return 0;
361 static struct irqchip sa1111_high_chip = {
362 .ack = sa1111_ack_irq,
363 .mask = sa1111_mask_highirq,
364 .unmask = sa1111_unmask_highirq,
365 .retrigger = sa1111_retrigger_highirq,
366 .type = sa1111_type_highirq,
367 .wake = sa1111_wake_highirq,
370 static void sa1111_setup_irq(struct sa1111 *sachip)
372 void *irqbase = sachip->base + SA1111_INTC;
373 unsigned int irq;
376 * We're guaranteed that this region hasn't been taken.
378 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
380 /* disable all IRQs */
381 sa1111_writel(0, irqbase + SA1111_INTEN0);
382 sa1111_writel(0, irqbase + SA1111_INTEN1);
383 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
384 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
387 * detect on rising edge. Note: Feb 2001 Errata for SA1111
388 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
390 sa1111_writel(0, irqbase + SA1111_INTPOL0);
391 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
392 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
393 irqbase + SA1111_INTPOL1);
395 /* clear all IRQs */
396 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
397 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
399 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
400 set_irq_chip(irq, &sa1111_low_chip);
401 set_irq_chipdata(irq, irqbase);
402 set_irq_handler(irq, do_edge_IRQ);
403 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
406 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
407 set_irq_chip(irq, &sa1111_high_chip);
408 set_irq_chipdata(irq, irqbase);
409 set_irq_handler(irq, do_edge_IRQ);
410 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
414 * Register SA1111 interrupt
416 set_irq_type(sachip->irq, IRQT_RISING);
417 set_irq_data(sachip->irq, irqbase);
418 set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
422 * Bring the SA1111 out of reset. This requires a set procedure:
423 * 1. nRESET asserted (by hardware)
424 * 2. CLK turned on from SA1110
425 * 3. nRESET deasserted
426 * 4. VCO turned on, PLL_BYPASS turned off
427 * 5. Wait lock time, then assert RCLKEn
428 * 7. PCR set to allow clocking of individual functions
430 * Until we've done this, the only registers we can access are:
431 * SBI_SKCR
432 * SBI_SMCR
433 * SBI_SKID
435 static void sa1111_wake(struct sa1111 *sachip)
437 unsigned long flags, r;
439 spin_lock_irqsave(&sachip->lock, flags);
441 #ifdef CONFIG_ARCH_SA1100
443 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
444 * (SA-1110 Developer's Manual, section 9.1.2.1)
446 GAFR |= GPIO_32_768kHz;
447 GPDR |= GPIO_32_768kHz;
448 TUCR = TUCR_3_6864MHz;
449 #elif CONFIG_ARCH_PXA
450 pxa_gpio_mode(GPIO11_3_6MHz_MD);
451 #else
452 #error missing clock setup
453 #endif
456 * Turn VCO on, and disable PLL Bypass.
458 r = sa1111_readl(sachip->base + SA1111_SKCR);
459 r &= ~SKCR_VCO_OFF;
460 sa1111_writel(r, sachip->base + SA1111_SKCR);
461 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
462 sa1111_writel(r, sachip->base + SA1111_SKCR);
465 * Wait lock time. SA1111 manual _doesn't_
466 * specify a figure for this! We choose 100us.
468 udelay(100);
471 * Enable RCLK. We also ensure that RDYEN is set.
473 r |= SKCR_RCLKEN | SKCR_RDYEN;
474 sa1111_writel(r, sachip->base + SA1111_SKCR);
477 * Wait 14 RCLK cycles for the chip to finish coming out
478 * of reset. (RCLK=24MHz). This is 590ns.
480 udelay(1);
483 * Ensure all clocks are initially off.
485 sa1111_writel(0, sachip->base + SA1111_SKPCR);
487 spin_unlock_irqrestore(&sachip->lock, flags);
490 #ifdef CONFIG_ARCH_SA1100
492 static u32 sa1111_dma_mask[] = {
494 ~(1 << 20),
495 ~(1 << 23),
496 ~(1 << 24),
497 ~(1 << 25),
498 ~(1 << 20),
499 ~(1 << 20),
504 * Configure the SA1111 shared memory controller.
506 void
507 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
508 unsigned int cas_latency)
510 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
512 if (cas_latency == 3)
513 smcr |= SMCR_CLAT;
515 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
518 * Now clear the bits in the DMA mask to work around the SA1111
519 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
520 * Chip Specification Update, June 2000, Erratum #7).
522 if (sachip->dev->dma_mask)
523 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
525 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
528 #endif
530 static void sa1111_dev_release(struct device *_dev)
532 struct sa1111_dev *dev = SA1111_DEV(_dev);
534 release_resource(&dev->res);
535 kfree(dev);
538 static int
539 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
540 struct sa1111_dev_info *info)
542 struct sa1111_dev *dev;
543 int ret;
545 dev = kmalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
546 if (!dev) {
547 ret = -ENOMEM;
548 goto out;
550 memset(dev, 0, sizeof(struct sa1111_dev));
552 snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id),
553 "%4.4lx", info->offset);
555 dev->devid = info->devid;
556 dev->dev.parent = sachip->dev;
557 dev->dev.bus = &sa1111_bus_type;
558 dev->dev.release = sa1111_dev_release;
559 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
560 dev->res.start = sachip->phys + info->offset;
561 dev->res.end = dev->res.start + 511;
562 dev->res.name = dev->dev.bus_id;
563 dev->res.flags = IORESOURCE_MEM;
564 dev->mapbase = sachip->base + info->offset;
565 dev->skpcr_mask = info->skpcr_mask;
566 memmove(dev->irq, info->irq, sizeof(dev->irq));
569 * If the parent device has a DMA mask associated with it,
570 * propagate it down to the children.
572 if (sachip->dev->dma_mask) {
573 dev->dma_mask = *sachip->dev->dma_mask;
574 dev->dev.dma_mask = &dev->dma_mask;
576 if (dev->dma_mask != 0xffffffffUL) {
577 ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
578 if (ret) {
579 printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
584 ret = request_resource(parent, &dev->res);
585 if (ret) {
586 printk("SA1111: failed to allocate resource for %s\n",
587 dev->res.name);
588 kfree(dev);
589 goto out;
593 ret = device_register(&dev->dev);
594 if (ret) {
595 release_resource(&dev->res);
596 kfree(dev);
597 goto out;
601 * If the parent device has a DMA mask associated with it,
602 * propagate it down to the children.
604 if (sachip->dev->dma_mask) {
605 dev->dma_mask = *sachip->dev->dma_mask;
606 dev->dev.dma_mask = &dev->dma_mask;
608 if (dev->dma_mask != 0xffffffffUL) {
609 ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
610 if (ret) {
611 printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
612 device_unregister(&dev->dev);
617 out:
618 return ret;
622 * sa1111_probe - probe for a single SA1111 chip.
623 * @phys_addr: physical address of device.
625 * Probe for a SA1111 chip. This must be called
626 * before any other SA1111-specific code.
628 * Returns:
629 * %-ENODEV device not found.
630 * %-EBUSY physical address already marked in-use.
631 * %0 successful.
633 static int
634 __sa1111_probe(struct device *me, struct resource *mem, int irq)
636 struct sa1111 *sachip;
637 unsigned long id;
638 unsigned int has_devs, val;
639 int i, ret = -ENODEV;
641 sachip = kmalloc(sizeof(struct sa1111), GFP_KERNEL);
642 if (!sachip)
643 return -ENOMEM;
645 memset(sachip, 0, sizeof(struct sa1111));
647 spin_lock_init(&sachip->lock);
649 sachip->dev = me;
650 dev_set_drvdata(sachip->dev, sachip);
652 sachip->phys = mem->start;
653 sachip->irq = irq;
656 * Map the whole region. This also maps the
657 * registers for our children.
659 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
660 if (!sachip->base) {
661 ret = -ENOMEM;
662 goto out;
666 * Probe for the chip. Only touch the SBI registers.
668 id = sa1111_readl(sachip->base + SA1111_SKID);
669 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
670 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
671 ret = -ENODEV;
672 goto unmap;
675 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
676 "silicon revision %lx, metal revision %lx\n",
677 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
680 * We found it. Wake the chip up, and initialise.
682 sa1111_wake(sachip);
684 #ifdef CONFIG_ARCH_SA1100
686 * The SDRAM configuration of the SA1110 and the SA1111 must
687 * match. This is very important to ensure that SA1111 accesses
688 * don't corrupt the SDRAM. Note that this ungates the SA1111's
689 * MBGNT signal, so we must have called sa1110_mb_disable()
690 * beforehand.
692 sa1111_configure_smc(sachip, 1,
693 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
694 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
697 * We only need to turn on DCLK whenever we want to use the
698 * DMA. It can otherwise be held firmly in the off position.
699 * (currently, we always enable it.)
701 val = sa1111_readl(sachip->base + SA1111_SKPCR);
702 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
705 * Enable the SA1110 memory bus request and grant signals.
707 sa1110_mb_enable();
708 #endif
711 * The interrupt controller must be initialised before any
712 * other device to ensure that the interrupts are available.
714 if (sachip->irq != NO_IRQ)
715 sa1111_setup_irq(sachip);
717 g_sa1111 = sachip;
719 has_devs = ~0;
720 if (machine_is_assabet() || machine_is_jornada720() ||
721 machine_is_badge4())
722 has_devs &= ~(1 << 4);
723 else
724 has_devs &= ~(1 << 1);
726 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
727 if (has_devs & (1 << i))
728 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
730 return 0;
732 unmap:
733 iounmap(sachip->base);
734 out:
735 kfree(sachip);
736 return ret;
739 static void __sa1111_remove(struct sa1111 *sachip)
741 struct list_head *l, *n;
742 void *irqbase = sachip->base + SA1111_INTC;
744 list_for_each_safe(l, n, &sachip->dev->children) {
745 struct device *d = list_to_dev(l);
747 device_unregister(d);
750 /* disable all IRQs */
751 sa1111_writel(0, irqbase + SA1111_INTEN0);
752 sa1111_writel(0, irqbase + SA1111_INTEN1);
753 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
754 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
756 if (sachip->irq != NO_IRQ) {
757 set_irq_chained_handler(sachip->irq, NULL);
758 set_irq_data(sachip->irq, NULL);
760 release_mem_region(sachip->phys + SA1111_INTC, 512);
763 iounmap(sachip->base);
764 kfree(sachip);
768 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
769 * Chip Specification Update" (June 2000), erratum #7, there is a
770 * significant bug in the SA1111 SDRAM shared memory controller. If
771 * an access to a region of memory above 1MB relative to the bank base,
772 * it is important that address bit 10 _NOT_ be asserted. Depending
773 * on the configuration of the RAM, bit 10 may correspond to one
774 * of several different (processor-relative) address bits.
776 * This routine only identifies whether or not a given DMA address
777 * is susceptible to the bug.
779 * This should only get called for sa1111_device types due to the
780 * way we configure our device dma_masks.
782 int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
785 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
786 * User's Guide" mentions that jumpers R51 and R52 control the
787 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
788 * SDRAM bank 1 on Neponset). The default configuration selects
789 * Assabet, so any address in bank 1 is necessarily invalid.
791 return ((machine_is_assabet() || machine_is_pfs168()) &&
792 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000));
795 struct sa1111_save_data {
796 unsigned int skcr;
797 unsigned int skpcr;
798 unsigned int skcdr;
799 unsigned char skaud;
800 unsigned char skpwm0;
801 unsigned char skpwm1;
804 * Interrupt controller
806 unsigned int intpol0;
807 unsigned int intpol1;
808 unsigned int inten0;
809 unsigned int inten1;
810 unsigned int wakepol0;
811 unsigned int wakepol1;
812 unsigned int wakeen0;
813 unsigned int wakeen1;
816 static int sa1111_suspend(struct device *dev, u32 state, u32 level)
818 struct sa1111 *sachip = dev_get_drvdata(dev);
819 struct sa1111_save_data *save;
820 unsigned long flags;
821 unsigned int val;
822 char *base;
824 if (level != SUSPEND_DISABLE)
825 return 0;
827 dev->saved_state = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
828 if (!dev->saved_state)
829 return -ENOMEM;
831 save = (struct sa1111_save_data *)dev->saved_state;
833 spin_lock_irqsave(&sachip->lock, flags);
836 * Save state.
838 base = sachip->base;
839 save->skcr = sa1111_readl(base + SA1111_SKCR);
840 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
841 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
842 save->skaud = sa1111_readl(base + SA1111_SKAUD);
843 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
844 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
846 base = sachip->base + SA1111_INTC;
847 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
848 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
849 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
850 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
851 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
852 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
853 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
854 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
857 * Disable.
859 val = sa1111_readl(sachip->base + SA1111_SKCR);
860 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
861 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
862 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
864 spin_unlock_irqrestore(&sachip->lock, flags);
866 return 0;
870 * sa1111_resume - Restore the SA1111 device state.
871 * @dev: device to restore
872 * @level: resume level
874 * Restore the general state of the SA1111; clock control and
875 * interrupt controller. Other parts of the SA1111 must be
876 * restored by their respective drivers, and must be called
877 * via LDM after this function.
879 static int sa1111_resume(struct device *dev, u32 level)
881 struct sa1111 *sachip = dev_get_drvdata(dev);
882 struct sa1111_save_data *save;
883 unsigned long flags, id;
884 char *base;
886 if (level != RESUME_ENABLE)
887 return 0;
889 save = (struct sa1111_save_data *)dev->saved_state;
890 if (!save)
891 return 0;
893 spin_lock_irqsave(&sachip->lock, flags);
896 * Ensure that the SA1111 is still here.
897 * FIXME: shouldn't do this here.
899 id = sa1111_readl(sachip->base + SA1111_SKID);
900 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
901 __sa1111_remove(sachip);
902 dev_set_drvdata(dev, NULL);
903 kfree(save);
904 return 0;
908 * First of all, wake up the chip.
910 sa1111_wake(sachip);
911 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
912 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
914 base = sachip->base;
915 sa1111_writel(save->skcr, base + SA1111_SKCR);
916 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
917 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
918 sa1111_writel(save->skaud, base + SA1111_SKAUD);
919 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
920 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
922 base = sachip->base + SA1111_INTC;
923 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
924 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
925 sa1111_writel(save->inten0, base + SA1111_INTEN0);
926 sa1111_writel(save->inten1, base + SA1111_INTEN1);
927 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
928 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
929 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
930 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
932 spin_unlock_irqrestore(&sachip->lock, flags);
934 dev->saved_state = NULL;
935 kfree(save);
937 return 0;
940 static int sa1111_probe(struct device *dev)
942 struct platform_device *pdev = to_platform_device(dev);
943 struct resource *mem;
944 int irq;
946 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
947 if (!mem)
948 return -EINVAL;
949 irq = platform_get_irq(pdev, 0);
951 return __sa1111_probe(dev, mem, irq);
954 static int sa1111_remove(struct device *dev)
956 struct sa1111 *sachip = dev_get_drvdata(dev);
958 if (sachip) {
959 __sa1111_remove(sachip);
960 dev_set_drvdata(dev, NULL);
962 kfree(dev->saved_state);
963 dev->saved_state = NULL;
966 return 0;
970 * Not sure if this should be on the system bus or not yet.
971 * We really want some way to register a system device at
972 * the per-machine level, and then have this driver pick
973 * up the registered devices.
975 * We also need to handle the SDRAM configuration for
976 * PXA250/SA1110 machine classes.
978 static struct device_driver sa1111_device_driver = {
979 .name = "sa1111",
980 .bus = &platform_bus_type,
981 .probe = sa1111_probe,
982 .remove = sa1111_remove,
983 .suspend = sa1111_suspend,
984 .resume = sa1111_resume,
988 * Get the parent device driver (us) structure
989 * from a child function device
991 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
993 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
997 * The bits in the opdiv field are non-linear.
999 static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1001 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1003 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1005 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1007 fbdiv = (skcdr & 0x007f) + 2;
1008 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1009 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1011 return 3686400 * fbdiv / (ipdiv * opdiv);
1015 * sa1111_pll_clock - return the current PLL clock frequency.
1016 * @sadev: SA1111 function block
1018 * BUG: we should look at SKCR. We also blindly believe that
1019 * the chip is being fed with the 3.6864MHz clock.
1021 * Returns the PLL clock in Hz.
1023 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1025 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1027 return __sa1111_pll_clock(sachip);
1031 * sa1111_select_audio_mode - select I2S or AC link mode
1032 * @sadev: SA1111 function block
1033 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1035 * Frob the SKCR to select AC Link mode or I2S mode for
1036 * the audio block.
1038 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1040 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1041 unsigned long flags;
1042 unsigned int val;
1044 spin_lock_irqsave(&sachip->lock, flags);
1046 val = sa1111_readl(sachip->base + SA1111_SKCR);
1047 if (mode == SA1111_AUDIO_I2S) {
1048 val &= ~SKCR_SELAC;
1049 } else {
1050 val |= SKCR_SELAC;
1052 sa1111_writel(val, sachip->base + SA1111_SKCR);
1054 spin_unlock_irqrestore(&sachip->lock, flags);
1058 * sa1111_set_audio_rate - set the audio sample rate
1059 * @sadev: SA1111 SAC function block
1060 * @rate: sample rate to select
1062 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1064 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1065 unsigned int div;
1067 if (sadev->devid != SA1111_DEVID_SAC)
1068 return -EINVAL;
1070 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1071 if (div == 0)
1072 div = 1;
1073 if (div > 128)
1074 div = 128;
1076 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1078 return 0;
1082 * sa1111_get_audio_rate - get the audio sample rate
1083 * @sadev: SA1111 SAC function block device
1085 int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1087 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1088 unsigned long div;
1090 if (sadev->devid != SA1111_DEVID_SAC)
1091 return -EINVAL;
1093 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1095 return __sa1111_pll_clock(sachip) / (256 * div);
1098 void sa1111_set_io_dir(struct sa1111_dev *sadev,
1099 unsigned int bits, unsigned int dir,
1100 unsigned int sleep_dir)
1102 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1103 unsigned long flags;
1104 unsigned int val;
1105 void *gpio = sachip->base + SA1111_GPIO;
1107 #define MODIFY_BITS(port, mask, dir) \
1108 if (mask) { \
1109 val = sa1111_readl(port); \
1110 val &= ~(mask); \
1111 val |= (dir) & (mask); \
1112 sa1111_writel(val, port); \
1115 spin_lock_irqsave(&sachip->lock, flags);
1116 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1117 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1118 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1120 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1121 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1122 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1123 spin_unlock_irqrestore(&sachip->lock, flags);
1126 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1128 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1129 unsigned long flags;
1130 unsigned int val;
1131 void *gpio = sachip->base + SA1111_GPIO;
1133 spin_lock_irqsave(&sachip->lock, flags);
1134 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1135 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1136 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1137 spin_unlock_irqrestore(&sachip->lock, flags);
1140 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1142 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1143 unsigned long flags;
1144 unsigned int val;
1145 void *gpio = sachip->base + SA1111_GPIO;
1147 spin_lock_irqsave(&sachip->lock, flags);
1148 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1149 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1150 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1151 spin_unlock_irqrestore(&sachip->lock, flags);
1155 * Individual device operations.
1159 * sa1111_enable_device - enable an on-chip SA1111 function block
1160 * @sadev: SA1111 function block device to enable
1162 void sa1111_enable_device(struct sa1111_dev *sadev)
1164 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1165 unsigned long flags;
1166 unsigned int val;
1168 spin_lock_irqsave(&sachip->lock, flags);
1169 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1170 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1171 spin_unlock_irqrestore(&sachip->lock, flags);
1175 * sa1111_disable_device - disable an on-chip SA1111 function block
1176 * @sadev: SA1111 function block device to disable
1178 void sa1111_disable_device(struct sa1111_dev *sadev)
1180 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1181 unsigned long flags;
1182 unsigned int val;
1184 spin_lock_irqsave(&sachip->lock, flags);
1185 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1186 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1187 spin_unlock_irqrestore(&sachip->lock, flags);
1191 * SA1111 "Register Access Bus."
1193 * We model this as a regular bus type, and hang devices directly
1194 * off this.
1196 static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1198 struct sa1111_dev *dev = SA1111_DEV(_dev);
1199 struct sa1111_driver *drv = SA1111_DRV(_drv);
1201 return dev->devid == drv->devid;
1204 static int sa1111_bus_suspend(struct device *dev, u32 state)
1206 struct sa1111_dev *sadev = SA1111_DEV(dev);
1207 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1208 int ret = 0;
1210 if (drv && drv->suspend)
1211 ret = drv->suspend(sadev, state);
1212 return ret;
1215 static int sa1111_bus_resume(struct device *dev)
1217 struct sa1111_dev *sadev = SA1111_DEV(dev);
1218 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1219 int ret = 0;
1221 if (drv && drv->resume)
1222 ret = drv->resume(sadev);
1223 return ret;
1226 static int sa1111_bus_probe(struct device *dev)
1228 struct sa1111_dev *sadev = SA1111_DEV(dev);
1229 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1230 int ret = -ENODEV;
1232 if (drv->probe)
1233 ret = drv->probe(sadev);
1234 return ret;
1237 static int sa1111_bus_remove(struct device *dev)
1239 struct sa1111_dev *sadev = SA1111_DEV(dev);
1240 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1241 int ret = 0;
1243 if (drv->remove)
1244 ret = drv->remove(sadev);
1245 return ret;
1248 struct bus_type sa1111_bus_type = {
1249 .name = "sa1111-rab",
1250 .match = sa1111_match,
1251 .suspend = sa1111_bus_suspend,
1252 .resume = sa1111_bus_resume,
1255 int sa1111_driver_register(struct sa1111_driver *driver)
1257 driver->drv.probe = sa1111_bus_probe;
1258 driver->drv.remove = sa1111_bus_remove;
1259 driver->drv.bus = &sa1111_bus_type;
1260 return driver_register(&driver->drv);
1263 void sa1111_driver_unregister(struct sa1111_driver *driver)
1265 driver_unregister(&driver->drv);
1268 static int __init sa1111_init(void)
1270 int ret = bus_register(&sa1111_bus_type);
1271 if (ret == 0)
1272 driver_register(&sa1111_device_driver);
1273 return ret;
1276 static void __exit sa1111_exit(void)
1278 driver_unregister(&sa1111_device_driver);
1279 bus_unregister(&sa1111_bus_type);
1282 module_init(sa1111_init);
1283 module_exit(sa1111_exit);
1285 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1286 MODULE_LICENSE("GPL");
1288 EXPORT_SYMBOL(sa1111_select_audio_mode);
1289 EXPORT_SYMBOL(sa1111_set_audio_rate);
1290 EXPORT_SYMBOL(sa1111_get_audio_rate);
1291 EXPORT_SYMBOL(sa1111_set_io_dir);
1292 EXPORT_SYMBOL(sa1111_set_io);
1293 EXPORT_SYMBOL(sa1111_set_sleep_io);
1294 EXPORT_SYMBOL(sa1111_enable_device);
1295 EXPORT_SYMBOL(sa1111_disable_device);
1296 EXPORT_SYMBOL(sa1111_pll_clock);
1297 EXPORT_SYMBOL(sa1111_bus_type);
1298 EXPORT_SYMBOL(sa1111_driver_register);
1299 EXPORT_SYMBOL(sa1111_driver_unregister);