arch/arm/mach-moxacpu/cpe_int.c.old

   1 #include <linux/module.h>
   2 #include <linux/init.h>
   3
   4 #include <asm/mach/irq.h>
   5 #include <asm/hardware.h>
   6 #include <asm/io.h>
   7 #include <asm/irq.h>
   8 #include <asm/system.h>
   9 #include <asm/arch/cpe/cpe.h>
  10 #include <asm/arch/ftpci.h>
  11
  12 static spinlock_t cpe_int_lock;
  13
  14 #if 1   // add by Victor Yu. 05-17-2005
  15 #include <asm/arch/irq.h>
  16 struct irqchip  cpe_irq_chip = {
  17         .ack    = cpe_mask_ack_irq,
  18         .mask   = cpe_mask_irq,
  19         .unmask = cpe_unmask_irq,
  20 };
  21 #endif
  22
  23 inline void cpe_irq_set_mode(unsigned int base_p,unsigned int irq,unsigned int edge)
  24 {
  25         if ( edge )
  26                 *(volatile unsigned int *)(base_p+IRQ_MODE_REG)|=(1<<irq);
  27         else
  28                 *(volatile unsigned int *)(base_p+IRQ_MODE_REG)&=~(1<<irq);
  29 }
  30
  31 inline void cpe_irq_set_level(unsigned int base_p,unsigned int irq,unsigned int low)
  32 {
  33         if ( low )
  34                 *(volatile unsigned int *)(base_p+IRQ_LEVEL_REG)|=(1<<irq);
  35         else
  36                 *(volatile unsigned int *)(base_p+IRQ_LEVEL_REG)&=~(1<<irq);
  37 }
  38
  39
  40 inline void cpe_fiq_set_mode(unsigned int base_p,unsigned int fiq,unsigned int edge)
  41 {
  42         if ( edge )
  43                 *(volatile unsigned int *)(base_p+FIQ_MODE_REG)|=(1<<fiq);
  44         else
  45                 *(volatile unsigned int *)(base_p+FIQ_MODE_REG)&=~(1<<fiq);
  46 }
  47
  48
  49 inline void cpe_fiq_set_level(unsigned int base_p,unsigned int fiq,unsigned int low)
  50 {
  51         if ( low )
  52                 *(volatile unsigned int *)(base_p+FIQ_LEVEL_REG)|=(1<<fiq);
  53         else
  54                 *(volatile unsigned int *)(base_p+FIQ_LEVEL_REG)&=~(1<<fiq);
  55 }
  56
  57
  58 void cpe_int_set_irq(unsigned int irq,int mode,int level)
  59 {
  60         unsigned long   flags;
  61
  62         spin_lock_irqsave(&cpe_int_lock, flags);
  63         if ( irq < 32 ) { //irq
  64 #ifdef CONFIG_PCI       // add by Victor Yu. 05-23-2006
  65                 if ( irq == IRQ_PCI )
  66                         goto cpe_int_set_irq_exit;
  67 #endif
  68                 cpe_irq_set_mode(CPE_IC_VA_BASE,irq ,mode);
  69                 cpe_irq_set_level(CPE_IC_VA_BASE,irq,level);
  70                 goto cpe_int_set_irq_exit;
  71         }
  72         if ( irq < 64 ) { //fiq
  73                 irq-=32;
  74 #ifdef CONFIG_PCI       // add by Victor Yu. 05-23-2006
  75                 if ( irq == IRQ_PCI )
  76                         goto cpe_int_set_irq_exit;
  77 #endif
  78                 cpe_fiq_set_mode(CPE_IC_VA_BASE,irq,mode);
  79                 cpe_fiq_set_level(CPE_IC_VA_BASE,irq,level);
  80                 goto cpe_int_set_irq_exit;
  81         }
  82
  83 #ifdef CONFIG_ARCH_CPE
  84         if ( irq < 96 ) { //a321 irq
  85                 irq-=64;
  86                 cpe_irq_set_mode(CPE_A321_IC_VA_BASE,irq,mode);
  87                 cpe_irq_set_level(CPE_A321_IC_VA_BASE,irq,level);
  88                 cpe_irq_set_mode(CPE_IC_VA_BASE,IRQ_EXT_A321,LEVEL);
  89                 cpe_irq_set_level(CPE_IC_VA_BASE,IRQ_EXT_A321,H_ACTIVE);
  90                 goto cpe_int_set_irq_exit;
  91         }
  92         if ( irq < 150 ) { //a321 fiq
  93                 irq-=96;
  94                 cpe_fiq_set_mode(CPE_A321_IC_VA_BASE,irq,mode);
  95                 cpe_fiq_set_level(CPE_A321_IC_VA_BASE,irq,level);
  96                 cpe_fiq_set_mode(CPE_IC_VA_BASE,IRQ_EXT_A321,LEVEL);
  97                 cpe_fiq_set_level(CPE_IC_VA_BASE,IRQ_EXT_A321,H_ACTIVE);
  98                 goto cpe_int_set_irq_exit;
  99         }
 100
 101 #ifdef CONFIG_PCI
 102         //pci virtual irq
 103         if ( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 104                 if( !ftpci_probed )
 105                         goto cpe_int_set_irq_exit;
 106                 cpe_irq_set_mode(CPE_A321_IC_VA_BASE,IRQ_A321_PCI,mode);
 107                 cpe_irq_set_level(CPE_A321_IC_VA_BASE,IRQ_A321_PCI,level);
 108                 cpe_irq_set_mode(CPE_IC_VA_BASE,IRQ_EXT_A321,LEVEL);
 109                 cpe_irq_set_level(CPE_IC_VA_BASE,IRQ_EXT_A321,H_ACTIVE);
 110 #if 1   // add by Victor Yu. 10-20-2005
 111                 goto cpe_int_set_irq_exit;
 112 #endif  // 10-20-2005
 113         }
 114 #endif  // CONFIG_PCI
 115 #endif  // CONFIG_ARCH_CPE
 116
 117 #ifdef CONFIG_ARCH_MOXACPU
 118 #ifdef CONFIG_PCI
 119         //pci virtual irq
 120         if ( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 121                 if( !ftpci_probed )
 122                         goto cpe_int_set_irq_exit;
 123                 cpe_irq_set_mode(CPE_IC_VA_BASE,IRQ_PCI,LEVEL);
 124                 cpe_irq_set_level(CPE_IC_VA_BASE,IRQ_PCI,H_ACTIVE);
 125                 //goto cpe_int_set_irq_exit;
 126         }
 127 #endif  // CONFIG_PCI
 128 #endif  // CONFIG_ARCH_MOXACPU
 129
 130         //printk("Not support irq %d\n",irq);
 131
 132 cpe_int_set_irq_exit:
 133         spin_unlock_irqrestore(&cpe_int_lock, flags);
 134 }
 135
 136 void cpe_int_clear_irq(unsigned int base,unsigned int irq)
 137 {
 138         *(volatile unsigned int *)(base+IRQ_CLEAR_REG)=1<<irq;
 139 }
 140
 141 void cpe_int_clear_fiq(unsigned int base,unsigned int irq)
 142 {
 143         *(volatile unsigned int *)(base+FIQ_CLEAR_REG)=1<<irq;
 144 }
 145
 146 inline void cpe_int_disable_irq(unsigned int base,unsigned int irq)
 147 {
 148         *(volatile unsigned int *)(base+IRQ_MASK_REG)&=~(1<<irq);
 149 }
 150
 151 inline void cpe_int_disable_fiq(unsigned int base,unsigned int irq)
 152 {
 153         *(volatile unsigned int *)(base+FIQ_MASK_REG)&=~(1<<irq);
 154 }
 155
 156
 157 /*  Turn the interrupt source on. */
 158 inline void cpe_int_enable_irq(unsigned int base,unsigned int irq)
 159 {
 160         *(volatile unsigned int *)(base+IRQ_MASK_REG)|=(1<<irq);
 161 }
 162
 163 inline void cpe_int_enable_fiq(unsigned int base,unsigned int irq)
 164 {
 165         *(volatile unsigned int *)(base+FIQ_MASK_REG)|=(1<<irq);
 166 }
 167
 168 void cpe_unmask_irq(unsigned int irq)
 169 {
 170         unsigned long   flags;
 171
 172         spin_lock_irqsave(&cpe_int_lock, flags);
 173         if ( irq < 32 ) { //irq
 174 #ifdef CONFIG_PCI       // add by Victor Yu. 05-23-2006
 175                 if ( irq == IRQ_PCI )
 176                         goto cpe_unmask_irq_exit;
 177 #endif
 178                 cpe_int_clear_irq(CPE_IC_VA_BASE,irq);
 179                 cpe_int_enable_irq(CPE_IC_VA_BASE,irq);
 180                 goto cpe_unmask_irq_exit;
 181         }
 182         if ( irq < 64 ) { //fiq
 183                 irq-=32;
 184 #ifdef CONFIG_PCI       // add by Victor Yu. 05-23-2006
 185                 if ( irq == IRQ_PCI )
 186                         goto cpe_unmask_irq_exit;
 187 #endif
 188                 cpe_int_clear_fiq(CPE_IC_VA_BASE,irq);
 189                 cpe_int_enable_fiq(CPE_IC_VA_BASE,irq);
 190                 goto cpe_unmask_irq_exit;
 191         }
 192
 193 #ifdef CONFIG_ARCH_CPE
 194         if ( irq < 96 ) { //a321 irq
 195                 irq-=64;
 196                 cpe_int_clear_irq(CPE_A321_IC_VA_BASE,irq);
 197                 cpe_int_clear_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 198                 cpe_int_enable_irq(CPE_A321_IC_VA_BASE,irq);
 199                 cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 200                 goto cpe_unmask_irq_exit;
 201         }
 202         if ( irq < 150 ) { //a321 fiq
 203                 irq-=96;
 204                 cpe_int_clear_fiq(CPE_A321_IC_VA_BASE,irq);
 205                 cpe_int_clear_fiq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 206                 cpe_int_enable_fiq(CPE_A321_IC_VA_BASE,irq);
 207                 cpe_int_enable_fiq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 208                 goto cpe_unmask_irq_exit;
 209         }
 210
 211 #ifdef CONFIG_PCI
 212         //pci virtual irq
 213         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 214                 if( !ftpci_probed )
 215                         goto cpe_unmask_irq_exit;
 216                 ftpci_clear_irq(irq-150);
 217                 cpe_int_clear_irq(CPE_A321_IC_VA_BASE,IRQ_A321_PCI);
 218                 cpe_int_enable_irq(CPE_A321_IC_VA_BASE,IRQ_A321_PCI); //always enabled
 219                 cpe_int_clear_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 220                 cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_EXT_A321); //always enabled
 221                 goto cpe_unmask_irq_exit;
 222         }
 223 #endif  // CONFIG_PCI
 224 #endif  // CONFIG_ARCH_CPE
 225
 226 #ifdef CONFIG_ARCH_MOXACPU
 227 #ifdef CONFIG_PCI
 228         //pci virtual irq
 229         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 230                 if( !ftpci_probed )
 231                         goto cpe_unmask_irq_exit;
 232                 ftpci_clear_irq(irq-CPE_VIRQ_START);
 233                 cpe_int_clear_irq(CPE_IC_VA_BASE,IRQ_PCI);
 234                 cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_PCI); //always enabled
 235                 //goto cpe_unmask_irq_exit;
 236         }
 237 #endif  // CONFIG_PCI
 238 #endif  // CONFIG_ARCH_MOXACPU
 239
 240 cpe_unmask_irq_exit:
 241         spin_unlock_irqrestore(&cpe_int_lock, flags);
 242 }
 243
 244 void cpe_mask_ack_irq(unsigned int irq)
 245 {
 246         unsigned long   flags;
 247
 248         spin_lock_irqsave(&cpe_int_lock, flags);
 249         if ( irq < 32 ) {       //irq
 250 #ifdef CONFIG_PCI       // add by Victor Yu. 05-23-2006
 251                 if ( irq == IRQ_PCI )
 252                         goto cpe_mask_ack_irq_exit;
 253 #endif
 254                 cpe_int_disable_irq(CPE_IC_VA_BASE,irq);
 255                 goto cpe_mask_ack_irq_exit;
 256         }
 257
 258         if ( irq < 64 ) {       //fiq
 259                 irq-=32;
 260 #ifdef CONFIG_PCI       // add by Victor Yu. 05-23-2006
 261                 if ( irq == IRQ_PCI )
 262                         goto cpe_mask_ack_irq_exit;
 263 #endif
 264                 cpe_int_disable_fiq(CPE_IC_VA_BASE,irq);
 265                 goto cpe_mask_ack_irq_exit;
 266         }
 267
 268 #ifdef CONFIG_ARCH_CPE
 269         if ( irq < 96 ) { //a321 irq
 270                 irq-=64;
 271                 cpe_int_disable_irq(CPE_A321_IC_VA_BASE,irq);
 272                 goto cpe_mask_ack_irq_exit;
 273         }
 274         if ( irq < 150 ) { //a321 fiq
 275                 irq-=96;
 276                 cpe_int_disable_fiq(CPE_A321_IC_VA_BASE,irq);
 277                 goto cpe_mask_ack_irq_exit;
 278         }
 279 #ifdef CONFIG_PCI
 280         //pci virtual irq
 281         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 282                 if( !ftpci_probed )
 283                         goto cpe_mask_ack_irq_exit;
 284                 cpe_int_disable_irq(CPE_A321_IC_VA_BASE,IRQ_A321_PCI); //always enabled
 285                 goto cpe_mask_ack_irq_exit;
 286         }
 287 #endif  // CONFIG_PCI
 288 #endif  // CONFIG_ARCH_CPE
 289
 290 #ifdef CONFIG_ARCH_MOXACPU
 291 #ifdef CONFIG_PCI
 292         //pci virtual irq
 293         if( (irq==VIRQ_PCI_A)||(irq==VIRQ_PCI_B)||(irq==VIRQ_PCI_C)||(irq==VIRQ_PCI_D) ) {
 294                 if( !ftpci_probed )
 295                         goto cpe_mask_ack_irq_exit;
 296                 cpe_int_disable_irq(CPE_IC_VA_BASE,IRQ_PCI);
 297                 //goto cpe_mask_ack_irq_exit;
 298         }
 299 #endif  // CONFIG_PCI
 300 #endif  // CONFIG_ARCH_MOXACPU
 301
 302 cpe_mask_ack_irq_exit:
 303         spin_unlock_irqrestore(&cpe_int_lock, flags);
 304 }
 305
 306 void cpe_mask_irq(unsigned int irq)
 307 {
 308         cpe_mask_ack_irq(irq);
 309 }
 310
 311 void cpe_int_init(void)
 312 {
 313         spin_lock_init(&cpe_int_lock);
 314         //init interrupt controller
 315         outl(0, CPE_IC_VA_BASE+IRQ_MASK_REG);
 316         outl(0, CPE_IC_VA_BASE+FIQ_MASK_REG);
 317         outl(0xffffffff, CPE_IC_VA_BASE+IRQ_CLEAR_REG);
 318         outl(0xffffffff, CPE_IC_VA_BASE+FIQ_CLEAR_REG);
 319 #ifdef CONFIG_ARCH_MOXACPU
 320 #ifdef CONFIG_PCI
 321         cpe_int_set_irq(IRQ_PCI, LEVEL, H_ACTIVE);
 322 #if 0   // mask by Victor Yu. 05-23-2006
 323         cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_PCI); //always enabled
 324 #endif
 325 #endif
 326 #endif
 327
 328 #ifdef CONFIG_ARCH_CPE
 329         //init a321 interrupt controller
 330         outl(0, CPE_A321_IC_VA_BASE+IRQ_MASK_REG);
 331         outl(0, CPE_A321_IC_VA_BASE+FIQ_MASK_REG);
 332         outl(0xffffffff, CPE_A321_IC_VA_BASE+IRQ_CLEAR_REG);
 333         outl(0xffffffff, CPE_A321_IC_VA_BASE+FIQ_CLEAR_REG);
 334         cpe_int_set_irq(IRQ_EXT_A321, LEVEL, H_ACTIVE);
 335         cpe_int_enable_irq(CPE_IC_VA_BASE,IRQ_EXT_A321);
 336 #endif  // CONFIG_ARCH_CPE
 337 }
 338
 339 EXPORT_SYMBOL(cpe_int_set_irq);
 340 EXPORT_SYMBOL(cpe_int_clear_irq);