5 #define MOXA_PUART_HWID 0x03
8 #if (LINUX_VERSION_CODE < VERSION_CODE(2,6,9))
9 #define MX_READ_REG inb
10 #define MX_WRITE_REG outb
12 #define MX_READ_REG inb
13 #define MX_WRITE_REG outb
15 #define MX_READ_IOBAR3_REG inb
16 #define MX_WRITE_IOBAR3_REG outb
18 #include <asm/uaccess.h>
19 #define put_to_user(arg1, arg2) put_user(arg1, (unsigned long *)arg2)
20 #define get_from_user(arg1, arg2) get_user(arg1, (unsigned int *)arg2)
22 #define MXUPCIE_EVENT_TXLOW 1
23 #define MXUPCIE_EVENT_HANGUP 2
25 #define SERIAL_DO_RESTART
26 #define MXUPCIE_BOARDS 4 /* Max. boards */
27 #define MXUPCIE_PORTS 32 /* Max. ports */
28 #define MXUPCIE_PORTS_PER_BOARD 8 /* Max. ports per board*/
29 #define MXUPCIE_ISR_PASS_LIMIT 99999L
31 #define MXUPCIE_ERR_IOADDR -1
32 #define MXUPCIE_ERR_IRQ -2
33 #define MXUPCIE_ERR_IRQ_CONFLIT -3
34 #define MXUPCIE_ERR_VECTOR -4
36 #define SERIAL_TYPE_NORMAL 1
37 #define SERIAL_TYPE_CALLOUT 2
39 #define WAKEUP_CHARS 256
41 #define UART_MCR_AFE 0x20
42 #define UART_LSR_SPECIAL 0x1E
44 #define MX_LOCK_INIT() unsigned long sp_flags=0
46 #define MX_LOCK(lock) {\
47 printk("in %s\n", __FUNCTION__);\
48 spin_lock_irqsave(lock, flags);\
50 #define MX_UNLOCK(lock) {\
51 printk("out %s\n", __FUNCTION__);\
52 spin_unlock_irqrestore(lock, flags);\
55 #define MX_LOCK(lock) {\
57 spin_lock_irqsave(lock, sp_flags);\
59 #define MX_UNLOCK(lock) {\
61 spin_unlock_irqrestore(lock, sp_flags);\
65 #if (LINUX_VERSION_CODE < VERSION_CODE(2,6,0))
66 #define PORTNO(x) (MINOR((x)->device) - (x)->driver.minor_start)
68 #define PORTNO(x) ((x)->index)
71 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|IXON|IXOFF))
73 #if (LINUX_VERSION_CODE < VERSION_CODE(2,6,23))
74 #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? SA_SHIRQ : SA_INTERRUPT)
76 #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
80 #define MIN(a,b) ((a) < (b) ? (a) : (b))
84 #define MOXA_GETDATACOUNT (MOXA + 23)
85 #define MOXA_GET_CONF (MOXA + 35)
86 #define MOXA_CHKPORTENABLE (MOXA + 60)
87 #define MOXA_GET_MAJOR (MOXA + 63)
88 #define MOXA_GET_CUMAJOR (MOXA + 64)
89 #define MOXA_GETMSTATUS (MOXA + 65)
91 #define MOXA_SET_SPECIAL_BAUD_RATE (MOXA+100)
92 #define MOXA_GET_SPECIAL_BAUD_RATE (MOXA+101)
93 #define SMARTIO_SET_SPECIAL_BAUD_RATE (MOXA+77)
94 #define SMARTIO_GET_SPECIAL_BAUD_RATE (MOXA+78)
96 #define NPPI_NOTIFY_PARITY 0x01
97 #define NPPI_NOTIFY_FRAMING 0x02
98 #define NPPI_NOTIFY_HW_OVERRUN 0x04
99 #define NPPI_NOTIFY_BREAK 0x10
101 #define SMARTIO_PUART_SET_INTERFACE (MOXA + 79)
102 #define SMARTIO_PUART_GET_INTERFACE (MOXA + 80)
103 #define SMARTIO_PUART_SET_TERMINATOR (MOXA + 81)
104 #define SMARTIO_PUART_GET_TERMINATOR (MOXA + 82)
110 #define PCI_ANY_ID (~0)
116 * Define the Moxa PCI vendor and device IDs.
118 #ifndef PCI_VENDOR_ID_MOXA
119 #define PCI_VENDOR_ID_MOXA 0x1393
122 #ifndef PCI_DEVICE_ID_CP102E
123 #define PCI_DEVICE_ID_CP102E 0x1024
126 #ifndef PCI_DEVICE_ID_CP102EL
127 #define PCI_DEVICE_ID_CP102EL 0x1025
130 #ifndef PCI_DEVICE_ID_CP132EL
131 #define PCI_DEVICE_ID_CP132EL 0x1322
134 #ifndef PCI_DEVICE_ID_CP114EL
135 #define PCI_DEVICE_ID_CP114EL 0x1144
138 #define MOXA_PUART_SFR 0x07
139 #define MOXA_PUART_EFR 0x0A
140 #define MOXA_PUART_XON1 0x0B
141 #define MOXA_PUART_XON2 0x0C
142 #define MOXA_PUART_XOFF1 0x0D
143 #define MOXA_PUART_XOFF2 0x0E
144 #define MOXA_PUART_ACR 0x0F
145 #define MOXA_PUART_TTL 0x10
146 #define MOXA_PUART_RTL 0x11
147 #define MOXA_PUART_FCL 0x12
148 #define MOXA_PUART_FCH 0x13
149 #define MOXA_PUART_CPR 0x14
150 #define MOXA_PUART_RCNT 0x15
151 #define MOXA_PUART_LSRCNT 0x15
152 #define MOXA_PUART_TCNT 0x16
153 #define MOXA_PUART_SCR 0x16
154 #define MOXA_PUART_GLSR 0x17
155 #define MOXA_PUART_MEMRBR 0x100
156 #define MOXA_PUART_MEMTHR 0x100
157 #define MOXA_PUART_0UIR 0x04
158 #define MOXA_PUART_1UIR 0x04
159 #define MOXA_PUART_2UIR 0x05
160 #define MOXA_PUART_3UIR 0x05
161 #define MOXA_PUART_4UIR 0x06
162 #define MOXA_PUART_5UIR 0x06
163 #define MOXA_PUART_6UIR 0x07
164 #define MOXA_PUART_7UIR 0x07
165 #define MOXA_PUART_GPIO_IN 0x08
166 #define MOXA_PUART_GPIO_EN 0x09
167 #define MOXA_PUART_GPIO_OUT 0x0A
169 #define MOXA_SFR_FORCE_TX 0x01
170 #define MOXA_SFR_950 0x20
171 #define MOXA_SFR_ENABLE_TCNT 0x80
173 #define MOXA_EFR_TX_SW 0x02
174 #define MOXA_EFR_RX_SW 0x08
175 #define MOXA_EFR_ENHANCE 0x10
176 #define MOXA_EFR_AUTO_RTS 0x40
177 #define MOXA_EFR_AUTO_CTS 0x80
179 #define MOXA_IIR_NO_INT 0xC1
180 #define MOXA_IIR_RLSI 0xC6
181 #define MOXA_IIR_RDI 0x04
182 #define MOXA_IIR_THRI 0x02
184 #define MOXA_TTL_1 0x01
185 #define MOXA_RTL_1 0x01
186 #define MOXA_RTL_96 0x60
187 #define MOXA_RTL_120 0x78
188 #define MOXA_FCL_16 0x10
189 #define MOXA_FCH_96 0x60
190 #define MOXA_FCH_110 0x6E
191 #define MOXA_FCH_120 0x78
193 #define MOXA_UIR_RS232 0x00
194 #define MOXA_UIR_RS422 0x01
195 #define MOXA_UIR_RS485_4W 0x0B
196 #define MOXA_UIR_RS485_2W 0x0F
197 #define MOXA_UIR_OFFSET 0x04
198 #define MOXA_UIR_EVEN_PORT_VALUE_OFFSET 4
200 #define MOXA_GPIO_SET_ALL_OUTPUT 0x0F
201 #define MOXA_GPIO_OUTPUT_VALUE_OFFSET 16
205 #define MX_RS485_2W 4
206 #define MX_RS485_4W 8
207 #define MX_TERM_NONE 0x00
208 #define MX_TERM_120 0x01
212 #define MX_TX_FIFO_SIZE 128
213 #define MX_RX_FIFO_SIZE 128
214 #define MX_PUART_SIZE 0x200
215 #define MX_BREAK_ON 0x01
216 #define MX_BREAK_OFF 0x00
218 #define CLEAR_FUNC mxupcie_module_exit
219 #define CLEAR_FUNC_RET static void __exit
221 #define INIT_FUNC mxupcie_module_init
222 #define INIT_FUNC_RET static int __init
225 #if (LINUX_VERSION_CODE < VERSION_CODE(2,6,0))
226 #define DRV_VAR (&mxvar_sdriver)
227 #define DRV_VAR_P(x) mxvar_sdriver.x
229 #define DRV_VAR (mxvar_sdriver)
230 #define DRV_VAR_P(x) mxvar_sdriver->x
234 #define INIT_WORK(_work, _func, _data){ \
235 _data->tqueue.routine = _func;\
236 _data->tqueue.data = _data;\
240 #ifndef set_current_state
241 #define set_current_state(x) current->state = x
245 #if (LINUX_VERSION_CODE < VERSION_CODE(2,6,0))
247 #define IRQ_RETVAL(x)
249 #define IRQ_RET irqreturn_t
253 #if (LINUX_VERSION_CODE < VERSION_CODE(2,6,0))
254 #define MXQ_TASK() {\
256 if (schedule_task(&info->tqueue) == 0)\
260 #define MXQ_TASK() schedule_work(&info->tqueue)
263 #if (LINUX_VERSION_CODE < VERSION_CODE(2,6,0))
264 #define MX_MOD_INC MOD_INC_USE_COUNT
265 #define MX_MOD_DEC MOD_DEC_USE_COUNT
267 #define MX_MOD_INC try_module_get(THIS_MODULE)
268 #define MX_MOD_DEC module_put(THIS_MODULE)
271 #if (LINUX_VERSION_CODE >= VERSION_CODE(2,6,0))
272 #ifndef ASYNC_CALLOUT_ACTIVE
273 #define ASYNC_CALLOUT_ACTIVE 0
278 #if (LINUX_VERSION_CODE >= VERSION_CODE(2,6,0))
279 #define MX_TTY_DRV(x) tty->driver->x
281 #define MX_TTY_DRV(x) tty->driver.x
284 #if (LINUX_VERSION_CODE >= VERSION_CODE(2,6,0))
285 #define MX_ACCESS_CHK(type, addr, size) access_ok(type, addr, size)
287 #define MX_ACCESS_CHK(type, addr, size) verify_area(type, addr, size)
290 #if (LINUX_VERSION_CODE >= VERSION_CODE(2,6,0))
291 #define MX_ERR(x) !(x)
296 #if (LINUX_VERSION_CODE >= VERSION_CODE(2,6,0))
297 #define GET_FPAGE __get_free_page
299 #define GET_FPAGE get_free_page
303 #define atomic_read(v) v
308 typedef unsigned char UCHAR
;