| blob | 426456b9c9c97cbbe9aa24b7b998d405f57f31b7 |
1 card/block.c: (card->host->ios.clock / 1000);
2 card/block.c: if (brq.data.blocks > card->host->max_blk_count)
3 card/block.c: brq.data.blocks = card->host->max_blk_count;
4 card/block.c: !(card->host->caps & MMC_CAP_MULTIWRITE) &&
5 card/block.c: (card->host->caps & MMC_CAP_MULTIWRITE)) {
6 card/queue.c: if (host->max_hw_segs == 1) {
7 card/queue.c: if (bouncesz > host->max_req_size)
8 card/queue.c: bouncesz = host->max_req_size;
9 card/queue.c: if (bouncesz > host->max_seg_size)
10 card/queue.c: bouncesz = host->max_seg_size;
11 card/queue.c: blk_queue_max_sectors(mq->queue, host->max_req_size / 512);
12 card/queue.c: blk_queue_max_phys_segments(mq->queue, host->max_phys_segs);
13 card/queue.c: blk_queue_max_hw_segments(mq->queue, host->max_hw_segs);
14 card/queue.c: blk_queue_max_segment_size(mq->queue, host->max_seg_size);
15 card/queue.c: host->max_phys_segs, GFP_KERNEL);
16 core/bus.c: card->dev.parent = host->dev;
17 core/bus.c: if (card->host->bus_ops->sysfs_add) {
18 core/bus.c: ret = card->host->bus_ops->sysfs_add(card->host, card);
19 core/bus.c: if (card->host->bus_ops->sysfs_remove) {
20 core/bus.c: card->host->bus_ops->sysfs_remove(card->host, card);
21 core/core.c: host->ops->request(host, mrq);
22 core/core.c: WARN_ON(!host->claimed);
23 core/core.c: BUG_ON(mrq->data->blksz > host->max_blk_size);
24 core/core.c: BUG_ON(mrq->data->blocks > host->max_blk_count);
25 core/core.c: host->max_req_size);
26 core/core.c: host->ops->request(host, mrq);
27 core/core.c: BUG_ON(!host->claimed);
28 core/core.c: (card->host->ios.clock / 1000);
29 core/core.c: add_wait_queue(&host->wq, &wait);
30 core/core.c: spin_lock_irqsave(&host->lock, flags);
31 core/core.c: if (!host->claimed)
32 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
33 core/core.c: spin_lock_irqsave(&host->lock, flags);
34 core/core.c: host->claimed = 1;
35 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
36 core/core.c: remove_wait_queue(&host->wq, &wait);
37 core/core.c: BUG_ON(!host->claimed);
38 core/core.c: spin_lock_irqsave(&host->lock, flags);
39 core/core.c: host->claimed = 0;
40 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
41 core/core.c: wake_up(&host->wq);
42 core/core.c: struct mmc_ios *ios = &host->ios;
43 core/core.c: host->ops->set_ios(host, ios);
44 core/core.c: host->ios.chip_select = mode;
45 core/core.c: WARN_ON(hz < host->f_min);
46 core/core.c: if (hz > host->f_max)
47 core/core.c: hz = host->f_max;
48 core/core.c: host->ios.clock = hz;
49 core/core.c: host->ios.bus_mode = mode;
50 core/core.c: host->ios.bus_width = width;
51 core/core.c: ocr &= host->ocr_avail;
52 core/core.c: host->ios.vdd = bit;
53 core/core.c: host->ios.timing = timing;
54 core/core.c: int bit = fls(host->ocr_avail) - 1;
55 core/core.c: host->ios.vdd = bit;
56 core/core.c: host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
57 core/core.c: host->ios.chip_select = MMC_CS_DONTCARE;
58 core/core.c: host->ios.power_mode = MMC_POWER_UP;
59 core/core.c: host->ios.bus_width = MMC_BUS_WIDTH_1;
60 core/core.c: host->ios.timing = MMC_TIMING_LEGACY;
61 core/core.c: host->ios.clock = host->f_min;
62 core/core.c: host->ios.power_mode = MMC_POWER_ON;
63 core/core.c: host->ios.clock = 0;
64 core/core.c: host->ios.vdd = 0;
65 core/core.c: host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN;
66 core/core.c: host->ios.chip_select = MMC_CS_DONTCARE;
67 core/core.c: host->ios.power_mode = MMC_POWER_OFF;
68 core/core.c: host->ios.bus_width = MMC_BUS_WIDTH_1;
69 core/core.c: host->ios.timing = MMC_TIMING_LEGACY;
70 core/core.c: BUG_ON(host->bus_refs);
71 core/core.c: BUG_ON(!host->bus_dead);
72 core/core.c: host->bus_ops = NULL;
73 core/core.c: spin_lock_irqsave(&host->lock, flags);
74 core/core.c: host->bus_refs++;
75 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
76 core/core.c: spin_lock_irqsave(&host->lock, flags);
77 core/core.c: host->bus_refs--;
78 core/core.c: if ((host->bus_refs == 0) && host->bus_ops)
79 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
80 core/core.c: BUG_ON(!host->claimed);
81 core/core.c: spin_lock_irqsave(&host->lock, flags);
82 core/core.c: BUG_ON(host->bus_ops);
83 core/core.c: BUG_ON(host->bus_refs);
84 core/core.c: host->bus_ops = ops;
85 core/core.c: host->bus_refs = 1;
86 core/core.c: host->bus_dead = 0;
87 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
88 core/core.c: BUG_ON(!host->claimed);
89 core/core.c: BUG_ON(!host->bus_ops);
90 core/core.c: spin_lock_irqsave(&host->lock, flags);
91 core/core.c: host->bus_dead = 1;
92 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
93 core/core.c: spin_lock_irqsave(&host->lock, flags);
94 core/core.c: BUG_ON(host->removed);
95 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
96 core/core.c: mmc_schedule_delayed_work(&host->detect, delay);
97 core/core.c: if (host->bus_ops == NULL) {
98 core/core.c: mmc_send_if_cond(host, host->ocr_avail);
99 core/core.c: if (host->bus_ops->detect && !host->bus_dead) {
100 core/core.c: host->bus_ops->detect(host);
101 core/core.c: spin_lock_irqsave(&host->lock, flags);
102 core/core.c: host->removed = 1;
103 core/core.c: spin_unlock_irqrestore(&host->lock, flags);
104 core/core.c: if (host->bus_ops && !host->bus_dead) {
105 core/core.c: if (host->bus_ops->remove)
106 core/core.c: host->bus_ops->remove(host);
107 core/core.c: BUG_ON(host->card);
108 core/core.c: if (host->bus_ops && !host->bus_dead) {
109 core/core.c: if (host->bus_ops->suspend)
110 core/core.c: host->bus_ops->suspend(host);
111 core/core.c: if (!host->bus_ops->resume) {
112 core/core.c: if (host->bus_ops->remove)
113 core/core.c: host->bus_ops->remove(host);
114 core/core.c: if (host->bus_ops && !host->bus_dead) {
115 core/core.c: BUG_ON(!host->bus_ops->resume);
116 core/core.c: host->bus_ops->resume(host);
117 core/host.c: host->parent = dev;
118 core/host.c: host->class_dev.parent = dev;
119 core/host.c: host->dev = dev;
120 core/host.c: host->class_dev.dev = dev;
121 core/host.c: host->class_dev.class = &mmc_host_class;
122 core/host.c: device_initialize(&host->class_dev);
123 core/host.c: class_device_initialize(&host->class_dev);
124 core/host.c: spin_lock_init(&host->lock);
125 core/host.c: init_waitqueue_head(&host->wq);
126 core/host.c: INIT_DELAYED_WORK(&host->detect, mmc_rescan);
127 core/host.c: INIT_WORK(&host->detect, mmc_rescan, host);
128 core/host.c: host->max_hw_segs = 1;
129 core/host.c: host->max_phys_segs = 1;
130 core/host.c: host->max_seg_size = PAGE_CACHE_SIZE;
131 core/host.c: host->max_req_size = PAGE_CACHE_SIZE;
132 core/host.c: host->max_blk_size = 512;
133 core/host.c: host->max_blk_count = PAGE_CACHE_SIZE / 512;
134 core/host.c: err = idr_get_new(&mmc_host_idr, host, &host->index);
135 core/host.c: snprintf(host->class_dev.bus_id, BUS_ID_SIZE,
136 core/host.c: "mmc%d", host->index);
137 core/host.c: err = device_add(&host->class_dev);
138 core/host.c: snprintf(host->class_dev.class_id, BUS_ID_SIZE,
139 core/host.c: "mmc%d", host->index);
140 core/host.c: err = class_device_add(&host->class_dev);
141 core/host.c: device_del(&host->class_dev);
142 core/host.c: class_device_del(&host->class_dev);
143 core/host.c: idr_remove(&mmc_host_idr, host->index);
144 core/host.c: put_device(&host->class_dev);
145 core/host.c: class_device_put(&host->class_dev);
146 core/mmc.c: BUG_ON(!host->claimed);
147 core/mmc.c: (host->caps & MMC_CAP_MMC_HIGHSPEED)) {
148 core/mmc.c: (host->caps & MMC_CAP_4_BIT_DATA)) {
149 core/mmc.c: host->card = card;
150 core/mmc.c: BUG_ON(!host->card);
151 core/mmc.c: mmc_remove_card(host->card);
152 core/mmc.c: host->card = NULL;
153 core/mmc.c: BUG_ON(!host->card);
154 core/mmc.c: err = mmc_send_status(host->card, NULL);
155 core/mmc.c: BUG_ON(!host->card);
156 core/mmc.c: host->card->state &= ~MMC_STATE_HIGHSPEED;
157 core/mmc.c: BUG_ON(!host->card);
158 core/mmc.c: err = mmc_init_card(host, host->ocr, host->card);
159 core/mmc.c: BUG_ON(!host->claimed);
160 core/mmc.c: host->ocr = mmc_select_voltage(host, ocr);
161 core/mmc.c: if (!host->ocr) {
162 core/mmc.c: err = mmc_init_card(host, host->ocr, NULL);
163 core/mmc.c: err = mmc_add_card(host->card);
164 core/mmc.c: mmc_remove_card(host->card);
165 core/mmc.c: host->card = NULL;
166 core/sd.c: if (!(card->host->caps & MMC_CAP_SD_HIGHSPEED))
167 core/sd.c: BUG_ON(!host->claimed);
168 core/sd.c: if ((host->caps & MMC_CAP_4_BIT_DATA) &&
169 core/sd.c: if (!host->ops->get_ro) {
170 core/sd.c: if (host->ops->get_ro(host))
171 core/sd.c: host->card = card;
172 core/sd.c: BUG_ON(!host->card);
173 core/sd.c: mmc_remove_card(host->card);
174 core/sd.c: host->card = NULL;
175 core/sd.c: BUG_ON(!host->card);
176 core/sd.c: err = mmc_send_status(host->card, NULL);
177 core/sd.c: BUG_ON(!host->card);
178 core/sd.c: host->card->state &= ~MMC_STATE_HIGHSPEED;
179 core/sd.c: BUG_ON(!host->card);
180 core/sd.c: err = mmc_sd_init_card(host, host->ocr, host->card);
181 core/sd.c: BUG_ON(!host->claimed);
182 core/sd.c: host->ocr = mmc_select_voltage(host, ocr);
183 core/sd.c: if (!host->ocr) {
184 core/sd.c: err = mmc_sd_init_card(host, host->ocr, NULL);
185 core/sd.c: err = mmc_add_card(host->card);
186 core/sd.c: mmc_remove_card(host->card);
187 core/sd.c: host->card = NULL;
188 Binary file core/.bus.c.swp matches
189 Binary file core/.sd.c.swp matches
190 Binary file core/.core.c.swp matches
191 host/at91_mci.c: unsigned *dmabuf = host->buffer;
192 host/at91_mci.c: size = host->total_length;
193 host/at91_mci.c: cmd = host->cmd;
194 host/at91_mci.c: if (host->transfer_index >= data->sg_len) {
195 host/at91_mci.c: pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
196 host/at91_mci.c: pr_debug("Using transfer index %d\n", host->transfer_index);
197 host/at91_mci.c: sg = &data->sg[host->transfer_index++];
198 host/at91_mci.c: cmd = host->cmd;
199 host/at91_mci.c: while (host->in_use_index < host->transfer_index) {
200 host/at91_mci.c: pr_debug("finishing index %d\n", host->in_use_index);
201 host/at91_mci.c: sg = &data->sg[host->in_use_index++];
202 host/at91_mci.c: if (host->transfer_index < data->sg_len)
203 host/at91_mci.c: cmd = host->cmd;
204 host/at91_mci.c: data->bytes_xfered = host->total_length;
205 host/at91_mci.c: if (!host->cmd)
206 host/at91_mci.c: else if (!host->cmd->data) {
207 host/at91_mci.c: if (host->flags & FL_SENT_STOP) {
208 host/at91_mci.c: } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
209 host/at91_mci.c: at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
210 host/at91_mci.c: host->cmd = cmd;
211 host/at91_mci.c: if (host->flags & FL_SENT_STOP)
212 host/at91_mci.c: if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
213 host/at91_mci.c: host->transfer_index = 0;
214 host/at91_mci.c: host->in_use_index = 0;
215 host/at91_mci.c: host->buffer = NULL;
216 host/at91_mci.c: host->total_length = 0;
217 host/at91_mci.c: host->total_length = block_length * blocks;
218 host/at91_mci.c: host->buffer = dma_alloc_coherent(NULL,
219 host/at91_mci.c: host->total_length,
220 host/at91_mci.c: &host->physical_address, GFP_KERNEL);
221 host/at91_mci.c: pr_debug("Transmitting %d bytes\n", host->total_length);
222 host/at91_mci.c: at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
223 host/at91_mci.c: at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
224 host/at91_mci.c: if (!(host->flags & FL_SENT_COMMAND)) {
225 host/at91_mci.c: host->flags |= FL_SENT_COMMAND;
226 host/at91_mci.c: at91_mci_send_command(host, host->request->cmd);
227 host/at91_mci.c: else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
228 host/at91_mci.c: host->flags |= FL_SENT_STOP;
229 host/at91_mci.c: at91_mci_send_command(host, host->request->stop);
230 host/at91_mci.c: mmc_request_done(host->mmc, host->request);
231 host/at91_mci.c: struct mmc_command *cmd = host->cmd;
232 host/at91_mci.c: if (host->buffer) {
233 host/at91_mci.c: dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
234 host/at91_mci.c: host->buffer = NULL;
235 host/at91_mci.c: host->request = mrq;
236 host/at91_mci.c: host->flags = 0;
237 host/at91_mci.c: unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
238 host/at91_mci.c: host->bus_mode = ios->bus_mode;
239 host/at91_mci.c: if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
240 host/at91_mci.c: if (host->board->vcc_pin) {
241 host/at91_mci.c: at91_set_gpio_value(host->board->vcc_pin, 0);
242 host/at91_mci.c: at91_set_gpio_value(host->board->vcc_pin, 1);
243 host/at91_mci.c: if (present != host->present) {
244 host/at91_mci.c: host->present = present;
245 host/at91_mci.c: pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
246 host/at91_mci.c: mmc_detect_change(host->mmc, msecs_to_jiffies(100));
247 host/at91_mci.c: if (host->board->wp_pin) {
248 host/at91_mci.c: read_only = at91_get_gpio_value(host->board->wp_pin);
249 host/at91_mci.c: host->mmc = mmc;
250 host/at91_mci.c: host->buffer = NULL;
251 host/at91_mci.c: host->bus_mode = 0;
252 host/at91_mci.c: host->board = pdev->dev.platform_data;
253 host/at91_mci.c: if (host->board->wire4) {
254 host/at91_mci.c: host->mci_clk = clk_get(&pdev->dev, "mci_clk");
255 host/at91_mci.c: if (IS_ERR(host->mci_clk)) {
256 host/at91_mci.c: host->baseaddr = ioremap(res->start, res->end - res->start + 1);
257 host/at91_mci.c: if (!host->baseaddr) {
258 host/at91_mci.c: clk_put(host->mci_clk);
259 host/at91_mci.c: clk_enable(host->mci_clk); /* Enable the peripheral clock */
260 host/at91_mci.c: host->irq = platform_get_irq(pdev, 0);
261 host/at91_mci.c: ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED, DRIVER_NAME, host);
262 host/at91_mci.c: clk_disable(host->mci_clk);
263 host/at91_mci.c: clk_put(host->mci_clk);
264 host/at91_mci.c: iounmap(host->baseaddr);
265 host/at91_mci.c: if (host->board->det_pin) {
266 host/at91_mci.c: host->present = !at91_get_gpio_value(host->board->det_pin);
267 host/at91_mci.c: host->present = -1;
268 host/at91_mci.c: if (host->board->det_pin) {
269 host/at91_mci.c: ret = request_irq(host->board->det_pin, at91_mmc_det_irq,
270 host/at91_mci.c: if (host->board->det_pin) {
271 host/at91_mci.c: free_irq(host->board->det_pin, host);
272 host/at91_mci.c: cancel_delayed_work(&host->mmc->detect);
273 host/at91_mci.c: free_irq(host->irq, host);
274 host/at91_mci.c: clk_disable(host->mci_clk); /* Disable the peripheral clock */
275 host/at91_mci.c: clk_put(host->mci_clk);
276 host/at91_mci.c: iounmap(host->baseaddr);
277 host/at91_mci.c: if (host->board->det_pin && device_may_wakeup(&pdev->dev))
278 host/at91_mci.c: enable_irq_wake(host->board->det_pin);
279 host/at91_mci.c: if (host->board->det_pin && device_may_wakeup(&pdev->dev))
280 host/at91_mci.c: disable_irq_wake(host->board->det_pin);
281 host/au1xmmc.c: WARN_ON(host->status != HOST_S_DATA);
282 host/au1xmmc.c: host->status = HOST_S_STOP;
283 host/au1xmmc.c: u32 val = au1xmmc_card_table[host->id].bcsrpwr;
284 host/au1xmmc.c: return (bcsr->sig_status & au1xmmc_card_table[host->id].bcsrstatus)
285 host/au1xmmc.c: return (bcsr->status & au1xmmc_card_table[host->id].wpstatus)
286 host/au1xmmc.c: struct mmc_request *mrq = host->mrq;
287 host/au1xmmc.c: host->mrq = NULL;
288 host/au1xmmc.c: host->flags &= HOST_F_ACTIVE;
289 host/au1xmmc.c: host->dma.len = 0;
290 host/au1xmmc.c: host->dma.dir = 0;
291 host/au1xmmc.c: host->pio.index = 0;
292 host/au1xmmc.c: host->pio.offset = 0;
293 host/au1xmmc.c: host->pio.len = 0;
294 host/au1xmmc.c: host->status = HOST_S_IDLE;
295 host/au1xmmc.c: mmc_request_done(host->mmc, mrq);
296 host/au1xmmc.c: struct mmc_request *mrq = host->mrq;
297 host/au1xmmc.c: WARN_ON(host->status != HOST_S_DATA && host->status != HOST_S_STOP);
298 host/au1xmmc.c: if (host->mrq == NULL)
299 host/au1xmmc.c: while((host->flags & HOST_F_XMIT) && (status & SD_STATUS_DB))
300 host/au1xmmc.c: dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma.dir);
301 host/au1xmmc.c: if (host->flags & HOST_F_XMIT)
302 host/au1xmmc.c: if (host->flags & HOST_F_DMA) {
303 host/au1xmmc.c: host->pio.len;
304 host/au1xmmc.c: data = host->mrq->data;
305 host/au1xmmc.c: if (!(host->flags & HOST_F_XMIT))
306 host/au1xmmc.c: sg = &data->sg[host->pio.index];
307 host/au1xmmc.c: sg_ptr = page_address(sg->page) + sg->offset + host->pio.offset;
308 host/au1xmmc.c: sg_len = data->sg[host->pio.index].length - host->pio.offset;
309 host/au1xmmc.c: max = (sg_len > host->pio.len) ? host->pio.len : sg_len;
310 host/au1xmmc.c: host->pio.len -= count;
311 host/au1xmmc.c: host->pio.offset += count;
312 host/au1xmmc.c: host->pio.index++;
313 host/au1xmmc.c: host->pio.offset = 0;
314 host/au1xmmc.c: if (host->pio.len == 0) {
315 host/au1xmmc.c: if (host->flags & HOST_F_STOP)
316 host/au1xmmc.c: tasklet_schedule(&host->data_task);
317 host/au1xmmc.c: data = host->mrq->data;
318 host/au1xmmc.c: if (!(host->flags & HOST_F_RECV))
319 host/au1xmmc.c: max = host->pio.len;
320 host/au1xmmc.c: if (host->pio.index < host->dma.len) {
321 host/au1xmmc.c: sg = &data->sg[host->pio.index];
322 host/au1xmmc.c: sg_ptr = page_address(sg->page) + sg->offset + host->pio.offset;
323 host/au1xmmc.c: sg_len = sg_dma_len(&data->sg[host->pio.index]) - host->pio.offset;
324 host/au1xmmc.c: DBG("RX CRC Error [%d + %d].\n", host->id,
325 host/au1xmmc.c: host->pio.len, count);
326 host/au1xmmc.c: DBG("RX Overrun [%d + %d]\n", host->id,
327 host/au1xmmc.c: host->pio.len, count);
328 host/au1xmmc.c: DBG("RX Underrun [%d + %d]\n", host->id,
329 host/au1xmmc.c: host->pio.len, count);
330 host/au1xmmc.c: host->pio.len -= count;
331 host/au1xmmc.c: host->pio.offset += count;
332 host/au1xmmc.c: host->pio.index++;
333 host/au1xmmc.c: host->pio.offset = 0;
334 host/au1xmmc.c: if (host->pio.len == 0) {
335 host/au1xmmc.c: if (host->flags & HOST_F_STOP)
336 host/au1xmmc.c: tasklet_schedule(&host->data_task);
337 host/au1xmmc.c: struct mmc_request *mrq = host->mrq;
338 host/au1xmmc.c: if (!host->mrq)
339 host/au1xmmc.c: r[0] = au_readl(host->iobase + SD_RESP3);
340 host/au1xmmc.c: r[1] = au_readl(host->iobase + SD_RESP2);
341 host/au1xmmc.c: r[2] = au_readl(host->iobase + SD_RESP1);
342 host/au1xmmc.c: r[3] = au_readl(host->iobase + SD_RESP0);
343 host/au1xmmc.c: cmd->resp[0] = au_readl(host->iobase + SD_RESP0);
344 host/au1xmmc.c: trans = host->flags & (HOST_F_XMIT | HOST_F_RECV);
345 host/au1xmmc.c: tasklet_schedule(&host->finish_task);
346 host/au1xmmc.c: host->status = HOST_S_DATA;
347 host/au1xmmc.c: if (host->flags & HOST_F_DMA) {
348 host/au1xmmc.c: if (host->flags & HOST_F_RECV) {
349 host/au1xmmc.c: host->flags |= HOST_F_DMA;
350 host/au1xmmc.c: host->flags |= HOST_F_RECV;
351 host/au1xmmc.c: host->flags |= HOST_F_XMIT;
352 host/au1xmmc.c: if (host->mrq->stop)
353 host/au1xmmc.c: host->flags |= HOST_F_STOP;
354 host/au1xmmc.c: host->dma.dir = DMA_BIDIRECTIONAL;
355 host/au1xmmc.c: host->dma.len = dma_map_sg(mmc_dev(host->mmc), data->sg,
356 host/au1xmmc.c: data->sg_len, host->dma.dir);
357 host/au1xmmc.c: if (host->dma.len == 0)
358 host/au1xmmc.c: if (host->flags & HOST_F_DMA) {
359 host/au1xmmc.c: for(i = 0; i < host->dma.len; i++) {
360 host/au1xmmc.c: if (i == host->dma.len - 1)
361 host/au1xmmc.c: if (host->flags & HOST_F_XMIT){
362 host/au1xmmc.c: host->pio.index = 0;
363 host/au1xmmc.c: host->pio.offset = 0;
364 host/au1xmmc.c: host->pio.len = datalen;
365 host/au1xmmc.c: if (host->flags & HOST_F_XMIT)
366 host/au1xmmc.c: dma_unmap_sg(mmc_dev(host->mmc),data->sg,data->sg_len,host->dma.dir);
367 host/au1xmmc.c: WARN_ON(host->status != HOST_S_IDLE);
368 host/au1xmmc.c: host->mrq = mrq;
369 host/au1xmmc.c: host->status = HOST_S_CMD;
370 host/au1xmmc.c: if (ios->clock && ios->clock != host->clock) {
371 host/au1xmmc.c: host->clock = ios->clock;
372 host/au1xmmc.c: if (!host->mrq)
373 host/au1xmmc.c: if (host->flags & HOST_F_STOP)
374 host/au1xmmc.c: tasklet_schedule(&host->data_task);
375 host/au1xmmc.c: if (host->mrq && (status & STATUS_TIMEOUT)) {
376 host/au1xmmc.c: host->mrq->cmd->error = MMC_ERR_TIMEOUT;
377 host/au1xmmc.c: host->mrq->data->error = MMC_ERR_TIMEOUT;
378 host/au1xmmc.c: tasklet_schedule(&host->finish_task);
379 host/au1xmmc.c: if (!(host->flags & HOST_F_DMA) &&
380 host/au1xmmc.c: //tasklet_schedule(&host->data_task);
381 host/au1xmmc.c: if (host->status == HOST_S_CMD)
382 host/au1xmmc.c: else if (!(host->flags & HOST_F_DMA)) {
383 host/au1xmmc.c: if ((host->flags & HOST_F_XMIT) &&
384 host/au1xmmc.c: else if ((host->flags & HOST_F_RECV) &&
385 host/au1xmmc.c: DBG("Unhandled status %8.8x\n", host->id, status);
386 host/au1xmmc.c: int controller = (host->flags & HOST_F_ACTIVE) ? 1 : 0;
387 host/au1xmmc.c: host->flags &= ~HOST_F_ACTIVE;
388 host/au1xmmc.c: if (card) host->flags |= HOST_F_ACTIVE;
389 host/au1xmmc.c: mmc_detect_change(host->mmc, 0);
390 host/au1xmmc.c: if (host->mrq != NULL) {
391 host/au1xmmc.c: DBG("PENDING - %8.8x\n", host->id, status);
392 host/au1xmmc.c: mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT);
393 host/au1xmmc.c: int txid = au1xmmc_card_table[host->id].tx_devid;
394 host/au1xmmc.c: int rxid = au1xmmc_card_table[host->id].rx_devid;
395 host/au1xmmc.c: host->tx_chan = txchan;
396 host/au1xmmc.c: host->rx_chan = rxchan;
397 host/au1xmmc.c: host->mmc = mmc;
398 host/au1xmmc.c: host->id = i;
399 host/au1xmmc.c: host->iobase = au1xmmc_card_table[host->id].iobase;
400 host/au1xmmc.c: host->clock = 0;
401 host/au1xmmc.c: host->power_mode = MMC_POWER_OFF;
402 host/au1xmmc.c: host->flags = au1xmmc_card_inserted(host) ? HOST_F_ACTIVE : 0;
403 host/au1xmmc.c: host->status = HOST_S_IDLE;
404 host/au1xmmc.c: init_timer(&host->timer);
405 host/au1xmmc.c: host->timer.function = au1xmmc_poll_event;
406 host/au1xmmc.c: host->timer.data = (unsigned long) host;
407 host/au1xmmc.c: host->timer.expires = jiffies + AU1XMMC_DETECT_TIMEOUT;
408 host/au1xmmc.c: tasklet_init(&host->data_task, au1xmmc_tasklet_data,
409 host/au1xmmc.c: tasklet_init(&host->finish_task, au1xmmc_tasklet_finish,
410 host/au1xmmc.c: spin_lock_init(&host->lock);
411 host/au1xmmc.c: add_timer(&host->timer);
412 host/au1xmmc.c: host->id, host->iobase, dma ? "dma" : "pio");
413 host/au1xmmc.c: tasklet_kill(&host->data_task);
414 host/au1xmmc.c: tasklet_kill(&host->finish_task);
415 host/au1xmmc.c: del_timer_sync(&host->timer);
416 host/au1xmmc.c: mmc_remove_host(host->mmc);
417 host/au1xmmc.c: au1xxx_dbdma_chan_free(host->tx_chan);
418 host/au1xmmc.c: au1xxx_dbdma_chan_free(host->rx_chan);
419 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "imxmci_stop_clock blocked, no luck\n");
420 host/imxmmc.c: clear_bit(IMXMCI_PEND_STARTED_b, &host->pending_events);
421 host/imxmmc.c: if(test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events))
422 host/imxmmc.c: if(!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events))
423 host/imxmmc.c: dev_err(mmc_dev(host->mmc), "imxmci_start_clock blocked, no luck\n");
424 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n",
425 host/imxmmc.c: if(!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock>=8000000))
426 host/imxmmc.c: dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n",
427 host/imxmmc.c: host->data = data;
428 host/imxmmc.c: host->dma_size = datasz;
429 host/imxmmc.c: host->dma_dir = DMA_FROM_DEVICE;
430 host/imxmmc.c: host->dma_dir = DMA_TO_DEVICE;
431 host/imxmmc.c: host->data_ptr = (u16*)(page_address(data->sg->page) + data->sg->offset);
432 host/imxmmc.c: host->data_cnt = 0;
433 host/imxmmc.c: clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events);
434 host/imxmmc.c: set_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events);
435 host/imxmmc.c: host->dma_dir = DMA_FROM_DEVICE;
436 host/imxmmc.c: host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
437 host/imxmmc.c: data->sg_len, host->dma_dir);
438 host/imxmmc.c: imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz,
439 host/imxmmc.c: host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_READ);
440 host/imxmmc.c: /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/
441 host/imxmmc.c: CCR(host->dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN;
442 host/imxmmc.c: host->dma_dir = DMA_TO_DEVICE;
443 host/imxmmc.c: host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
444 host/imxmmc.c: data->sg_len, host->dma_dir);
445 host/imxmmc.c: imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz,
446 host/imxmmc.c: host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_WRITE);
447 host/imxmmc.c: /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/
448 host/imxmmc.c: CCR(host->dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN;
449 host/imxmmc.c: host->dma_size = 0;
450 host/imxmmc.c: for(i=0; i<host->dma_nents; i++)
451 host/imxmmc.c: host->dma_size+=data->sg[i].length;
452 host/imxmmc.c: if (datasz > host->dma_size) {
453 host/imxmmc.c: dev_err(mmc_dev(host->mmc), "imxmci_setup_data datasz 0x%x > 0x%x dm_size\n",
454 host/imxmmc.c: datasz, host->dma_size);
455 host/imxmmc.c: host->dma_size = datasz;
456 host/imxmmc.c: if(host->actual_bus_width == MMC_BUS_WIDTH_4)
457 host/imxmmc.c: BLR(host->dma) = 0; /* burst 64 byte read / 64 bytes write */
458 host/imxmmc.c: BLR(host->dma) = 16; /* burst 16 byte read / 16 bytes write */
459 host/imxmmc.c: RSSR(host->dma) = DMA_REQ_SDHC;
460 host/imxmmc.c: set_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events);
461 host/imxmmc.c: clear_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events);
462 host/imxmmc.c: if (host->dma_dir == DMA_FROM_DEVICE) {
463 host/imxmmc.c: imx_dma_enable(host->dma);
464 host/imxmmc.c: WARN_ON(host->cmd != NULL);
465 host/imxmmc.c: host->cmd = cmd;
466 host/imxmmc.c: if ( test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events) )
467 host/imxmmc.c: if ( host->actual_bus_width == MMC_BUS_WIDTH_4 )
468 host/imxmmc.c: atomic_set(&host->stuck_timeout, 0);
469 host/imxmmc.c: set_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events);
470 host/imxmmc.c: if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
471 host/imxmmc.c: spin_lock_irqsave(&host->lock, flags);
472 host/imxmmc.c: host->imask = imask;
473 host/imxmmc.c: MMC_INT_MASK = host->imask;
474 host/imxmmc.c: spin_unlock_irqrestore(&host->lock, flags);
475 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "CMD%02d (0x%02x) mask set to 0x%04x\n",
476 host/imxmmc.c: spin_lock_irqsave(&host->lock, flags);
477 host/imxmmc.c: host->pending_events &= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m |
478 host/imxmmc.c: host->imask = IMXMCI_INT_MASK_DEFAULT;
479 host/imxmmc.c: MMC_INT_MASK = host->imask;
480 host/imxmmc.c: spin_unlock_irqrestore(&host->lock, flags);
481 host/imxmmc.c: host->prev_cmd_code = req->cmd->opcode;
482 host/imxmmc.c: host->req = NULL;
483 host/imxmmc.c: host->cmd = NULL;
484 host/imxmmc.c: host->data = NULL;
485 host/imxmmc.c: mmc_request_done(host->mmc, req);
486 host/imxmmc.c: struct mmc_data *data = host->data;
487 host/imxmmc.c: if(test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)){
488 host/imxmmc.c: imx_dma_disable(host->dma);
489 host/imxmmc.c: dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents,
490 host/imxmmc.c: host->dma_dir);
491 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",stat);
492 host/imxmmc.c: data->bytes_xfered = host->dma_size;
493 host/imxmmc.c: host->data = NULL;
494 host/imxmmc.c: struct mmc_command *cmd = host->cmd;
495 host/imxmmc.c: struct mmc_data *data = host->data;
496 host/imxmmc.c: host->cmd = NULL;
497 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n");
498 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "cmd crc error\n");
499 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "RESP 0x%08x, 0x%08x, 0x%08x, 0x%08x, error %d\n",
500 host/imxmmc.c: if (host->req->data->flags & MMC_DATA_WRITE) {
501 host/imxmmc.c: if(host->req)
502 host/imxmmc.c: imxmci_finish_request(host, host->req);
503 host/imxmmc.c: dev_warn(mmc_dev(host->mmc), "STATUS = 0x%04x\n",
504 host/imxmmc.c: if(test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
505 host/imxmmc.c: imx_dma_enable(host->dma);
506 host/imxmmc.c: req = host->req;
507 host/imxmmc.c: dev_warn(mmc_dev(host->mmc), "imxmci_cmd_done: no request to finish\n");
508 host/imxmmc.c: struct mmc_data *data = host->data;
509 host/imxmmc.c: if (host->req->stop) {
510 host/imxmmc.c: imxmci_start_cmd(host, host->req->stop, 0);
511 host/imxmmc.c: req = host->req;
512 host/imxmmc.c: dev_warn(mmc_dev(host->mmc), "imxmci_data_done: no request to finish\n");
513 host/imxmmc.c: if(host->actual_bus_width != MMC_BUS_WIDTH_4)
514 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data running STATUS = 0x%x\n",
515 host/imxmmc.c: if(host->dma_dir == DMA_FROM_DEVICE) {
516 host/imxmmc.c: (host->data_cnt < 512)) {
517 host/imxmmc.c: if(host->data_cnt+2 <= host->dma_size) {
518 host/imxmmc.c: *(host->data_ptr++) = data;
519 host/imxmmc.c: if(host->data_cnt < host->dma_size)
520 host/imxmmc.c: *(u8*)(host->data_ptr) = data;
521 host/imxmmc.c: host->data_cnt += 2;
522 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n",
523 host/imxmmc.c: host->data_cnt, burst_len, stat);
524 host/imxmmc.c: if((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512))
525 host/imxmmc.c: if(host->dma_size & 0x1ff)
526 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n",
527 host/imxmmc.c: (host->data_cnt < host->dma_size)) {
528 host/imxmmc.c: if(burst_len >= host->dma_size - host->data_cnt) {
529 host/imxmmc.c: burst_len = host->dma_size - host->data_cnt;
530 host/imxmmc.c: host->data_cnt = host->dma_size;
531 host/imxmmc.c: host->data_cnt += burst_len;
532 host/imxmmc.c: MMC_BUFFER_ACCESS = *(host->data_ptr++);
533 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data write burst %d STATUS = 0x%x\n",
534 host/imxmmc.c: atomic_set(&host->stuck_timeout, 0);
535 host/imxmmc.c: host->status_reg = stat;
536 host/imxmmc.c: set_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events);
537 host/imxmmc.c: tasklet_schedule(&host->tasklet);
538 host/imxmmc.c: MMC_INT_MASK = host->imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT;
539 host/imxmmc.c: atomic_set(&host->stuck_timeout, 0);
540 host/imxmmc.c: host->status_reg = stat;
541 host/imxmmc.c: set_bit(IMXMCI_PEND_IRQ_b, &host->pending_events);
542 host/imxmmc.c: set_bit(IMXMCI_PEND_STARTED_b, &host->pending_events);
543 host/imxmmc.c: tasklet_schedule(&host->tasklet);
544 host/imxmmc.c: if(atomic_read(&host->stuck_timeout) > 4) {
545 host/imxmmc.c: host->status_reg = stat;
546 host/imxmmc.c: if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
547 host/imxmmc.c: if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events))
548 host/imxmmc.c: if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events))
549 host/imxmmc.c: if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events))
550 host/imxmmc.c: dev_err(mmc_dev(host->mmc), "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n",
551 host/imxmmc.c: dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n",
552 host/imxmmc.c: MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma));
553 host/imxmmc.c: dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n",
554 host/imxmmc.c: host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1<<host->actual_bus_width, host->dma_size);
555 host/imxmmc.c: if(!host->present || timeout)
556 host/imxmmc.c: host->status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ |
557 host/imxmmc.c: if(test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) {
558 host/imxmmc.c: clear_bit(IMXMCI_PEND_IRQ_b, &host->pending_events);
559 host/imxmmc.c: stat |= host->status_reg;
560 host/imxmmc.c: if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
561 host/imxmmc.c: if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
562 host/imxmmc.c: if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
563 host/imxmmc.c: if(host->data && (stat & STATUS_ERR_MASK))
564 host/imxmmc.c: if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) {
565 host/imxmmc.c: if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events))
566 host/imxmmc.c: &host->pending_events);
567 host/imxmmc.c: if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) &&
568 host/imxmmc.c: !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
569 host/imxmmc.c: stat |= host->status_reg;
570 host/imxmmc.c: if(host->dma_dir == DMA_TO_DEVICE) {
571 host/imxmmc.c: clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events);
572 host/imxmmc.c: if(test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) {
573 host/imxmmc.c: if(host->cmd)
574 host/imxmmc.c: if(host->data)
575 host/imxmmc.c: if(host->req)
576 host/imxmmc.c: imxmci_finish_request(host, host->req);
577 host/imxmmc.c: mmc_detect_change(host->mmc, msecs_to_jiffies(100));
578 host/imxmmc.c: WARN_ON(host->req != NULL);
579 host/imxmmc.c: host->req = req;
580 host/imxmmc.c: host->actual_bus_width = MMC_BUS_WIDTH_4;
581 host/imxmmc.c: host->actual_bus_width = MMC_BUS_WIDTH_1;
582 host/imxmmc.c: if ( host->power_mode != ios->power_mode ) {
583 host/imxmmc.c: set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events);
584 host/imxmmc.c: host->power_mode = ios->power_mode;
585 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "PERCLK2 %d MHz -> prescaler %d\n",
586 host/imxmmc.c: dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE);
587 host/imxmmc.c: if( host->pdata->card_present() != host->present ) {
588 host/imxmmc.c: host->present ^= 1;
589 host/imxmmc.c: dev_info(mmc_dev(host->mmc), "card %s\n",
590 host/imxmmc.c: host->present ? "inserted" : "removed");
591 host/imxmmc.c: set_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events);
592 host/imxmmc.c: tasklet_schedule(&host->tasklet);
593 host/imxmmc.c: if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) ||
594 host/imxmmc.c: test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) {
595 host/imxmmc.c: atomic_inc(&host->stuck_timeout);
596 host/imxmmc.c: if(atomic_read(&host->stuck_timeout) > 4)
597 host/imxmmc.c: tasklet_schedule(&host->tasklet);
598 host/imxmmc.c: atomic_set(&host->stuck_timeout, 0);
599 host/imxmmc.c: mod_timer(&host->timer, jiffies + (HZ>>1));
600 host/imxmmc.c: host->mmc = mmc;
601 host/imxmmc.c: host->dma_allocated = 0;
602 host/imxmmc.c: host->pdata = pdev->dev.platform_data;
603 host/imxmmc.c: spin_lock_init(&host->lock);
604 host/imxmmc.c: host->res = r;
605 host/imxmmc.c: host->irq = irq;
606 host/imxmmc.c: dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n",
607 host/imxmmc.c: host->imask = IMXMCI_INT_MASK_DEFAULT;
608 host/imxmmc.c: MMC_INT_MASK = host->imask;
609 host/imxmmc.c: if(imx_dma_request_by_prio(&host->dma, DRIVER_NAME, DMA_PRIO_LOW)<0){
610 host/imxmmc.c: dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n");
611 host/imxmmc.c: host->dma_allocated=1;
612 host/imxmmc.c: imx_dma_setup_handlers(host->dma, imxmci_dma_irq, NULL, host);
613 host/imxmmc.c: tasklet_init(&host->tasklet, imxmci_tasklet_fnc, (unsigned long)host);
614 host/imxmmc.c: host->status_reg=0;
615 host/imxmmc.c: host->pending_events=0;
616 host/imxmmc.c: ret = request_irq(host->irq, imxmci_irq, 0, DRIVER_NAME, host);
617 host/imxmmc.c: host->present = host->pdata->card_present();
618 host/imxmmc.c: init_timer(&host->timer);
619 host/imxmmc.c: host->timer.data = (unsigned long)host;
620 host/imxmmc.c: host->timer.function = imxmci_check_status;
621 host/imxmmc.c: add_timer(&host->timer);
622 host/imxmmc.c: mod_timer(&host->timer, jiffies + (HZ>>1));
623 host/imxmmc.c: if(host->dma_allocated){
624 host/imxmmc.c: imx_dma_free(host->dma);
625 host/imxmmc.c: host->dma_allocated=0;
626 host/imxmmc.c: tasklet_disable(&host->tasklet);
627 host/imxmmc.c: del_timer_sync(&host->timer);
628 host/imxmmc.c: free_irq(host->irq, host);
629 host/imxmmc.c: if(host->dma_allocated){
630 host/imxmmc.c: imx_dma_free(host->dma);
631 host/imxmmc.c: host->dma_allocated=0;
632 host/imxmmc.c: tasklet_kill(&host->tasklet);
633 host/imxmmc.c: release_resource(host->res);
634 host/imxmmc.c: set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events);
635 host/mmci.c: pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args)
636 host/mmci.c: writel(0, host->base + MMCICOMMAND);
637 host/mmci.c: BUG_ON(host->data);
638 host/mmci.c: host->mrq = NULL;
639 host/mmci.c: host->cmd = NULL;
640 host/mmci.c: mrq->data->bytes_xfered = host->data_xfered;
641 host/mmci.c: spin_unlock(&host->lock);
642 host/mmci.c: mmc_request_done(host->mmc, mrq);
643 host/mmci.c: spin_lock(&host->lock);
644 host/mmci.c: writel(0, host->base + MMCIDATACTRL);
645 host/mmci.c: writel(0, host->base + MMCIMASK1);
646 host/mmci.c: host->data = NULL;
647 host/mmci.c: host->data = data;
648 host/mmci.c: host->size = data->blksz;
649 host/mmci.c: host->data_xfered = 0;
650 host/mmci.c: clks = (unsigned long long)data->timeout_ns * host->cclk;
651 host/mmci.c: base = host->base;
652 host/mmci.c: writel(host->size, base + MMCIDATALENGTH);
653 host/mmci.c: if (host->size < MCI_FIFOSIZE)
654 host/mmci.c: void __iomem *base = host->base;
655 host/mmci.c: host->cmd = cmd;
656 host/mmci.c: host->data_xfered += data->blksz;
657 host/mmci.c: if (host->sg_len && data->flags & MMC_DATA_READ)
658 host/mmci.c: flush_dcache_page(host->sg_ptr->page);
659 host/mmci.c: void __iomem *base = host->base;
660 host/mmci.c: host->cmd = NULL;
661 host/mmci.c: if (host->data)
662 host/mmci.c: void __iomem *base = host->base;
663 host/mmci.c: int count = host->size - (readl(base + MMCIFIFOCNT) << 2);
664 host/mmci.c: void __iomem *base = host->base;
665 host/mmci.c: void __iomem *base = host->base;
666 host/mmci.c: buffer = mmci_kmap_atomic(host, &flags) + host->sg_off;
667 host/mmci.c: remain = host->sg_ptr->length - host->sg_off;
668 host/mmci.c: host->sg_off += len;
669 host/mmci.c: host->size -= len;
670 host/mmci.c: flush_dcache_page(host->sg_ptr->page);
671 host/mmci.c: if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE)
672 host/mmci.c: if (host->size == 0) {
673 host/mmci.c: spin_lock(&host->lock);
674 host/mmci.c: status = readl(host->base + MMCISTATUS);
675 host/mmci.c: status &= readl(host->base + MMCIMASK0);
676 host/mmci.c: writel(status, host->base + MMCICLEAR);
677 host/mmci.c: data = host->data;
678 host/mmci.c: cmd = host->cmd;
679 host/mmci.c: spin_unlock(&host->lock);
680 host/mmci.c: WARN_ON(host->mrq != NULL);
681 host/mmci.c: spin_lock_irq(&host->lock);
682 host/mmci.c: host->mrq = mrq;
683 host/mmci.c: spin_unlock_irq(&host->lock);
684 host/mmci.c: if (ios->clock >= host->mclk) {
685 host/mmci.c: host->cclk = host->mclk;
686 host/mmci.c: clk = host->mclk / (2 * ios->clock) - 1;
687 host/mmci.c: host->cclk = host->mclk / (2 * (clk + 1));
688 host/mmci.c: if (host->plat->translate_vdd)
689 host/mmci.c: pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
690 host/mmci.c: writel(clk, host->base + MMCICLOCK);
691 host/mmci.c: if (host->pwr != pwr) {
692 host/mmci.c: host->pwr = pwr;
693 host/mmci.c: writel(pwr, host->base + MMCIPOWER);
694 host/mmci.c: status = host->plat->status(mmc_dev(host->mmc));
695 host/mmci.c: if (status ^ host->oldstat)
696 host/mmci.c: mmc_detect_change(host->mmc, 0);
697 host/mmci.c: host->oldstat = status;
698 host/mmci.c: mod_timer(&host->timer, jiffies + HZ);
699 host/mmci.c: host->clk = clk_get(&dev->dev, "MCLK");
700 host/mmci.c: if (IS_ERR(host->clk)) {
701 host/mmci.c: ret = PTR_ERR(host->clk);
702 host/mmci.c: host->clk = NULL;
703 host/mmci.c: ret = clk_enable(host->clk);
704 host/mmci.c: host->plat = plat;
705 host/mmci.c: host->mclk = clk_get_rate(host->clk);
706 host/mmci.c: host->mmc = mmc;
707 host/mmci.c: host->base = ioremap(dev->res.start, SZ_4K);
708 host/mmci.c: if (!host->base) {
709 host/mmci.c: mmc->f_min = (host->mclk + 511) / 512;
710 host/mmci.c: mmc->f_max = min(host->mclk, fmax);
711 host/mmci.c: spin_lock_init(&host->lock);
712 host/mmci.c: writel(0, host->base + MMCIMASK0);
713 host/mmci.c: writel(0, host->base + MMCIMASK1);
714 host/mmci.c: writel(0xfff, host->base + MMCICLEAR);
715 host/mmci.c: writel(MCI_IRQENABLE, host->base + MMCIMASK0);
716 host/mmci.c: init_timer(&host->timer);
717 host/mmci.c: host->timer.data = (unsigned long)host;
718 host/mmci.c: host->timer.function = mmci_check_status;
719 host/mmci.c: host->timer.expires = jiffies + HZ;
720 host/mmci.c: add_timer(&host->timer);
721 host/mmci.c: iounmap(host->base);
722 host/mmci.c: clk_disable(host->clk);
723 host/mmci.c: clk_put(host->clk);
724 host/mmci.c: del_timer_sync(&host->timer);
725 host/mmci.c: writel(0, host->base + MMCIMASK0);
726 host/mmci.c: writel(0, host->base + MMCIMASK1);
727 host/mmci.c: writel(0, host->base + MMCICOMMAND);
728 host/mmci.c: writel(0, host->base + MMCIDATACTRL);
729 host/mmci.c: iounmap(host->base);
730 host/mmci.c: clk_disable(host->clk);
731 host/mmci.c: clk_put(host->clk);
732 host/mmci.c: writel(0, host->base + MMCIMASK0);
733 host/mmci.c: writel(MCI_IRQENABLE, host->base + MMCIMASK0);
734 host/mmci.h: host->sg_len = data->sg_len;
735 host/mmci.h: host->sg_ptr = data->sg;
736 host/mmci.h: host->sg_off = 0;
737 host/mmci.h: host->sg_ptr++;
738 host/mmci.h: host->sg_off = 0;
739 host/mmci.h: return --host->sg_len;
740 host/mmci.h: struct scatterlist *sg = host->sg_ptr;
741 host/omap.c: if (host->switch_pin < 0)
742 host/omap.c: return omap_get_gpio_datain(host->switch_pin);
743 host/omap.c: if (enable_poll && host->switch_pin >= 0)
744 host/omap.c: schedule_work(&host->switch_work);
745 host/omap.c: host->cmd = cmd;
746 host/omap.c: dev_err(mmc_dev(host->mmc), "Invalid response type: %04x\n", mmc_resp_type(cmd));
747 host/omap.c: if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
748 host/omap.c: if (host->data && !(host->data->flags & MMC_DATA_WRITE))
749 host/omap.c: clk_enable(host->fclk);
750 host/omap.c: if (host->dma_in_use) {
751 host/omap.c: BUG_ON(host->dma_ch < 0);
752 host/omap.c: omap_stop_dma(host->dma_ch);
753 host/omap.c: mod_timer(&host->dma_timer, jiffies + HZ);
754 host/omap.c: dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len,
755 host/omap.c: host->data = NULL;
756 host/omap.c: host->sg_len = 0;
757 host/omap.c: clk_disable(host->fclk);
758 host/omap.c: host->mrq = NULL;
759 host/omap.c: mmc_request_done(host->mmc, data->mrq);
760 host/omap.c: if (!host->dma_in_use) {
761 host/omap.c: spin_lock_irqsave(&host->dma_lock, flags);
762 host/omap.c: if (host->dma_done)
763 host/omap.c: host->brs_received = 1;
764 host/omap.c: spin_unlock_irqrestore(&host->dma_lock, flags);
765 host/omap.c: BUG_ON(host->dma_ch < 0);
766 host/omap.c: omap_free_dma(host->dma_ch);
767 host/omap.c: host->dma_ch = -1;
768 host/omap.c: spin_lock_irqsave(&host->dma_lock, flags);
769 host/omap.c: if (host->brs_received)
770 host/omap.c: host->dma_done = 1;
771 host/omap.c: spin_unlock_irqrestore(&host->dma_lock, flags);
772 host/omap.c: host->cmd = NULL;
773 host/omap.c: if (host->data == NULL || cmd->error != MMC_ERR_NONE) {
774 host/omap.c: host->mrq = NULL;
775 host/omap.c: clk_disable(host->fclk);
776 host/omap.c: mmc_request_done(host->mmc, cmd->mrq);
777 host/omap.c: sg = host->data->sg + host->sg_idx;
778 host/omap.c: host->buffer_bytes_left = sg->length;
779 host/omap.c: host->buffer = page_address(sg->page) + sg->offset;
780 host/omap.c: if (host->buffer_bytes_left > host->total_bytes_left)
781 host/omap.c: host->buffer_bytes_left = host->total_bytes_left;
782 host/omap.c: if (host->buffer_bytes_left == 0) {
783 host/omap.c: host->sg_idx++;
784 host/omap.c: BUG_ON(host->sg_idx == host->sg_len);
785 host/omap.c: if (n > host->buffer_bytes_left)
786 host/omap.c: n = host->buffer_bytes_left;
787 host/omap.c: host->buffer_bytes_left -= n;
788 host/omap.c: host->total_bytes_left -= n;
789 host/omap.c: host->data->bytes_xfered += n;
790 host/omap.c: __raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
791 host/omap.c: __raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
792 host/omap.c: if (host->cmd == NULL && host->data == NULL) {
793 host/omap.c: dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
794 host/omap.c: dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
795 host/omap.c: status, host->cmd != NULL ? host->cmd->opcode : -1);
796 host/omap.c: if (host->total_bytes_left) {
797 host/omap.c: dev_dbg(mmc_dev(host->mmc), "data timeout\n");
798 host/omap.c: if (host->data) {
799 host/omap.c: host->data->error |= MMC_ERR_TIMEOUT;
800 host/omap.c: if (host->data) {
801 host/omap.c: host->data->error |= MMC_ERR_BADCRC;
802 host/omap.c: dev_dbg(mmc_dev(host->mmc),
803 host/omap.c: host->total_bytes_left);
804 host/omap.c: dev_dbg(mmc_dev(host->mmc), "data CRC error\n");
805 host/omap.c: if (host->cmd) {
806 host/omap.c: if (host->cmd->opcode != MMC_ALL_SEND_CID &&
807 host/omap.c: host->cmd->opcode !=
808 host/omap.c: host->cmd->opcode !=
809 host/omap.c: dev_err(mmc_dev(host->mmc),
810 host/omap.c: host->cmd->opcode);
811 host/omap.c: host->cmd->error = MMC_ERR_TIMEOUT;
812 host/omap.c: if (host->cmd) {
813 host/omap.c: dev_err(mmc_dev(host->mmc),
814 host/omap.c: host->cmd->opcode, host->cmd->arg);
815 host/omap.c: host->cmd->error = MMC_ERR_BADCRC;
816 host/omap.c: dev_err(mmc_dev(host->mmc),
817 host/omap.c: dev_dbg(mmc_dev(host->mmc),
818 host/omap.c: host->cmd->opcode);
819 host/omap.c: mmc_omap_cmd_done(host, host->cmd);
820 host/omap.c: mmc_omap_xfer_done(host, host->data);
821 host/omap.c: mmc_omap_end_of_data(host, host->data);
822 host/omap.c: schedule_work(&host->switch_work);
823 host/omap.c: schedule_work(&host->switch_work);
824 host/omap.c: if (host->switch_pin == -1)
825 host/omap.c: if (cover_open != host->switch_last_state) {
826 host/omap.c: kobject_uevent(&host->dev->kobj, KOBJ_CHANGE);
827 host/omap.c: host->switch_last_state = cover_open;
828 host/omap.c: mmc_detect_change(host->mmc, 0);
829 host/omap.c: list_for_each_entry(card, &host->mmc->cards, node) {
830 host/omap.c: dev_info(mmc_dev(host->mmc), "cover is open\n");
831 host/omap.c: mod_timer(&host->switch_timer, jiffies +
832 host/omap.c: int dma_ch = host->dma_ch;
833 host/omap.c: struct scatterlist *sg = &data->sg[host->sg_idx];
834 host/omap.c: data_addr = host->phys_base + OMAP_MMC_REG_DATA;
835 host/omap.c: host->dma_len = count;
836 host/omap.c: struct mmc_data *mmcdat = host->data;
837 host/omap.c: if (unlikely(host->dma_ch < 0)) {
838 host/omap.c: dev_err(mmc_dev(host->mmc),
839 host/omap.c: dev_err(mmc_dev(host->mmc),"DMA timeout\n");
840 host/omap.c: dev_err(mmc_dev(host->mmc), "DMA sync error\n");
841 host/omap.c: mmcdat->bytes_xfered += host->dma_len;
842 host/omap.c: host->sg_idx++;
843 host/omap.c: if (host->sg_idx < host->sg_len) {
844 host/omap.c: mmc_omap_prepare_dma(host, host->data);
845 host/omap.c: omap_start_dma(host->dma_ch);
846 host/omap.c: mmc_omap_dma_done(host, host->data);
847 host/omap.c: del_timer_sync(&host->dma_timer);
848 host/omap.c: if (host->dma_ch >= 0) {
849 host/omap.c: if (is_read == host->dma_is_read)
850 host/omap.c: omap_free_dma(host->dma_ch);
851 host/omap.c: host->dma_ch = -1;
852 host/omap.c: if (host->id == 1) {
853 host/omap.c: if (host->id == 1) {
854 host/omap.c: dev_dbg(mmc_dev(host->mmc), "omap_request_dma() failed with %d\n", r);
855 host/omap.c: host->dma_ch = dma_ch;
856 host/omap.c: host->dma_is_read = is_read;
857 host/omap.c: host->data = data;
858 host/omap.c: host->dma_in_use = 0;
859 host/omap.c: use_dma = host->use_dma;
860 host/omap.c: host->sg_idx = 0;
861 host/omap.c: host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg,
862 host/omap.c: host->total_bytes_left = 0;
863 host/omap.c: host->brs_received = 0;
864 host/omap.c: host->dma_done = 0;
865 host/omap.c: host->dma_in_use = 1;
866 host/omap.c: host->total_bytes_left = data->blocks * block_size;
867 host/omap.c: host->sg_len = sg_len;
868 host/omap.c: host->dma_in_use = 0;
869 host/omap.c: WARN_ON(host->mrq != NULL);
870 host/omap.c: host->mrq = req;
871 host/omap.c: if (host->dma_in_use)
872 host/omap.c: omap_start_dma(host->dma_ch);
873 host/omap.c: if (host->power_pin >= 0)
874 host/omap.c: omap_set_gpio_dataout(host->power_pin, 1);
875 host/omap.c: if (host->power_pin >= 0)
876 host/omap.c: omap_set_gpio_dataout(host->power_pin, 0);
877 host/omap.c: int func_clk_rate = clk_get_rate(host->fclk);
878 host/omap.c: host->bus_mode = ios->bus_mode;
879 host/omap.c: host->hw_bus_mode = host->bus_mode;
880 host/omap.c: clk_enable(host->fclk);
881 host/omap.c: clk_disable(host->fclk);
882 host/omap.c: return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
883 host/omap.c: host->mmc = mmc;
884 host/omap.c: spin_lock_init(&host->dma_lock);
885 host/omap.c: init_timer(&host->dma_timer);
886 host/omap.c: host->dma_timer.function = mmc_omap_dma_timer;
887 host/omap.c: host->dma_timer.data = (unsigned long) host;
888 host/omap.c: host->id = pdev->id;
889 host/omap.c: host->mem_res = res;
890 host/omap.c: host->irq = irq;
891 host/omap.c: host->iclk = clk_get(&pdev->dev, "mmc_ick");
892 host/omap.c: if (IS_ERR(host->iclk))
893 host/omap.c: clk_enable(host->iclk);
894 host/omap.c: host->fclk = clk_get(&pdev->dev, "mmc_ck");
895 host/omap.c: host->fclk = clk_get(&pdev->dev, "mmc_fck");
896 host/omap.c: if (IS_ERR(host->fclk)) {
897 host/omap.c: ret = PTR_ERR(host->fclk);
898 host/omap.c: host->power_pin = minfo->power_pin;
899 host/omap.c: host->switch_pin = minfo->switch_pin;
900 host/omap.c: host->wp_pin = minfo->wp_pin;
901 host/omap.c: host->use_dma = 1;
902 host/omap.c: host->dma_ch = -1;
903 host/omap.c: host->irq = irq;
904 host/omap.c: host->phys_base = host->mem_res->start;
905 host/omap.c: host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base);
906 host/omap.c: if (host->power_pin >= 0) {
907 host/omap.c: if ((ret = omap_request_gpio(host->power_pin)) != 0) {
908 host/omap.c: dev_err(mmc_dev(host->mmc),
909 host/omap.c: omap_set_gpio_direction(host->power_pin, 0);
910 host/omap.c: ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
911 host/omap.c: host->dev = &pdev->dev;
912 host/omap.c: if (host->switch_pin >= 0) {
913 host/omap.c: INIT_WORK(&host->switch_work, mmc_omap_switch_handler);
914 host/omap.c: init_timer(&host->switch_timer);
915 host/omap.c: host->switch_timer.function = mmc_omap_switch_timer;
916 host/omap.c: host->switch_timer.data = (unsigned long) host;
917 host/omap.c: if (omap_request_gpio(host->switch_pin) != 0) {
918 host/omap.c: dev_warn(mmc_dev(host->mmc), "Unable to get GPIO pin for MMC cover switch\n");
919 host/omap.c: host->switch_pin = -1;
920 host/omap.c: omap_set_gpio_direction(host->switch_pin, 1);
921 host/omap.c: ret = request_irq(OMAP_GPIO_IRQ(host->switch_pin),
922 host/omap.c: dev_warn(mmc_dev(host->mmc), "Unable to get IRQ for MMC cover switch\n");
923 host/omap.c: omap_free_gpio(host->switch_pin);
924 host/omap.c: host->switch_pin = -1;
925 host/omap.c: dev_warn(mmc_dev(host->mmc), "Unable to create sysfs attributes\n");
926 host/omap.c: free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
927 host/omap.c: omap_free_gpio(host->switch_pin);
928 host/omap.c: host->switch_pin = -1;
929 host/omap.c: schedule_work(&host->switch_work);
930 host/omap.c: if (host->iclk && !IS_ERR(host->iclk))
931 host/omap.c: clk_put(host->iclk);
932 host/omap.c: if (host->fclk && !IS_ERR(host->fclk))
933 host/omap.c: clk_put(host->fclk);
934 host/omap.c: mmc_free_host(host->mmc);
935 host/omap.c: if (host->power_pin >= 0)
936 host/omap.c: omap_free_gpio(host->power_pin);
937 host/omap.c: clk_put(host->fclk);
938 host/omap.c: if (host->iclk != NULL) {
939 host/omap.c: clk_disable(host->iclk);
940 host/omap.c: clk_put(host->iclk);
941 host/omap.c: mmc_free_host(host->mmc);
942 host/omap.c: mmc_remove_host(host->mmc);
943 host/omap.c: free_irq(host->irq, host);
944 host/omap.c: if (host->power_pin >= 0)
945 host/omap.c: omap_free_gpio(host->power_pin);
946 host/omap.c: if (host->switch_pin >= 0) {
947 host/omap.c: free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
948 host/omap.c: omap_free_gpio(host->switch_pin);
949 host/omap.c: host->switch_pin = -1;
950 host/omap.c: del_timer_sync(&host->switch_timer);
951 host/omap.c: if (host->iclk && !IS_ERR(host->iclk))
952 host/omap.c: clk_put(host->iclk);
953 host/omap.c: if (host->fclk && !IS_ERR(host->fclk))
954 host/omap.c: clk_put(host->fclk);
955 host/omap.c: mmc_free_host(host->mmc);
956 host/omap.c: if (host && host->suspended)
957 host/omap.c: ret = mmc_suspend_host(host->mmc, mesg);
958 host/omap.c: host->suspended = 1;
959 host/omap.c: if (host && !host->suspended)
960 host/omap.c: ret = mmc_resume_host(host->mmc);
961 host/omap.c: host->suspended = 0;
962 host/pxamci.c: if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
963 host/pxamci.c: writel(STOP_CLOCK, host->base + MMC_STRPCL);
964 host/pxamci.c: v = readl(host->base + MMC_STAT);
965 host/pxamci.c: dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
966 host/pxamci.c: spin_lock_irqsave(&host->lock, flags);
967 host/pxamci.c: host->imask &= ~mask;
968 host/pxamci.c: writel(host->imask, host->base + MMC_I_MASK);
969 host/pxamci.c: spin_unlock_irqrestore(&host->lock, flags);
970 host/pxamci.c: spin_lock_irqsave(&host->lock, flags);
971 host/pxamci.c: host->imask |= mask;
972 host/pxamci.c: writel(host->imask, host->base + MMC_I_MASK);
973 host/pxamci.c: spin_unlock_irqrestore(&host->lock, flags);
974 host/pxamci.c: host->data = data;
975 host/pxamci.c: writel(nob, host->base + MMC_NOB);
976 host/pxamci.c: writel(data->blksz, host->base + MMC_BLKLEN);
977 host/pxamci.c: timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
978 host/pxamci.c: writel((timeout + 255) / 256, host->base + MMC_RDTO);
979 host/pxamci.c: host->dma_dir = DMA_FROM_DEVICE;
980 host/pxamci.c: DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
981 host/pxamci.c: host->dma_dir = DMA_TO_DEVICE;
982 host/pxamci.c: DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
983 host/pxamci.c: host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
984 host/pxamci.c: host->dma_dir);
985 host/pxamci.c: for (i = 0; i < host->dma_len; i++) {
986 host/pxamci.c: host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
987 host/pxamci.c: host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
988 host/pxamci.c: host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
989 host/pxamci.c: host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
990 host/pxamci.c: host->sg_cpu[i].dcmd = dcmd | sg_dma_len(&data->sg[i]);
991 host/pxamci.c: host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
992 host/pxamci.c: host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
993 host/pxamci.c: DDADR(host->dma) = host->sg_dma;
994 host/pxamci.c: DCSR(host->dma) = DCSR_RUN;
995 host/pxamci.c: WARN_ON(host->cmd != NULL);
996 host/pxamci.c: host->cmd = cmd;
997 host/pxamci.c: writel(cmd->opcode, host->base + MMC_CMD);
998 host/pxamci.c: writel(cmd->arg >> 16, host->base + MMC_ARGH);
999 host/pxamci.c: writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
1000 host/pxamci.c: writel(cmdat, host->base + MMC_CMDAT);
1001 host/pxamci.c: writel(host->clkrt, host->base + MMC_CLKRT);
1002 host/pxamci.c: writel(START_CLOCK, host->base + MMC_STRPCL);
1003 host/pxamci.c: host->mrq = NULL;
1004 host/pxamci.c: host->cmd = NULL;
1005 host/pxamci.c: host->data = NULL;
1006 host/pxamci.c: mmc_request_done(host->mmc, mrq);
1007 host/pxamci.c: struct mmc_command *cmd = host->cmd;
1008 host/pxamci.c: host->cmd = NULL;
1009 host/pxamci.c: v = readl(host->base + MMC_RES) & 0xffff;
1010 host/pxamci.c: u32 w1 = readl(host->base + MMC_RES) & 0xffff;
1011 host/pxamci.c: u32 w2 = readl(host->base + MMC_RES) & 0xffff;
1012 host/pxamci.c: if (host->data && cmd->error == MMC_ERR_NONE) {
1013 host/pxamci.c: pxamci_finish_request(host, host->mrq);
1014 host/pxamci.c: struct mmc_data *data = host->data;
1015 host/pxamci.c: DCSR(host->dma) = 0;
1016 host/pxamci.c: dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len,
1017 host/pxamci.c: host->dma_dir);
1018 host/pxamci.c: host->data = NULL;
1019 host/pxamci.c: if (host->mrq->stop) {
1020 host/pxamci.c: pxamci_start_cmd(host, host->mrq->stop, 0);
1021 host/pxamci.c: pxamci_finish_request(host, host->mrq);
1022 host/pxamci.c: ireg = readl(host->base + MMC_I_REG);
1023 host/pxamci.c: unsigned stat = readl(host->base + MMC_STAT);
1024 host/pxamci.c: WARN_ON(host->mrq != NULL);
1025 host/pxamci.c: host->mrq = mrq;
1026 host/pxamci.c: cmdat = host->cmdat;
1027 host/pxamci.c: host->cmdat &= ~CMDAT_INIT;
1028 host/pxamci.c: if (host->pdata && host->pdata->get_ro)
1029 host/pxamci.c: return host->pdata->get_ro(mmc_dev(mmc));
1030 host/pxamci.c: host->clkrt = fls(clk) - 1;
1031 host/pxamci.c: if (host->power_mode != ios->power_mode) {
1032 host/pxamci.c: host->power_mode = ios->power_mode;
1033 host/pxamci.c: if (host->pdata && host->pdata->setpower)
1034 host/pxamci.c: host->pdata->setpower(mmc_dev(mmc), ios->vdd);
1035 host/pxamci.c: host->cmdat |= CMDAT_INIT;
1036 host/pxamci.c: host->clkrt, host->cmdat);
1037 host/pxamci.c: mmc_detect_change(devid, host->pdata->detect_delay);
1038 host/pxamci.c: host->mmc = mmc;
1039 host/pxamci.c: host->dma = -1;
1040 host/pxamci.c: host->pdata = pdev->dev.platform_data;
1041 host/pxamci.c: mmc->ocr_avail = host->pdata ?
1042 host/pxamci.c: host->pdata->ocr_mask :
1043 host/pxamci.c: host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
1044 host/pxamci.c: if (!host->sg_cpu) {
1045 host/pxamci.c: spin_lock_init(&host->lock);
1046 host/pxamci.c: host->res = r;
1047 host/pxamci.c: host->irq = irq;
1048 host/pxamci.c: host->imask = MMC_I_MASK_ALL;
1049 host/pxamci.c: host->base = ioremap(r->start, SZ_4K);
1050 host/pxamci.c: if (!host->base) {
1051 host/pxamci.c: writel(0, host->base + MMC_SPI);
1052 host/pxamci.c: writel(64, host->base + MMC_RESTO);
1053 host/pxamci.c: writel(host->imask, host->base + MMC_I_MASK);
1054 host/pxamci.c: host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
1055 host/pxamci.c: if (host->dma < 0) {
1056 host/pxamci.c: ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
1057 host/pxamci.c: if (host->pdata && host->pdata->init)
1058 host/pxamci.c: host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
1059 host/pxamci.c: if (host->dma >= 0)
1060 host/pxamci.c: pxa_free_dma(host->dma);
1061 host/pxamci.c: if (host->base)
1062 host/pxamci.c: iounmap(host->base);
1063 host/pxamci.c: if (host->sg_cpu)
1064 host/pxamci.c: dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
1065 host/pxamci.c: if (host->pdata && host->pdata->exit)
1066 host/pxamci.c: host->pdata->exit(&pdev->dev, mmc);
1067 host/pxamci.c: host->base + MMC_I_MASK);
1068 host/pxamci.c: free_irq(host->irq, host);
1069 host/pxamci.c: pxa_free_dma(host->dma);
1070 host/pxamci.c: iounmap(host->base);
1071 host/pxamci.c: dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
1072 host/pxamci.c: release_resource(host->res);
1073 host/sdhci.c: readl(host->ioaddr + SDHCI_DMA_ADDRESS),
1074 host/sdhci.c: readw(host->ioaddr + SDHCI_HOST_VERSION));
1075 host/sdhci.c: readw(host->ioaddr + SDHCI_BLOCK_SIZE),
1076 host/sdhci.c: readw(host->ioaddr + SDHCI_BLOCK_COUNT));
1077 host/sdhci.c: readl(host->ioaddr + SDHCI_ARGUMENT),
1078 host/sdhci.c: readw(host->ioaddr + SDHCI_TRANSFER_MODE));
1079 host/sdhci.c: readl(host->ioaddr + SDHCI_PRESENT_STATE),
1080 host/sdhci.c: readb(host->ioaddr + SDHCI_HOST_CONTROL));
1081 host/sdhci.c: readb(host->ioaddr + SDHCI_POWER_CONTROL),
1082 host/sdhci.c: readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
1083 host/sdhci.c: readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
1084 host/sdhci.c: readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
1085 host/sdhci.c: readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
1086 host/sdhci.c: readl(host->ioaddr + SDHCI_INT_STATUS));
1087 host/sdhci.c: readl(host->ioaddr + SDHCI_INT_ENABLE),
1088 host/sdhci.c: readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
1089 host/sdhci.c: readw(host->ioaddr + SDHCI_ACMD12_ERR),
1090 host/sdhci.c: readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
1091 host/sdhci.c: readl(host->ioaddr + SDHCI_CAPABILITIES),
1092 host/sdhci.c: readl(host->ioaddr + SDHCI_MAX_CURRENT));
1093 host/sdhci.c: if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
1094 host/sdhci.c: if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
1095 host/sdhci.c: writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
1096 host/sdhci.c: host->clock = 0;
1097 host/sdhci.c: while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
1098 host/sdhci.c: mmc_hostname(host->mmc), (int)mask);
1099 host/sdhci.c: writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
1100 host/sdhci.c: writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
1101 host/sdhci.c: ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
1102 host/sdhci.c: writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
1103 host/sdhci.c: ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
1104 host/sdhci.c: writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
1105 host/sdhci.c: return page_address(host->cur_sg->page) + host->cur_sg->offset;
1106 host/sdhci.c: host->cur_sg++;
1107 host/sdhci.c: host->num_sg--;
1108 host/sdhci.c: if (host->num_sg > 0) {
1109 host/sdhci.c: host->offset = 0;
1110 host/sdhci.c: host->remain = host->cur_sg->length;
1111 host/sdhci.c: return host->num_sg;
1112 host/sdhci.c: blksize = host->data->blksz;
1113 host/sdhci.c: buffer = sdhci_sg_to_buffer(host) + host->offset;
1114 host/sdhci.c: data = readl(host->ioaddr + SDHCI_BUFFER);
1115 host/sdhci.c: size = min(host->remain, chunk_remain);
1116 host/sdhci.c: host->offset += size;
1117 host/sdhci.c: host->remain -= size;
1118 host/sdhci.c: if (host->remain == 0) {
1119 host/sdhci.c: blksize = host->data->blksz;
1120 host/sdhci.c: buffer = sdhci_sg_to_buffer(host) + host->offset;
1121 host/sdhci.c: size = min(host->remain, chunk_remain);
1122 host/sdhci.c: host->offset += size;
1123 host/sdhci.c: host->remain -= size;
1124 host/sdhci.c: writel(data, host->ioaddr + SDHCI_BUFFER);
1125 host/sdhci.c: if (host->remain == 0) {
1126 host/sdhci.c: BUG_ON(!host->data);
1127 host/sdhci.c: if (host->num_sg == 0)
1128 host/sdhci.c: if (host->data->flags & MMC_DATA_READ)
1129 host/sdhci.c: while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
1130 host/sdhci.c: if (host->data->flags & MMC_DATA_READ)
1131 host/sdhci.c: if (host->num_sg == 0)
1132 host/sdhci.c: WARN_ON(host->data);
1133 host/sdhci.c: BUG_ON(data->blksz > host->mmc->max_blk_size);
1134 host/sdhci.c: host->data = data;
1135 host/sdhci.c: host->data_early = 0;
1136 host/sdhci.c: data->timeout_clks / host->clock;
1137 host/sdhci.c: * (2) host->timeout_clk < 2^16
1138 host/sdhci.c: current_timeout = (1 << 13) * 1000 / host->timeout_clk;
1139 host/sdhci.c: mmc_hostname(host->mmc));
1140 host/sdhci.c: writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
1141 host/sdhci.c: if (host->flags & SDHCI_USE_DMA) {
1142 host/sdhci.c: count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
1143 host/sdhci.c: writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
1144 host/sdhci.c: host->cur_sg = data->sg;
1145 host/sdhci.c: host->num_sg = data->sg_len;
1146 host/sdhci.c: host->offset = 0;
1147 host/sdhci.c: host->remain = host->cur_sg->length;
1148 host/sdhci.c: host->ioaddr + SDHCI_BLOCK_SIZE);
1149 host/sdhci.c: writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
1150 host/sdhci.c: WARN_ON(!host->data);
1151 host/sdhci.c: if (host->flags & SDHCI_USE_DMA)
1152 host/sdhci.c: writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
1153 host/sdhci.c: BUG_ON(!host->data);
1154 host/sdhci.c: data = host->data;
1155 host/sdhci.c: host->data = NULL;
1156 host/sdhci.c: if (host->flags & SDHCI_USE_DMA) {
1157 host/sdhci.c: pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
1158 host/sdhci.c: blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
1159 host/sdhci.c: mmc_hostname(host->mmc));
1160 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1161 host/sdhci.c: WARN_ON(host->cmd);
1162 host/sdhci.c: if (host->mrq->data && (cmd == host->mrq->data->stop))
1163 host/sdhci.c: while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
1164 host/sdhci.c: "inhibit bit(s).\n", mmc_hostname(host->mmc));
1165 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1166 host/sdhci.c: mod_timer(&host->timer, jiffies + 10 * HZ);
1167 host/sdhci.c: host->cmd = cmd;
1168 host/sdhci.c: writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
1169 host/sdhci.c: mmc_hostname(host->mmc));
1170 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1171 host/sdhci.c: host->ioaddr + SDHCI_COMMAND);
1172 host/sdhci.c: BUG_ON(host->cmd == NULL);
1173 host/sdhci.c: if (host->cmd->flags & MMC_RSP_PRESENT) {
1174 host/sdhci.c: if (host->cmd->flags & MMC_RSP_136) {
1175 host/sdhci.c: host->cmd->resp[i] = readl(host->ioaddr +
1176 host/sdhci.c: host->cmd->resp[i] |=
1177 host/sdhci.c: readb(host->ioaddr +
1178 host/sdhci.c: host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
1179 host/sdhci.c: host->cmd->error = MMC_ERR_NONE;
1180 host/sdhci.c: if (host->data && host->data_early)
1181 host/sdhci.c: if (!host->cmd->data)
1182 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1183 host/sdhci.c: host->cmd = NULL;
1184 host/sdhci.c: if (clock == host->clock)
1185 host/sdhci.c: writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
1186 host/sdhci.c: if ((host->max_clk / div) <= clock)
1187 host/sdhci.c: writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
1188 host/sdhci.c: while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
1189 host/sdhci.c: "stabilised.\n", mmc_hostname(host->mmc));
1190 host/sdhci.c: writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
1191 host/sdhci.c: host->clock = clock;
1192 host/sdhci.c: if (host->power == power)
1193 host/sdhci.c: writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
1194 host/sdhci.c: if (!(host->chip->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1195 host/sdhci.c: writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
1196 host/sdhci.c: writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
1197 host/sdhci.c: host->power = power;
1198 host/sdhci.c: spin_lock_irqsave(&host->lock, flags);
1199 host/sdhci.c: WARN_ON(host->mrq != NULL);
1200 host/sdhci.c: host->mrq = mrq;
1201 host/sdhci.c: if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1202 host/sdhci.c: host->mrq->cmd->error = MMC_ERR_TIMEOUT;
1203 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1204 host/sdhci.c: spin_unlock_irqrestore(&host->lock, flags);
1205 host/sdhci.c: spin_lock_irqsave(&host->lock, flags);
1206 host/sdhci.c: writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
1207 host/sdhci.c: ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
1208 host/sdhci.c: writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
1209 host/sdhci.c: if(host->chip->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1210 host/sdhci.c: spin_unlock_irqrestore(&host->lock, flags);
1211 host/sdhci.c: spin_lock_irqsave(&host->lock, flags);
1212 host/sdhci.c: present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
1213 host/sdhci.c: spin_unlock_irqrestore(&host->lock, flags);
1214 host/sdhci.c: spin_lock_irqsave(&host->lock, flags);
1215 host/sdhci.c: if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1216 host/sdhci.c: if (host->mrq) {
1217 host/sdhci.c: mmc_hostname(host->mmc));
1218 host/sdhci.c: mmc_hostname(host->mmc));
1219 host/sdhci.c: host->mrq->cmd->error = MMC_ERR_FAILED;
1220 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1221 host/sdhci.c: spin_unlock_irqrestore(&host->lock, flags);
1222 host/sdhci.c: mmc_detect_change(host->mmc, msecs_to_jiffies(500));
1223 host/sdhci.c: spin_lock_irqsave(&host->lock, flags);
1224 host/sdhci.c: del_timer(&host->timer);
1225 host/sdhci.c: mrq = host->mrq;
1226 host/sdhci.c: if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1227 host/sdhci.c: clock = host->clock;
1228 host/sdhci.c: host->clock = 0;
1229 host/sdhci.c: host->mrq = NULL;
1230 host/sdhci.c: host->cmd = NULL;
1231 host/sdhci.c: host->data = NULL;
1232 host/sdhci.c: spin_unlock_irqrestore(&host->lock, flags);
1233 host/sdhci.c: mmc_request_done(host->mmc, mrq);
1234 host/sdhci.c: spin_lock_irqsave(&host->lock, flags);
1235 host/sdhci.c: if (host->mrq) {
1236 host/sdhci.c: "interrupt.\n", mmc_hostname(host->mmc));
1237 host/sdhci.c: if (host->data) {
1238 host/sdhci.c: host->data->error = MMC_ERR_TIMEOUT;
1239 host/sdhci.c: if (host->cmd)
1240 host/sdhci.c: host->cmd->error = MMC_ERR_TIMEOUT;
1241 host/sdhci.c: host->mrq->cmd->error = MMC_ERR_TIMEOUT;
1242 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1243 host/sdhci.c: spin_unlock_irqrestore(&host->lock, flags);
1244 host/sdhci.c: if (!host->cmd) {
1245 host/sdhci.c: mmc_hostname(host->mmc), (unsigned)intmask);
1246 host/sdhci.c: host->cmd->error = MMC_ERR_TIMEOUT;
1247 host/sdhci.c: host->cmd->error = MMC_ERR_BADCRC;
1248 host/sdhci.c: host->cmd->error = MMC_ERR_FAILED;
1249 host/sdhci.c: if (host->cmd->error != MMC_ERR_NONE)
1250 host/sdhci.c: tasklet_schedule(&host->finish_tasklet);
1251 host/sdhci.c: if (!host->data) {
1252 host/sdhci.c: mmc_hostname(host->mmc), (unsigned)intmask);
1253 host/sdhci.c: host->data->error = MMC_ERR_TIMEOUT;
1254 host/sdhci.c: host->data->error = MMC_ERR_BADCRC;
1255 host/sdhci.c: host->data->error = MMC_ERR_FAILED;
1256 host/sdhci.c: if (host->data->error != MMC_ERR_NONE)
1257 host/sdhci.c: writel(readl(host->ioaddr + SDHCI_DMA_ADDRESS),
1258 host/sdhci.c: host->ioaddr + SDHCI_DMA_ADDRESS);
1259 host/sdhci.c: if (host->cmd) {
1260 host/sdhci.c: host->data_early = 1;
1261 host/sdhci.c: spin_lock(&host->lock);
1262 host/sdhci.c: intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
1263 host/sdhci.c: DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
1264 host/sdhci.c: host->ioaddr + SDHCI_INT_STATUS);
1265 host/sdhci.c: tasklet_schedule(&host->card_tasklet);
1266 host/sdhci.c: host->ioaddr + SDHCI_INT_STATUS);
1267 host/sdhci.c: host->ioaddr + SDHCI_INT_STATUS);
1268 host/sdhci.c: mmc_hostname(host->mmc));
1269 host/sdhci.c: writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1270 host/sdhci.c: mmc_hostname(host->mmc), intmask);
1271 host/sdhci.c: writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1272 host/sdhci.c: spin_unlock(&host->lock);
1273 host/sdhci.c: host->mmc = mmc;
1274 host/sdhci.c: host->chip = chip;
1275 host/sdhci.c: host->bar = first_bar + slot;
1276 host/sdhci.c: host->addr = pci_resource_start(pdev, host->bar);
1277 host/sdhci.c: host->irq = pdev->irq;
1278 host/sdhci.c: DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1279 host/sdhci.c: snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1280 host/sdhci.c: ret = pci_request_region(pdev, host->bar, host->slot_descr);
1281 host/sdhci.c: host->ioaddr = ioremap_nocache(host->addr,
1282 host/sdhci.c: pci_resource_len(pdev, host->bar));
1283 host/sdhci.c: if (!host->ioaddr) {
1284 host/sdhci.c: version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1285 host/sdhci.c: "You may experience problems.\n", host->slot_descr,
1286 host/sdhci.c: caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1287 host/sdhci.c: host->flags |= SDHCI_USE_DMA;
1288 host/sdhci.c: host->flags |= SDHCI_USE_DMA;
1289 host/sdhci.c: host->flags |= SDHCI_USE_DMA;
1290 host/sdhci.c: if (host->flags & SDHCI_USE_DMA) {
1291 host/sdhci.c: "Falling back to PIO.\n", host->slot_descr);
1292 host/sdhci.c: host->flags &= ~SDHCI_USE_DMA;
1293 host/sdhci.c: if (host->flags & SDHCI_USE_DMA)
1294 host/sdhci.c: host->max_clk =
1295 host/sdhci.c: if (host->max_clk == 0) {
1296 host/sdhci.c: "frequency.\n", host->slot_descr);
1297 host/sdhci.c: host->max_clk *= 1000000;
1298 host/sdhci.c: host->timeout_clk =
1299 host/sdhci.c: if (host->timeout_clk == 0) {
1300 host/sdhci.c: "frequency.\n", host->slot_descr);
1301 host/sdhci.c: host->timeout_clk *= 1000;
1302 host/sdhci.c: mmc->f_min = host->max_clk / 256;
1303 host/sdhci.c: mmc->f_max = host->max_clk;
1304 host/sdhci.c: "support voltages.\n", host->slot_descr);
1305 host/sdhci.c: spin_lock_init(&host->lock);
1306 host/sdhci.c: if (host->flags & SDHCI_USE_DMA)
1307 host/sdhci.c: host->slot_descr);
1308 host/sdhci.c: tasklet_init(&host->card_tasklet,
1309 host/sdhci.c: tasklet_init(&host->finish_tasklet,
1310 host/sdhci.c: setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1311 host/sdhci.c: ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1312 host/sdhci.c: host->slot_descr, host);
1313 host/sdhci.c: host->addr, host->irq,
1314 host/sdhci.c: (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1315 host/sdhci.c: tasklet_kill(&host->card_tasklet);
1316 host/sdhci.c: tasklet_kill(&host->finish_tasklet);
1317 host/sdhci.c: iounmap(host->ioaddr);
1318 host/sdhci.c: pci_release_region(pdev, host->bar);
1319 host/sdhci.c: mmc = host->mmc;
1320 host/sdhci.c: free_irq(host->irq, host);
1321 host/sdhci.c: del_timer_sync(&host->timer);
1322 host/sdhci.c: tasklet_kill(&host->card_tasklet);
1323 host/sdhci.c: tasklet_kill(&host->finish_tasklet);
1324 host/sdhci.c: iounmap(host->ioaddr);
1325 host/sdhci.c: pci_release_region(pdev, host->bar);
1326 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1327 host/tifm_sd.c: if (host->cmd_flags & DATA_CARRY) {
1328 host/tifm_sd.c: buf[pos++] = host->bounce_buf_data[0];
1329 host/tifm_sd.c: host->cmd_flags &= ~DATA_CARRY;
1330 host/tifm_sd.c: host->bounce_buf_data[0] = (val >> 8) & 0xff;
1331 host/tifm_sd.c: host->cmd_flags |= DATA_CARRY;
1332 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1333 host/tifm_sd.c: if (host->cmd_flags & DATA_CARRY) {
1334 host/tifm_sd.c: val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00);
1335 host/tifm_sd.c: host->cmd_flags &= ~DATA_CARRY;
1336 host/tifm_sd.c: host->bounce_buf_data[0] = val & 0xff;
1337 host/tifm_sd.c: host->cmd_flags |= DATA_CARRY;
1338 host/tifm_sd.c: struct mmc_data *r_data = host->req->cmd->data;
1339 host/tifm_sd.c: if (host->sg_pos == host->sg_len)
1340 host/tifm_sd.c: cnt = sg[host->sg_pos].length - host->block_pos;
1341 host/tifm_sd.c: host->block_pos = 0;
1342 host/tifm_sd.c: host->sg_pos++;
1343 host/tifm_sd.c: if (host->sg_pos == host->sg_len) {
1344 host/tifm_sd.c: writel(host->bounce_buf_data[0],
1345 host/tifm_sd.c: host->dev->addr
1346 host/tifm_sd.c: cnt = sg[host->sg_pos].length;
1347 host/tifm_sd.c: off = sg[host->sg_pos].offset + host->block_pos;
1348 host/tifm_sd.c: pg = nth_page(sg[host->sg_pos].page, off >> PAGE_SHIFT);
1349 host/tifm_sd.c: host->block_pos += p_cnt;
1350 host/tifm_sd.c: dev_dbg(&host->dev->dev, "bouncing block\n");
1351 host/tifm_sd.c: cnt = sg[host->sg_pos].length - host->block_pos;
1352 host/tifm_sd.c: host->block_pos = 0;
1353 host/tifm_sd.c: host->sg_pos++;
1354 host/tifm_sd.c: if (host->sg_pos == host->sg_len)
1355 host/tifm_sd.c: cnt = sg[host->sg_pos].length;
1356 host/tifm_sd.c: off = sg[host->sg_pos].offset + host->block_pos;
1357 host/tifm_sd.c: pg = nth_page(sg[host->sg_pos].page, off >> PAGE_SHIFT);
1358 host/tifm_sd.c: tifm_sd_copy_page(host->bounce_buf.page,
1359 host/tifm_sd.c: tifm_sd_copy_page(pg, p_off, host->bounce_buf.page,
1360 host/tifm_sd.c: host->block_pos += p_cnt;
1361 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1362 host/tifm_sd.c: if (host->sg_pos == host->sg_len)
1363 host/tifm_sd.c: if (host->cmd_flags & DATA_CARRY) {
1364 host/tifm_sd.c: host->cmd_flags &= ~DATA_CARRY;
1365 host/tifm_sd.c: if (host->sg_pos == host->sg_len)
1366 host/tifm_sd.c: dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos;
1367 host/tifm_sd.c: host->block_pos = 0;
1368 host/tifm_sd.c: host->sg_pos++;
1369 host/tifm_sd.c: if (host->sg_pos == host->sg_len)
1370 host/tifm_sd.c: dma_len = sg_dma_len(&r_data->sg[host->sg_pos]);
1371 host/tifm_sd.c: dma_off = host->block_pos;
1372 host/tifm_sd.c: host->block_pos += dma_blk_cnt * r_data->blksz;
1373 host/tifm_sd.c: dma_off = host->block_pos;
1374 host/tifm_sd.c: host->block_pos += t_size;
1375 host/tifm_sd.c: sg = &r_data->sg[host->sg_pos];
1376 host/tifm_sd.c: host->cmd_flags |= DATA_CARRY;
1377 host/tifm_sd.c: sg = &host->bounce_buf;
1378 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1379 host/tifm_sd.c: if (host->open_drain)
1380 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1381 host/tifm_sd.c: struct mmc_command *cmd = host->req->cmd;
1382 host/tifm_sd.c: if (!(host->cmd_flags & CMD_READY))
1383 host/tifm_sd.c: if ((host->cmd_flags & SCMD_ACTIVE)
1384 host/tifm_sd.c: && !(host->cmd_flags & SCMD_READY))
1385 host/tifm_sd.c: if (!(host->cmd_flags & BRS_READY))
1386 host/tifm_sd.c: if (!(host->no_dma || (host->cmd_flags & FIFO_READY)))
1387 host/tifm_sd.c: if (host->req->stop) {
1388 host/tifm_sd.c: if (!(host->cmd_flags & SCMD_ACTIVE)) {
1389 host/tifm_sd.c: host->cmd_flags |= SCMD_ACTIVE;
1390 host/tifm_sd.c: tifm_sd_exec(host, host->req->stop);
1391 host/tifm_sd.c: if (!(host->cmd_flags & SCMD_READY)
1392 host/tifm_sd.c: || (host->cmd_flags & CARD_BUSY))
1393 host/tifm_sd.c: if (host->cmd_flags & CARD_BUSY)
1394 host/tifm_sd.c: if (host->req->stop) {
1395 host/tifm_sd.c: if (!(host->cmd_flags & SCMD_ACTIVE)) {
1396 host/tifm_sd.c: host->cmd_flags |= SCMD_ACTIVE;
1397 host/tifm_sd.c: tifm_sd_exec(host, host->req->stop);
1398 host/tifm_sd.c: if (!(host->cmd_flags & SCMD_READY))
1399 host/tifm_sd.c: tasklet_schedule(&host->finish_tasklet);
1400 host/tifm_sd.c: fifo_status, host->cmd_flags);
1401 host/tifm_sd.c: if (host->req) {
1402 host/tifm_sd.c: r_data = host->req->cmd->data;
1403 host/tifm_sd.c: host->cmd_flags |= FIFO_READY;
1404 host/tifm_sd.c: host_status, host->cmd_flags);
1405 host/tifm_sd.c: if (host->req) {
1406 host/tifm_sd.c: cmd = host->req->cmd;
1407 host/tifm_sd.c: if (host->req->stop) {
1408 host/tifm_sd.c: if (host->cmd_flags & SCMD_ACTIVE) {
1409 host/tifm_sd.c: host->req->stop->error = cmd_error;
1410 host/tifm_sd.c: host->cmd_flags |= SCMD_READY;
1411 host/tifm_sd.c: host->cmd_flags |= SCMD_ACTIVE;
1412 host/tifm_sd.c: tifm_sd_exec(host, host->req->stop);
1413 host/tifm_sd.c: if (!(host->cmd_flags & CMD_READY)) {
1414 host/tifm_sd.c: host->cmd_flags |= CMD_READY;
1415 host/tifm_sd.c: } else if (host->cmd_flags & SCMD_ACTIVE) {
1416 host/tifm_sd.c: host->cmd_flags |= SCMD_READY;
1417 host/tifm_sd.c: tifm_sd_fetch_resp(host->req->stop,
1418 host/tifm_sd.c: host->cmd_flags |= BRS_READY;
1419 host/tifm_sd.c: if (host->no_dma && cmd->data) {
1420 host/tifm_sd.c: host->cmd_flags &= ~CARD_BUSY;
1421 host/tifm_sd.c: host->cmd_flags |= CARD_BUSY;
1422 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1423 host/tifm_sd.c: ((1000000000UL / host->clk_freq) * host->clk_div);
1424 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1425 host/tifm_sd.c: if (host->eject) {
1426 host/tifm_sd.c: if (host->req) {
1427 host/tifm_sd.c: host->cmd_flags = 0;
1428 host/tifm_sd.c: host->block_pos = 0;
1429 host/tifm_sd.c: host->sg_pos = 0;
1430 host/tifm_sd.c: if (host->no_dma) {
1431 host/tifm_sd.c: host->sg_len = r_data->sg_len;
1432 host/tifm_sd.c: sg_init_one(&host->bounce_buf, host->bounce_buf_data,
1433 host/tifm_sd.c: if(1 != tifm_map_sg(sock, &host->bounce_buf, 1,
1434 host/tifm_sd.c: host->sg_len = tifm_map_sg(sock, r_data->sg,
1435 host/tifm_sd.c: if (host->sg_len < 1) {
1436 host/tifm_sd.c: tifm_unmap_sg(sock, &host->bounce_buf, 1,
1437 host/tifm_sd.c: host->req = mrq;
1438 host/tifm_sd.c: mod_timer(&host->timer, jiffies + host->timeout_jiffies);
1439 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1440 host/tifm_sd.c: del_timer(&host->timer);
1441 host/tifm_sd.c: mrq = host->req;
1442 host/tifm_sd.c: host->req = NULL;
1443 host/tifm_sd.c: if (host->no_dma) {
1444 host/tifm_sd.c: tifm_unmap_sg(sock, &host->bounce_buf, 1,
1445 host/tifm_sd.c: host->dev->dev.bus_id, host->req->cmd->opcode, host->cmd_flags);
1446 host/tifm_sd.c: tifm_eject(host->dev);
1447 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1448 host/tifm_sd.c: host->clk_freq = 20000000;
1449 host/tifm_sd.c: host->clk_div = clk_div1;
1450 host/tifm_sd.c: host->clk_freq = 24000000;
1451 host/tifm_sd.c: host->clk_div = clk_div2;
1452 host/tifm_sd.c: host->clk_div = 0;
1453 host/tifm_sd.c: host->clk_div &= TIFM_MMCSD_CLKMASK;
1454 host/tifm_sd.c: writel(host->clk_div
1455 host/tifm_sd.c: host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN);
1456 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1457 host/tifm_sd.c: struct tifm_dev *sock = host->dev;
1458 host/tifm_sd.c: host->clk_div = 61;
1459 host/tifm_sd.c: host->clk_freq = 20000000;
1460 host/tifm_sd.c: writel(host->clk_div | TIFM_MMCSD_POWER,
1461 host/tifm_sd.c: writel(host->clk_div | TIFM_MMCSD_POWER,
1462 host/tifm_sd.c: host->no_dma = no_dma;
1463 host/tifm_sd.c: host->dev = sock;
1464 host/tifm_sd.c: host->timeout_jiffies = msecs_to_jiffies(1000);
1465 host/tifm_sd.c: tasklet_init(&host->finish_tasklet, tifm_sd_end_cmd,
1466 host/tifm_sd.c: setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host);
1467 host/tifm_sd.c: host->eject = 1;
1468 host/tifm_sd.c: tasklet_kill(&host->finish_tasklet);
1469 host/tifm_sd.c: if (host->req) {
1470 host/tifm_sd.c: host->req->cmd->error = MMC_ERR_TIMEOUT;
1471 host/tifm_sd.c: if (host->req->stop)
1472 host/tifm_sd.c: host->req->stop->error = MMC_ERR_TIMEOUT;
1473 host/tifm_sd.c: tasklet_schedule(&host->finish_tasklet);
1474 host/tifm_sd.c: host->eject = 1;
1475 host/wbsd.c: BUG_ON(host->config == 0);
1476 host/wbsd.c: outb(host->unlock_code, host->config);
1477 host/wbsd.c: outb(host->unlock_code, host->config);
1478 host/wbsd.c: BUG_ON(host->config == 0);
1479 host/wbsd.c: outb(LOCK_CODE, host->config);
1480 host/wbsd.c: BUG_ON(host->config == 0);
1481 host/wbsd.c: outb(reg, host->config);
1482 host/wbsd.c: outb(value, host->config + 1);
1483 host/wbsd.c: BUG_ON(host->config == 0);
1484 host/wbsd.c: outb(reg, host->config);
1485 host/wbsd.c: return inb(host->config + 1);
1486 host/wbsd.c: outb(index, host->base + WBSD_IDXR);
1487 host/wbsd.c: outb(value, host->base + WBSD_DATAR);
1488 host/wbsd.c: outb(index, host->base + WBSD_IDXR);
1489 host/wbsd.c: return inb(host->base + WBSD_DATAR);
1490 host/wbsd.c: host->flags &= ~WBSD_FIGNORE_DETECT;
1491 host/wbsd.c: host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
1492 host/wbsd.c: outb(WBSD_POWER_N, host->base + WBSD_CSR);
1493 host/wbsd.c: if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
1494 host/wbsd.c: host->flags |= WBSD_FCARD_PRESENT;
1495 host/wbsd.c: host->flags &= ~WBSD_FCARD_PRESENT;
1496 host/wbsd.c: outb(ier, host->base + WBSD_EIR);
1497 host/wbsd.c: inb(host->base + WBSD_ISR);
1498 host/wbsd.c: printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc));
1499 host/wbsd.c: if (host->dma >= 0) {
1500 host/wbsd.c: disable_dma(host->dma);
1501 host/wbsd.c: clear_dma_ff(host->dma);
1502 host/wbsd.c: host->mrq = NULL;
1503 host/wbsd.c: spin_unlock(&host->lock);
1504 host/wbsd.c: mmc_request_done(host->mmc, mrq);
1505 host/wbsd.c: spin_lock(&host->lock);
1506 host/wbsd.c: host->cur_sg = data->sg;
1507 host/wbsd.c: host->num_sg = data->sg_len;
1508 host/wbsd.c: host->offset = 0;
1509 host/wbsd.c: host->remain = host->cur_sg->length;
1510 host/wbsd.c: host->cur_sg++;
1511 host/wbsd.c: host->num_sg--;
1512 host/wbsd.c: if (host->num_sg > 0) {
1513 host/wbsd.c: host->offset = 0;
1514 host/wbsd.c: host->remain = host->cur_sg->length;
1515 host/wbsd.c: return host->num_sg;
1516 host/wbsd.c: return page_address(host->cur_sg->page) + host->cur_sg->offset;
1517 host/wbsd.c: char *dmabuf = host->dma_buffer;
1518 host/wbsd.c: char *dmabuf = host->dma_buffer;
1519 host/wbsd.c: host->isr = 0;
1520 host/wbsd.c: outb(cmd->opcode, host->base + WBSD_CMDR);
1521 host/wbsd.c: outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
1522 host/wbsd.c: isr = host->isr;
1523 host/wbsd.c: struct mmc_data *data = host->mrq->cmd->data;
1524 host/wbsd.c: if (host->num_sg == 0)
1525 host/wbsd.c: buffer = wbsd_sg_to_buffer(host) + host->offset;
1526 host/wbsd.c: while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) {
1527 host/wbsd.c: *buffer = inb(host->base + WBSD_DFR);
1528 host/wbsd.c: host->offset++;
1529 host/wbsd.c: host->remain--;
1530 host/wbsd.c: if (host->remain == 0) {
1531 host/wbsd.c: tasklet_schedule(&host->fifo_tasklet);
1532 host/wbsd.c: struct mmc_data *data = host->mrq->cmd->data;
1533 host/wbsd.c: if (host->num_sg == 0)
1534 host/wbsd.c: buffer = wbsd_sg_to_buffer(host) + host->offset;
1535 host/wbsd.c: while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) {
1536 host/wbsd.c: outb(*buffer, host->base + WBSD_DFR);
1537 host/wbsd.c: host->offset++;
1538 host/wbsd.c: host->remain--;
1539 host/wbsd.c: if (host->remain == 0) {
1540 host/wbsd.c: tasklet_schedule(&host->fifo_tasklet);
1541 host/wbsd.c: if (host->bus_width == MMC_BUS_WIDTH_1) {
1542 host/wbsd.c: } else if (host->bus_width == MMC_BUS_WIDTH_4) {
1543 host/wbsd.c: if (host->dma >= 0) {
1544 host/wbsd.c: disable_dma(host->dma);
1545 host/wbsd.c: clear_dma_ff(host->dma);
1546 host/wbsd.c: set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
1547 host/wbsd.c: set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
1548 host/wbsd.c: set_dma_addr(host->dma, host->dma_addr);
1549 host/wbsd.c: set_dma_count(host->dma, size);
1550 host/wbsd.c: enable_dma(host->dma);
1551 host/wbsd.c: host->firsterr = 1;
1552 host/wbsd.c: WARN_ON(host->mrq == NULL);
1553 host/wbsd.c: if (host->dma >= 0) {
1554 host/wbsd.c: disable_dma(host->dma);
1555 host/wbsd.c: clear_dma_ff(host->dma);
1556 host/wbsd.c: count = get_dma_residue(host->dma);
1557 host/wbsd.c: data->bytes_xfered = host->mrq->data->blocks *
1558 host/wbsd.c: host->mrq->data->blksz - count;
1559 host/wbsd.c: mmc_hostname(host->mmc), count);
1560 host/wbsd.c: wbsd_request_end(host, host->mrq);
1561 host/wbsd.c: spin_lock_bh(&host->lock);
1562 host/wbsd.c: BUG_ON(host->mrq != NULL);
1563 host/wbsd.c: host->mrq = mrq;
1564 host/wbsd.c: if (!(host->flags & WBSD_FCARD_PRESENT)) {
1565 host/wbsd.c: mmc_hostname(host->mmc), cmd->opcode);
1566 host/wbsd.c: if (host->dma == -1)
1567 host/wbsd.c: tasklet_schedule(&host->fifo_tasklet);
1568 host/wbsd.c: spin_unlock_bh(&host->lock);
1569 host/wbsd.c: spin_unlock_bh(&host->lock);
1570 host/wbsd.c: spin_lock_bh(&host->lock);
1571 host/wbsd.c: if (clk != host->clk) {
1572 host/wbsd.c: host->clk = clk;
1573 host/wbsd.c: pwr = inb(host->base + WBSD_CSR);
1574 host/wbsd.c: outb(pwr, host->base + WBSD_CSR);
1575 host/wbsd.c: host->flags |= WBSD_FIGNORE_DETECT;
1576 host/wbsd.c: mod_timer(&host->ignore_timer, jiffies + HZ / 100);
1577 host/wbsd.c: host->bus_width = ios->bus_width;
1578 host/wbsd.c: spin_unlock_bh(&host->lock);
1579 host/wbsd.c: spin_lock_bh(&host->lock);
1580 host/wbsd.c: csr = inb(host->base + WBSD_CSR);
1581 host/wbsd.c: outb(csr, host->base + WBSD_CSR);
1582 host/wbsd.c: csr = inb(host->base + WBSD_CSR);
1583 host/wbsd.c: outb(csr, host->base + WBSD_CSR);
1584 host/wbsd.c: spin_unlock_bh(&host->lock);
1585 host/wbsd.c: spin_lock_bh(&host->lock);
1586 host/wbsd.c: host->flags &= ~WBSD_FIGNORE_DETECT;
1587 host/wbsd.c: tasklet_schedule(&host->card_tasklet);
1588 host/wbsd.c: spin_unlock_bh(&host->lock);
1589 host/wbsd.c: WARN_ON(!host->mrq);
1590 host/wbsd.c: if (!host->mrq)
1591 host/wbsd.c: WARN_ON(!host->mrq->cmd);
1592 host/wbsd.c: if (!host->mrq->cmd)
1593 host/wbsd.c: WARN_ON(!host->mrq->cmd->data);
1594 host/wbsd.c: if (!host->mrq->cmd->data)
1595 host/wbsd.c: return host->mrq->cmd->data;
1596 host/wbsd.c: spin_lock(&host->lock);
1597 host/wbsd.c: if (host->flags & WBSD_FIGNORE_DETECT) {
1598 host/wbsd.c: spin_unlock(&host->lock);
1599 host/wbsd.c: csr = inb(host->base + WBSD_CSR);
1600 host/wbsd.c: if (!(host->flags & WBSD_FCARD_PRESENT)) {
1601 host/wbsd.c: host->flags |= WBSD_FCARD_PRESENT;
1602 host/wbsd.c: } else if (host->flags & WBSD_FCARD_PRESENT) {
1603 host/wbsd.c: host->flags &= ~WBSD_FCARD_PRESENT;
1604 host/wbsd.c: if (host->mrq) {
1605 host/wbsd.c: mmc_hostname(host->mmc));
1606 host/wbsd.c: host->mrq->cmd->error = MMC_ERR_FAILED;
1607 host/wbsd.c: tasklet_schedule(&host->finish_tasklet);
1608 host/wbsd.c: spin_unlock(&host->lock);
1609 host/wbsd.c: mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1610 host/wbsd.c: spin_lock(&host->lock);
1611 host/wbsd.c: if (!host->mrq)
1612 host/wbsd.c: if (host->num_sg == 0) {
1613 host/wbsd.c: tasklet_schedule(&host->finish_tasklet);
1614 host/wbsd.c: spin_unlock(&host->lock);
1615 host/wbsd.c: spin_lock(&host->lock);
1616 host/wbsd.c: if (!host->mrq)
1617 host/wbsd.c: tasklet_schedule(&host->finish_tasklet);
1618 host/wbsd.c: spin_unlock(&host->lock);
1619 host/wbsd.c: spin_lock(&host->lock);
1620 host/wbsd.c: if (!host->mrq)
1621 host/wbsd.c: tasklet_schedule(&host->finish_tasklet);
1622 host/wbsd.c: spin_unlock(&host->lock);
1623 host/wbsd.c: spin_lock(&host->lock);
1624 host/wbsd.c: WARN_ON(!host->mrq);
1625 host/wbsd.c: if (!host->mrq)
1626 host/wbsd.c: spin_unlock(&host->lock);
1627 host/wbsd.c: isr = inb(host->base + WBSD_ISR);
1628 host/wbsd.c: host->isr |= isr;
1629 host/wbsd.c: tasklet_schedule(&host->card_tasklet);
1630 host/wbsd.c: tasklet_schedule(&host->fifo_tasklet);
1631 host/wbsd.c: tasklet_hi_schedule(&host->crc_tasklet);
1632 host/wbsd.c: tasklet_hi_schedule(&host->timeout_tasklet);
1633 host/wbsd.c: tasklet_schedule(&host->finish_tasklet);
1634 host/wbsd.c: host->mmc = mmc;
1635 host/wbsd.c: host->dma = -1;
1636 host/wbsd.c: spin_lock_init(&host->lock);
1637 host/wbsd.c: init_timer(&host->ignore_timer);
1638 host/wbsd.c: host->ignore_timer.data = (unsigned long)host;
1639 host/wbsd.c: host->ignore_timer.function = wbsd_reset_ignore;
1640 host/wbsd.c: del_timer_sync(&host->ignore_timer);
1641 host/wbsd.c: host->config = config_ports[i];
1642 host/wbsd.c: host->unlock_code = unlock_codes[j];
1643 host/wbsd.c: host->chip_id = id;
1644 host/wbsd.c: host->config = 0;
1645 host/wbsd.c: host->unlock_code = 0;
1646 host/wbsd.c: host->base = base;
1647 host/wbsd.c: if (host->base)
1648 host/wbsd.c: release_region(host->base, 8);
1649 host/wbsd.c: host->base = 0;
1650 host/wbsd.c: if (host->config)
1651 host/wbsd.c: release_region(host->config, 2);
1652 host/wbsd.c: host->config = 0;
1653 host/wbsd.c: host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
1654 host/wbsd.c: if (!host->dma_buffer)
1655 host/wbsd.c: host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
1656 host/wbsd.c: if ((host->dma_addr & 0xffff) != 0)
1657 host/wbsd.c: else if (host->dma_addr >= 0x1000000)
1658 host/wbsd.c: host->dma = dma;
1659 host/wbsd.c: dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
1660 host/wbsd.c: host->dma_addr = (dma_addr_t)NULL;
1661 host/wbsd.c: kfree(host->dma_buffer);
1662 host/wbsd.c: host->dma_buffer = NULL;
1663 host/wbsd.c: if (host->dma_addr) {
1664 host/wbsd.c: dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
1665 host/wbsd.c: kfree(host->dma_buffer);
1666 host/wbsd.c: if (host->dma >= 0)
1667 host/wbsd.c: free_dma(host->dma);
1668 host/wbsd.c: host->dma = -1;
1669 host/wbsd.c: host->dma_buffer = NULL;
1670 host/wbsd.c: host->dma_addr = (dma_addr_t)NULL;
1671 host/wbsd.c: host->irq = irq;
1672 host/wbsd.c: tasklet_init(&host->card_tasklet, wbsd_tasklet_card,
1673 host/wbsd.c: tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo,
1674 host/wbsd.c: tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc,
1675 host/wbsd.c: tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout,
1676 host/wbsd.c: tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish,
1677 host/wbsd.c: if (!host->irq)
1678 host/wbsd.c: free_irq(host->irq, host);
1679 host/wbsd.c: host->irq = 0;
1680 host/wbsd.c: tasklet_kill(&host->card_tasklet);
1681 host/wbsd.c: tasklet_kill(&host->fifo_tasklet);
1682 host/wbsd.c: tasklet_kill(&host->crc_tasklet);
1683 host/wbsd.c: tasklet_kill(&host->timeout_tasklet);
1684 host/wbsd.c: tasklet_kill(&host->finish_tasklet);
1685 host/wbsd.c: wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1686 host/wbsd.c: wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
1687 host/wbsd.c: wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
1688 host/wbsd.c: if (host->dma >= 0)
1689 host/wbsd.c: wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
1690 host/wbsd.c: if (base != host->base)
1691 host/wbsd.c: if (irq != host->irq)
1692 host/wbsd.c: if ((dma != host->dma) && (host->dma != -1))
1693 host/wbsd.c: if ((host->config != 0) && !wbsd_chip_validate(host)) {
1694 host/wbsd.c: if (host->config) {
1695 host/wbsd.c: if (host->chip_id != 0)
1696 host/wbsd.c: printk(" id %x", (int)host->chip_id);
1697 host/wbsd.c: printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1698 host/wbsd.c: if (host->dma >= 0)
1699 host/wbsd.c: printk(" dma %d", (int)host->dma);
1700 host/wbsd.c: return mmc_suspend_host(host->mmc, state);
1701 host/wbsd.c: return mmc_resume_host(host->mmc);
1702 host/wbsd.c: if (host->config != 0) {
1703 host/moxasd.c: host->cur_sg = data->sg;
1704 host/moxasd.c: host->num_sg = data->sg_len;
1705 host/moxasd.c: host->remain = host->cur_sg->length;
1706 host/moxasd.c: if ( host->remain > host->size )
1707 host/moxasd.c: host->remain = host->size;
1708 host/moxasd.c: host->mapped_sg = NULL;
1709 host/moxasd.c: struct mmc_data *data=host->data;
1710 host/moxasd.c: host->cur_sg++;
1711 host/moxasd.c: host->num_sg--;
1712 host/moxasd.c: if (host->num_sg > 0) {
1713 host/moxasd.c: host->remain = host->cur_sg->length;
1714 host/moxasd.c: remain = host->size - data->bytes_xfered;
1715 host/moxasd.c: if ( remain > 0 && remain < host->remain ) {
1716 host/moxasd.c: host->remain = remain;
1717 host/moxasd.c: return host->num_sg;
1718 host/moxasd.c: host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
1719 host/moxasd.c: return host->mapped_sg + host->cur_sg->offset;
1720 host/moxasd.c: if ( host->mapped_sg ) {
1721 host/moxasd.c: kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
1722 host/moxasd.c: if ( host->size == data->bytes_xfered ) {
1723 host/moxasd.c: if ( host->size > MSD_FIFO_LENB && host->dma ) {
1724 host/moxasd.c: param.size = host->remain;
1725 host/moxasd.c: param.dest_addr = (unsigned int)&host->reg->data_window;
1726 host/moxasd.c: param.source_addr = (unsigned int)&host->reg->data_window;
1727 host/moxasd.c: data->bytes_xfered += host->remain;
1728 host/moxasd.c: apb_dma_conf(host->dma, ¶m);
1729 host/moxasd.c: apb_dma_enable(host->dma);
1730 host/moxasd.c: wcnt = host->remain >> 2;
1731 host/moxasd.c: writel(*(unsigned int *)buffer, &host->reg->data_window);
1732 host/moxasd.c: *(unsigned int *)buffer = readl(&host->reg->data_window);
1733 host/moxasd.c: host->remain -= wcnt;
1734 host/moxasd.c: struct mmc_request *mrq=host->mrq;
1735 host/moxasd.c: host->mrq = NULL;
1736 host/moxasd.c: host->data = NULL;
1737 host/moxasd.c: mmc_request_done(host->mmc, mrq);
1738 host/moxasd.c: host->data = data;
1739 host/moxasd.c: host->size = data->blocks * data->blksz;
1740 host/moxasd.c: host->size = data->blocks << data->blksz_bits;
1741 host/moxasd.c: timeout = (host->mmc->f_max/1000) * (data->timeout_ns/1000);
1742 host/moxasd.c: if ( host->size > MSD_FIFO_LENB && host->dma ) {
1743 host/moxasd.c: writel(timeout, &host->reg->data_timer);
1744 host/moxasd.c: writel(host->size, &host->reg->data_length);
1745 host/moxasd.c: writel(datactrl, &host->reg->data_control);
1746 host/moxasd.c: if ( host->size > MSD_FIFO_LENB && host->dma ) {
1747 host/moxasd.c: writel(MSD_INT_CARD_CHANGE, &host->reg->interrupt_mask);
1748 host/moxasd.c: //tasklet_schedule(&host->fifo_run_tasklet);
1749 host/moxasd.c: writel(MSD_INT_FIFO_URUN|MSD_INT_FIFO_ORUN|MSD_INT_CARD_CHANGE, &host->reg->interrupt_mask);
1750 host/moxasd.c: writel(MSD_CLR_RSP_TIMEOUT|MSD_CLR_RSP_CRC_OK|MSD_CLR_RSP_CRC_FAIL|MSD_CLR_CMD_SENT, &host->reg->clear);
1751 host/moxasd.c: writel(cmd->arg, &host->reg->argument);
1752 host/moxasd.c: writel(cmdctrl|MSD_CMD_EN, &host->reg->command);
1753 host/moxasd.c: status = readl(&host->reg->status);
1754 host/moxasd.c: writel(MSD_CLR_RSP_TIMEOUT, &host->reg->clear);
1755 host/moxasd.c: writel(MSD_CLR_RSP_CRC_FAIL, &host->reg->clear);
1756 host/moxasd.c: writel(MSD_CLR_RSP_CRC_OK, &host->reg->clear);
1757 host/moxasd.c: cmd->resp[0] = readl(&host->reg->response0);
1758 host/moxasd.c: cmd->resp[1] = readl(&host->reg->response1);
1759 host/moxasd.c: cmd->resp[2] = readl(&host->reg->response2);
1760 host/moxasd.c: cmd->resp[3] = readl(&host->reg->response3);
1761 host/moxasd.c: writel(MSD_CLR_CMD_SENT, &host->reg->clear);
1762 host/moxasd.c: status = readl(&host->reg->status);
1763 host/moxasd.c: //writel(MSD_CLR_CARD_CHANGE, &host->reg->clear);
1764 host/moxasd.c: tasklet_schedule(&host->card_change_tasklet);
1765 host/moxasd.c: writel(status&(MSD_FIFO_ORUN|MSD_FIFO_URUN), &host->reg->clear);
1766 host/moxasd.c: tasklet_schedule(&host->fifo_run_tasklet);
1767 host/moxasd.c: spin_lock_irqsave(&host->lock, flags);
1768 host/moxasd.c: data = host->data;
1769 host/moxasd.c: if ( host->mrq == NULL || data == NULL ) {
1770 host/moxasd.c: spin_unlock_irqrestore(&host->lock, flags);
1771 host/moxasd.c: if ( host->size == data->bytes_xfered ) {
1772 host/moxasd.c: status = readl(&host->reg->status);
1773 host/moxasd.c: writel(MSD_CLR_DATA_CRC_OK, &host->reg->clear);
1774 host/moxasd.c: writel(MSD_CLR_DATA_CRC_FAIL, &host->reg->clear);
1775 host/moxasd.c: writel(MSD_CLR_DATA_END, &host->reg->clear);
1776 host/moxasd.c: spin_unlock_irqrestore(&host->lock, flags);
1777 host/moxasd.c: spin_unlock_irqrestore(&host->lock, flags);
1778 host/moxasd.c: spin_lock_irqsave(&host->lock, flags);
1779 host/moxasd.c: status = readl(&host->reg->status);
1780 host/moxasd.c: if ( host->data ) {
1781 host/moxasd.c: if ( host->dma && host->size > MSD_FIFO_LENB ) {
1782 host/moxasd.c: apb_dma_disable(host->dma);
1783 host/moxasd.c: host->size = host->data->bytes_xfered;
1784 host/moxasd.c: host->data->error = MMC_ERR_TIMEOUT;
1785 host/moxasd.c: if ( readl(&host->reg->clock_control) & MSD_CLK_SD ) { // SD
1786 host/moxasd.c: host->mmc->f_max = 25000000;
1787 host/moxasd.c: host->mmc->mode = MMC_MODE_SD;
1788 host/moxasd.c: host->mmc->f_max = 20000000;
1789 host/moxasd.c: host->mmc->mode = MMC_MODE_MMC;
1790 host/moxasd.c: writel(MSD_CLR_CARD_CHANGE, &host->reg->clear);
1791 host/moxasd.c: spin_unlock_irqrestore(&host->lock, flags);
1792 host/moxasd.c: mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1793 host/moxasd.c: tasklet_schedule(&host->fifo_run_tasklet);
1794 host/moxasd.c: spin_lock_irqsave(&host->lock, flags);
1795 host/moxasd.c: host->mrq = mrq;
1796 host/moxasd.c: if ( readl(&host->reg->status) & MSD_CARD_DETECT ) { // card is removed
1797 host/moxasd.c: spin_unlock_irqrestore(&host->lock, flags);
1798 host/moxasd.c: spin_unlock_irqrestore(&host->lock, flags);
1799 host/moxasd.c: spin_lock_irqsave(&host->lock, flags);
1800 host/moxasd.c: div = (host->sysclk / (host->mmc->f_max * 2)) - 1;
1801 host/moxasd.c: div = (APB_CLK / (host->mmc->f_max * 2)) - 1;
1802 host/moxasd.c: if ( host->mmc->mode == MMC_MODE_SD )
1803 host/moxasd.c: writel(div, &host->reg->clock_control);
1804 host/moxasd.c: } else if ( !(readl(&host->reg->clock_control) & MSD_CLK_DIS) ) {
1805 host/moxasd.c: writel(readl(&host->reg->clock_control)|MSD_CLK_DIS, &host->reg->clock_control);
1806 host/moxasd.c: writel(readl(&host->reg->power_control)&~MSD_SD_POWER_ON, &host->reg->power_control);
1807 host/moxasd.c: writel(MSD_SD_POWER_ON|(unsigned int)power, &host->reg->power_control);
1808 host/moxasd.c: writel(MSD_SINGLE_BUS, &host->reg->bus_width);
1809 host/moxasd.c: writel(MSD_WIDE_BUS, &host->reg->bus_width);
1810 host/moxasd.c: spin_unlock_irqrestore(&host->lock, flags);
1811 host/moxasd.c: if ( readl(&host->reg->status) & MSD_WRITE_PROT )
1812 host/moxasd.c: host->mmc = mmc;
1813 host/moxasd.c: spin_lock_init(&host->lock);
1814 host/moxasd.c: tasklet_init(&host->card_change_tasklet, moxasd_card_change, (unsigned long)host);
1815 host/moxasd.c: tasklet_init(&host->fifo_run_tasklet, moxasd_fifo_run, (unsigned long)host);
1816 host/moxasd.c: host->reg = (moxasd_reg *)CPE_SD_VA_BASE;
1817 host/moxasd.c: host->dma = apb_dma_alloc(APB_DMA_SD_REQ_NO);
1818 host/moxasd.c: if ( host->dma ) {
1819 host/moxasd.c: apb_dma_set_irq(host->dma, moxasd_dma_irq, host);
1820 host/moxasd.c: host->sysclk = (38684*mul + 10000) / (div * 10000);
1821 host/moxasd.c: host->sysclk = (host->sysclk * 1000000) / 2;
1822 host/moxasd.c: writel(0, &host->reg->interrupt_mask); // disable all interrupt
1823 host/moxasd.c: writel(MSD_SDC_RST, &host->reg->command); // reset chip
1824 host/moxasd.c: while ( readl(&host->reg->command) & MSD_SDC_RST); // wait for reset finished
1825 host/moxasd.c: writel(0, &host->reg->interrupt_mask); // disable all interrupt
1826 host/moxasd.c: if ( !(readl(&host->reg->status) & MSD_CARD_DETECT) ) { // is inserted
1827 host/moxasd.c: if ( readl(&host->reg->clock_control) & MSD_CLK_SD ) { // is SD card
1828 host/moxasd.c: writel(MSD_WIDE_BUS, &host->reg->bus_width);
1829 host/moxasd.c: //writel(MSD_INT_CARD_CHANGE|MSD_INT_FIFO_ORUN|MSD_INT_FIFO_URUN, &host->reg->interrupt_mask);
1830 host/moxasd.c: writel(MSD_INT_CARD_CHANGE, &host->reg->interrupt_mask);
1831 host/moxasd.c: if ( host->dma ) {
1832 host/moxasd.c: apb_dma_disable(host->dma);
1833 host/moxasd.c: apb_dma_release_irq(host->dma);
1834 host/moxasd.c: apb_dma_release(host->dma);
1835 host/moxasd.c: writel(0, &host->reg->interrupt_mask);
1836 host/moxasd.c: writel(0, &host->reg->power_control);
1837 host/moxasd.c: writel(readl(&host->reg->clock_control)|MSD_CLK_DIS, &host->reg->clock_control);
1838 host/moxasd.c: tasklet_kill(&host->card_change_tasklet);
1839 host/moxasd.c: tasklet_kill(&host->fifo_run_tasklet);
1840 Binary file host/.moxasd.c.swp matches