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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / net / smc9194.c
blob05ab1ffdc656a1e999c7268f0920be6116ca63c5
1 /*------------------------------------------------------------------------
2 . smc9194.c
3 . This is a driver for SMC's 9000 series of Ethernet cards.
4 .
5 . Copyright (C) 1996 by Erik Stahlman
6 . This software may be used and distributed according to the terms
7 . of the GNU General Public License, incorporated herein by reference.
8 .
9 . "Features" of the SMC chip:
10 . 4608 byte packet memory. ( for the 91C92. Others have more )
11 . EEPROM for configuration
12 . AUI/TP selection ( mine has 10Base2/10BaseT select )
13 .
14 . Arguments:
15 . io = for the base address
16 . irq = for the IRQ
17 . ifport = 0 for autodetect, 1 for TP, 2 for AUI ( or 10base2 )
18 .
19 . author:
20 . Erik Stahlman ( erik@vt.edu )
21 . contributors:
22 . Arnaldo Carvalho de Melo <acme@conectiva.com.br>
23 .
24 . Hardware multicast code from Peter Cammaert ( pc@denkart.be )
25 .
26 . Sources:
27 . o SMC databook
28 . o skeleton.c by Donald Becker ( becker@scyld.com )
29 . o ( a LOT of advice from Becker as well )
30 .
31 . History:
32 . 12/07/95 Erik Stahlman written, got receive/xmit handled
33 . 01/03/96 Erik Stahlman worked out some bugs, actually usable!!! :-)
34 . 01/06/96 Erik Stahlman cleaned up some, better testing, etc
35 . 01/29/96 Erik Stahlman fixed autoirq, added multicast
36 . 02/01/96 Erik Stahlman 1. disabled all interrupts in smc_reset
37 . 2. got rid of post-decrementing bug -- UGH.
38 . 02/13/96 Erik Stahlman Tried to fix autoirq failure. Added more
39 . descriptive error messages.
40 . 02/15/96 Erik Stahlman Fixed typo that caused detection failure
41 . 02/23/96 Erik Stahlman Modified it to fit into kernel tree
42 . Added support to change hardware address
43 . Cleared stats on opens
44 . 02/26/96 Erik Stahlman Trial support for Kernel 1.2.13
45 . Kludge for automatic IRQ detection
46 . 03/04/96 Erik Stahlman Fixed kernel 1.3.70 +
47 . Fixed bug reported by Gardner Buchanan in
48 . smc_enable, with outw instead of outb
49 . 03/06/96 Erik Stahlman Added hardware multicast from Peter Cammaert
50 . 04/14/00 Heiko Pruessing (SMA Regelsysteme) Fixed bug in chip memory
51 . allocation
52 . 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
53 . 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
54 . 11/08/01 Matt Domsch Use common crc32 function
55 ----------------------------------------------------------------------------*/
56
57 static const char version[] =
58 "smc9194.c:v0.14 12/15/00 by Erik Stahlman (erik@vt.edu)\n";
59
60 #include <linux/module.h>
61 #include <linux/kernel.h>
62 #include <linux/sched.h>
63 #include <linux/types.h>
64 #include <linux/fcntl.h>
65 #include <linux/interrupt.h>
66 #include <linux/ptrace.h>
67 #include <linux/ioport.h>
68 #include <linux/in.h>
69 #include <linux/slab.h>
70 #include <linux/string.h>
71 #include <linux/init.h>
72 #include <linux/crc32.h>
73 #include <linux/errno.h>
74 #include <linux/netdevice.h>
75 #include <linux/etherdevice.h>
76 #include <linux/skbuff.h>
77 #include <linux/delay.h>
78
79 #include <asm/bitops.h>
80 #include <asm/io.h>
81
82 #include "smc9194.h"
83
84 #ifdef CONFIG_M68EZ328
85 #include <asm/MC68EZ328.h>
86 #include <asm/irq.h>
87 #include <asm/mcfsmc.h>
88 unsigned char smc_defethaddr[] = { 0x00, 0x10, 0x8b, 0xf1, 0xda, 0x01 };
89 #define NO_AUTOPROBE
90 #endif
91
92 #ifdef CONFIG_COLDFIRE
93 #include <asm/coldfire.h>
94 #include <asm/mcfsim.h>
95 #include <asm/mcfsmc.h>
96
97 unsigned char smc_defethaddr[] = { 0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01 };
98
99 #define NO_AUTOPROBE
100 #endif
101
102 #ifdef CONFIG_SH_KEYWEST
103 #include <asm/keywest.h>
104 #define NO_AUTOPROBE
105 #define PHY_SETUP
106 #endif
107
108 #ifdef CONFIG_LEDMAN
109 #include <linux/ledman.h>
110 #endif
111
112 #if defined(CONFIG_CPU_H8300H) || defined(CONFIG_CPU_H8S)
113 #include <asm/h8300_smsc.h>
114 #define NO_AUTOPROBE
115 #endif
116
117 #define DRV_NAME "smc9194"
118
119 /*------------------------------------------------------------------------
120 .
121 . Configuration options, for the experienced user to change.
122 .
123 -------------------------------------------------------------------------*/
124
125 /*
126 . Do you want to use 32 bit xfers? This should work on all chips, as
127 . the chipset is designed to accommodate them.
128 */
129 #if (defined(__sh__) && !defined(CONFIG_SH_KEYWEST)) || \
130 defined(__H8300H__) || defined(__H8300S__)
131 #undef USE_32_BIT
132 #else
133 #define USE_32_BIT 1
134 #endif
135
136 #if defined(__H8300H__) || defined(__H8300S__)
137 #define NO_AUTOPROBE
138 #undef insl
139 #undef outsl
140 #define insl(a,b,l) io_insl_noswap(a,b,l)
141 #define outsl(a,b,l) io_outsl_noswap(a,b,l)
142 #endif
143
144 /*
145 .A typedef so we can change what IO looks like easily
146 */
147 typedef unsigned int smcio_t;
148
149 /*
150 .the SMC9194 can be at any of the following port addresses. To change,
151 .for a slightly different card, you can add it to the array. Keep in
152 .mind that the array must end in zero.
153 */
154 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328) || \
155 defined(CONFIG_SH_KEYWEST)
156
157 #ifdef CONFIG_NETtel
158 static smcio_t smc_portlist[] = { 0x30600300, 0x30600000, 0 };
159 static unsigned int smc_irqlist[] = { 29, 27, 0 };
160 #elif defined(CONFIG_SH_KEYWEST)
161 static smcio_t smc_portlist[] = { KEYWEST_ETHR, 0 };
162 static unsigned int smc_irqlist[] = { IRQ4_IRQ, 0 };
163 #elif defined(CONFIG_M68EZ328)
164 /* make sure that you program Port D selects to allow the interrupts! */
165 static smcio_t smc_portlist[] = { 0x2000300, 0x2000320, 0 };
166 static unsigned int smc_irqlist[] = { IRQ1_IRQ_NUM, IRQ2_IRQ_NUM, 0 };
167 #elif defined(CONFIG_CLEOPATRA)
168 static unsigned int smc_portlist[] = { 0x30600300, 0 };
169 static unsigned int smc_irqlist[] = { 29, 0 };
170 #else
171 static smcio_t smc_portlist[] = { 0x30600300, 0 };
172 static unsigned int smc_irqlist[] = { 27, 0 };
173 #endif
174
175 #elif defined(CONFIG_H8S_EDOSK2674)
176 static struct devlist smc_devlist[] __initdata = {
177 {.port = 0xf80000, .irq = 16},
178 {.port = 0, .irq = 0 },
179 };
180 #else
181 static struct devlist smc_devlist[] __initdata = {
182 {.port = 0x200, .irq = 0},
183 {.port = 0x220, .irq = 0},
184 {.port = 0x240, .irq = 0},
185 {.port = 0x260, .irq = 0},
186 {.port = 0x280, .irq = 0},
187 {.port = 0x2A0, .irq = 0},
188 {.port = 0x2C0, .irq = 0},
189 {.port = 0x2E0, .irq = 0},
190 {.port = 0x300, .irq = 0},
191 {.port = 0x320, .irq = 0},
192 {.port = 0x340, .irq = 0},
193 {.port = 0x360, .irq = 0},
194 {.port = 0x380, .irq = 0},
195 {.port = 0x3A0, .irq = 0},
196 {.port = 0x3C0, .irq = 0},
197 {.port = 0x3E0, .irq = 0},
198 {.port = 0, .irq = 0},
199 };
200 #endif
201 /*
202 . Wait time for memory to be free. This probably shouldn't be
203 . tuned that much, as waiting for this means nothing else happens
204 . in the system
205 */
206 #define MEMORY_WAIT_TIME 16
207
208 /*
209 . DEBUGGING LEVELS
210 .
211 . 0 for normal operation
212 . 1 for slightly more details
213 . >2 for various levels of increasingly useless information
214 . 2 for interrupt tracking, status flags
215 . 3 for packet dumps, etc.
216 */
217 #define SMC_DEBUG 0
218
219 #if (SMC_DEBUG > 2 )
220 #define PRINTK3(x) printk x
221 #else
222 #define PRINTK3(x)
223 #endif
224
225 #if SMC_DEBUG > 1
226 #define PRINTK2(x) printk x
227 #else
228 #define PRINTK2(x)
229 #endif
230
231 #ifdef SMC_DEBUG
232 #define PRINTK(x) printk x
233 #else
234 #define PRINTK(x)
235 #endif
236
237
238 /*------------------------------------------------------------------------
239 .
240 . The internal workings of the driver. If you are changing anything
241 . here with the SMC stuff, you should have the datasheet and known
242 . what you are doing.
243 .
244 -------------------------------------------------------------------------*/
245 #define CARDNAME "SMC9194"
246
247
248 /* store this information for the driver.. */
249 struct smc_local {
250 /*
251 these are things that the kernel wants me to keep, so users
252 can find out semi-useless statistics of how well the card is
253 performing
254 */
255 struct net_device_stats stats;
256
257 /*
258 If I have to wait until memory is available to send
259 a packet, I will store the skbuff here, until I get the
260 desired memory. Then, I'll send it out and free it.
261 */
262 struct sk_buff * saved_skb;
263
264 /*
265 . This keeps track of how many packets that I have
266 . sent out. When an TX_EMPTY interrupt comes, I know
267 . that all of these have been sent.
268 */
269 int packets_waiting;
270 };
271
272
273 /*-----------------------------------------------------------------
274 .
275 . The driver can be entered at any of the following entry points.
276 .
277 .------------------------------------------------------------------ */
278
279 /*
280 . This is called by register_netdev(). It is responsible for
281 . checking the portlist for the SMC9000 series chipset. If it finds
282 . one, then it will initialize the device, find the hardware information,
283 . and sets up the appropriate device parameters.
284 . NOTE: Interrupts are *OFF* when this procedure is called.
285 .
286 . NB:This shouldn't be static since it is referred to externally.
287 */
288 struct net_device *smc_init(int unit);
289
290 /*
291 . The kernel calls this function when someone wants to use the device,
292 . typically 'ifconfig ethX up'.
293 */
294 static int smc_open(struct net_device *dev);
295
296 /*
297 . Our watchdog timed out. Called by the networking layer
298 */
299 static void smc_timeout(struct net_device *dev);
300
301 /*
302 . This is called by the kernel in response to 'ifconfig ethX down'. It
303 . is responsible for cleaning up everything that the open routine
304 . does, and maybe putting the card into a powerdown state.
305 */
306 static int smc_close(struct net_device *dev);
307
308 /*
309 . This routine allows the proc file system to query the driver's
310 . statistics.
311 */
312 static struct net_device_stats * smc_query_statistics( struct net_device *dev);
313
314 /*
315 . Finally, a call to set promiscuous mode ( for TCPDUMP and related
316 . programs ) and multicast modes.
317 */
318 static void smc_set_multicast_list(struct net_device *dev);
319
320
321 /*---------------------------------------------------------------
322 .
323 . Interrupt level calls..
324 .
325 ----------------------------------------------------------------*/
326
327 /*
328 . Handles the actual interrupt
329 */
330 static irqreturn_t smc_interrupt(int irq, void *, struct pt_regs *regs);
331 /*
332 . This is a separate procedure to handle the receipt of a packet, to
333 . leave the interrupt code looking slightly cleaner
334 */
335 static inline void smc_rcv( struct net_device *dev );
336 /*
337 . This handles a TX interrupt, which is only called when an error
338 . relating to a packet is sent.
339 */
340 static inline void smc_tx( struct net_device * dev );
341
342 /*
343 ------------------------------------------------------------
344 .
345 . Internal routines
346 .
347 ------------------------------------------------------------
348 */
349
350 /*
351 . Test if a given location contains a chip, trying to cause as
352 . little damage as possible if it's not a SMC chip.
353 */
354 static int smc_probe(struct net_device *dev, smcio_t ioaddr);
355
356 /*
357 . A rather simple routine to print out a packet for debugging purposes.
358 */
359 #if SMC_DEBUG > 2
360 static void print_packet( byte *, int );
361 #endif
362
363 #define tx_done(dev) 1
364
365 /* this is called to actually send the packet to the chip */
366 static void smc_hardware_send_packet( struct net_device * dev );
367
368 /* Since I am not sure if I will have enough room in the chip's ram
369 . to store the packet, I call this routine, which either sends it
370 . now, or generates an interrupt when the card is ready for the
371 . packet */
372 static int smc_wait_to_send_packet( struct sk_buff * skb, struct net_device *dev );
373
374 /* this does a soft reset on the device */
375 static void smc_reset( smcio_t ioaddr );
376
377 /* Enable Interrupts, Receive, and Transmit */
378 static void smc_enable( smcio_t ioaddr );
379
380 /* this puts the device in an inactive state */
381 static void smc_shutdown( smcio_t ioaddr );
382
383 #ifndef NO_AUTOPROBE
384 /* This routine will find the IRQ of the driver if one is not
385 . specified in the input to the device. */
386 static int smc_findirq( smcio_t ioaddr );
387 #endif
388
389 #ifdef PHY_SETUP
390 static void clkmdio(smcio_t ioaddr, unsigned int MGMTData);
391 static unsigned PHYAccess(smcio_t ioaddr, unsigned char PHYAdd,
392 unsigned char RegAdd, unsigned char OPCode, unsigned wData);
393 static unsigned char DetectPHY(smcio_t ioaddr, unsigned long *OUI,
394 unsigned char *Model, unsigned char *Revision);
395 static int setup_phy(smcio_t ioaddr);
396 #endif
397
398 /*
399 . Function: smc_reset( smcio_t ioaddr )
400 . Purpose:
401 . This sets the SMC91xx chip to its normal state, hopefully from whatever
402 . mess that any other DOS driver has put it in.
403 .
404 . Maybe I should reset more registers to defaults in here? SOFTRESET should
405 . do that for me.
406 .
407 . Method:
408 . 1. send a SOFT RESET
409 . 2. wait for it to finish
410 . 3. enable autorelease mode
411 . 4. reset the memory management unit
412 . 5. clear all interrupts
413 .
414 */
415 static void smc_reset( smcio_t ioaddr )
416 {
417 /* This resets the registers mostly to defaults, but doesn't
418 affect EEPROM. That seems unnecessary */
419 SMC_SELECT_BANK( 0 );
420 outw( RCR_SOFTRESET, ioaddr + RCR );
421
422 /* this should pause enough for the chip to be happy */
423 SMC_DELAY( );
424
425 /* Set the transmit and receive configuration registers to
426 default values */
427 outw( RCR_CLEAR, ioaddr + RCR );
428 outw( TCR_CLEAR, ioaddr + TCR );
429
430 /* set the control register to automatically
431 release successfully transmitted packets, to make the best
432 use out of our limited memory */
433 SMC_SELECT_BANK( 1 );
434 outw( inw( ioaddr + CONTROL ) | CTL_AUTO_RELEASE , ioaddr + CONTROL );
435
436 #if defined(CONFIG_LEDMAN) && defined(CONFIG_SNAPGEAR)
437 outw( inw( ioaddr + CONTROL ) | CTL_LE_ENABLE , ioaddr + CONTROL );
438 #endif
439
440 /* Reset the MMU */
441 SMC_SELECT_BANK( 2 );
442 outw( MC_RESET, ioaddr + MMU_CMD );
443
444 /* Note: It doesn't seem that waiting for the MMU busy is needed here,
445 but this is a place where future chipsets _COULD_ break. Be wary
446 of issuing another MMU command right after this */
447
448 SMC_SET_INT( 0 );
449 }
450
451 /*
452 . Function: smc_enable
453 . Purpose: let the chip talk to the outside work
454 . Method:
455 . 1. Enable the transmitter
456 . 2. Enable the receiver
457 . 3. Enable interrupts
458 */
459 static void smc_enable( smcio_t ioaddr )
460 {
461 SMC_SELECT_BANK( 0 );
462 /* see the header file for options in TCR/RCR NORMAL*/
463 outw( TCR_NORMAL, ioaddr + TCR );
464 outw( RCR_NORMAL, ioaddr + RCR );
465
466 /* now, enable interrupts */
467 SMC_SELECT_BANK( 2 );
468 SMC_SET_INT( SMC_INTERRUPT_MASK );
469 }
470
471 /*
472 . Function: smc_shutdown
473 . Purpose: closes down the SMC91xxx chip.
474 . Method:
475 . 1. zero the interrupt mask
476 . 2. clear the enable receive flag
477 . 3. clear the enable xmit flags
478 .
479 . TODO:
480 . (1) maybe utilize power down mode.
481 . Why not yet? Because while the chip will go into power down mode,
482 . the manual says that it will wake up in response to any I/O requests
483 . in the register space. Empirical results do not show this working.
484 */
485 static void smc_shutdown( smcio_t ioaddr )
486 {
487 /* no more interrupts for me */
488 SMC_SELECT_BANK( 2 );
489 SMC_SET_INT( 0 );
490
491 /* and tell the card to stay away from that nasty outside world */
492 SMC_SELECT_BANK( 0 );
493 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
494 outw( RCR_CLEAR, ioaddr + RCR );
495 outw( TCR_CLEAR, ioaddr + TCR );
496 #else
497 outb( RCR_CLEAR, ioaddr + RCR );
498 outb( TCR_CLEAR, ioaddr + TCR );
499 #endif /* CONFIG_COLDFIRE */
500 #if 0
501 /* finally, shut the chip down */
502 SMC_SELECT_BANK( 1 );
503 outw( inw( ioaddr + CONTROL ), CTL_POWERDOWN, ioaddr + CONTROL );
504 #endif
505 }
506
507
508 /*
509 . Function: smc_setmulticast( smcio_t ioaddr, int count, dev_mc_list * adds )
510 . Purpose:
511 . This sets the internal hardware table to filter out unwanted multicast
512 . packets before they take up memory.
513 .
514 . The SMC chip uses a hash table where the high 6 bits of the CRC of
515 . address are the offset into the table. If that bit is 1, then the
516 . multicast packet is accepted. Otherwise, it's dropped silently.
517 .
518 . To use the 6 bits as an offset into the table, the high 3 bits are the
519 . number of the 8 bit register, while the low 3 bits are the bit within
520 . that register.
521 .
522 . This routine is based very heavily on the one provided by Peter Cammaert.
523 */
524
525
526 static void smc_setmulticast( smcio_t ioaddr, int count, struct dev_mc_list * addrs ) {
527 int i;
528 unsigned char multicast_table[ 8 ];
529 struct dev_mc_list * cur_addr;
530 /* table for flipping the order of 3 bits */
531 unsigned char invert3[] = { 0, 4, 2, 6, 1, 5, 3, 7 };
532
533 /* start with a table of all zeros: reject all */
534 memset( multicast_table, 0, sizeof( multicast_table ) );
535
536 cur_addr = addrs;
537 for ( i = 0; i < count ; i ++, cur_addr = cur_addr->next ) {
538 int position;
539
540 /* do we have a pointer here? */
541 if ( !cur_addr )
542 break;
543 /* make sure this is a multicast address - shouldn't this
544 be a given if we have it here ? */
545 if ( !( *cur_addr->dmi_addr & 1 ) )
546 continue;
547
548 /* only use the low order bits */
549 position = ether_crc_le(6, cur_addr->dmi_addr) & 0x3f;
550
551 /* do some messy swapping to put the bit in the right spot */
552 multicast_table[invert3[position&7]] |=
553 (1<<invert3[(position>>3)&7]);
554
555 }
556 /* now, the table can be loaded into the chipset */
557 SMC_SELECT_BANK( 3 );
558
559 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
560 for ( i = 0; i < 8 ; i += 2 ) {
561 outw(((multicast_table[i+1]<<8)+(multicast_table[i])), ioaddr+MULTICAST1+i );
562 }
563 #else
564 for ( i = 0; i < 8 ; i++ ) {
565 outb( multicast_table[i], ioaddr + MULTICAST1 + i );
566 }
567 #endif
568 }
569
570
571 /*
572 . Function: smc_wait_to_send_packet( struct sk_buff * skb, struct net_device * )
573 . Purpose:
574 . Attempt to allocate memory for a packet, if chip-memory is not
575 . available, then tell the card to generate an interrupt when it
576 . is available.
577 .
578 . Algorithm:
579 .
580 . o if the saved_skb is not currently null, then drop this packet
581 . on the floor. This should never happen, because of TBUSY.
582 . o if the saved_skb is null, then replace it with the current packet,
583 . o See if I can sending it now.
584 . o (NO): Enable interrupts and let the interrupt handler deal with it.
585 . o (YES):Send it now.
586 */
587 static int smc_wait_to_send_packet( struct sk_buff * skb, struct net_device * dev )
588 {
589 struct smc_local *lp = netdev_priv(dev);
590 unsigned int ioaddr = dev->base_addr;
591 word length;
592 unsigned short numPages;
593 word time_out;
594
595 netif_stop_queue(dev);
596 /* Well, I want to send the packet.. but I don't know
597 if I can send it right now... */
598
599 if ( lp->saved_skb) {
600 /* THIS SHOULD NEVER HAPPEN. */
601 lp->stats.tx_aborted_errors++;
602 printk(CARDNAME": Bad Craziness - sent packet while busy.\n" );
603 return 1;
604 }
605
606 length = skb->len;
607
608 if(length < ETH_ZLEN) {
609 skb = skb_padto(skb, ETH_ZLEN);
610 if(skb == NULL) {
611 netif_wake_queue(dev);
612 return 0;
613 }
614 length = ETH_ZLEN;
615 }
616 lp->saved_skb = skb;
617
618 /*
619 ** The MMU wants the number of pages to be the number of 256 bytes
620 ** 'pages', minus 1 ( since a packet can't ever have 0 pages :) )
621 **
622 ** Pkt size for allocating is data length +6 (for additional status words,
623 ** length and ctl!) If odd size last byte is included in this header.
624 */
625 numPages = ((length & 0xfffe) + 6) / 256;
626
627 if (numPages > 7 ) {
628 printk(CARDNAME": Far too big packet error. \n");
629 /* freeing the packet is a good thing here... but should
630 . any packets of this size get down here? */
631 dev_kfree_skb (skb);
632 lp->saved_skb = NULL;
633 /* this IS an error, but, i don't want the skb saved */
634 netif_wake_queue(dev);
635 return 0;
636 }
637 /* either way, a packet is waiting now */
638 lp->packets_waiting++;
639
640 /* now, try to allocate the memory */
641 SMC_SELECT_BANK( 2 );
642 outw( MC_ALLOC | numPages, ioaddr + MMU_CMD );
643 /*
644 . Performance Hack
645 .
646 . wait a short amount of time.. if I can send a packet now, I send
647 . it now. Otherwise, I enable an interrupt and wait for one to be
648 . available.
649 .
650 . I could have handled this a slightly different way, by checking to
651 . see if any memory was available in the FREE MEMORY register. However,
652 . either way, I need to generate an allocation, and the allocation works
653 . no matter what, so I saw no point in checking free memory.
654 */
655 time_out = MEMORY_WAIT_TIME;
656 do {
657 word status;
658
659 status = inb( ioaddr + INTERRUPT );
660 if ( status & IM_ALLOC_INT ) {
661 /* acknowledge the interrupt */
662 SMC_ACK_INT( IM_ALLOC_INT );
663 break;
664 }
665 } while ( -- time_out );
666
667 if ( !time_out ) {
668 /* oh well, wait until the chip finds memory later */
669 SMC_ENABLE_INT( IM_ALLOC_INT );
670 PRINTK2((CARDNAME": memory allocation deferred. \n"));
671 /* it's deferred, but I'll handle it later */
672 return 0;
673 }
674 /* or YES! I can send the packet now.. */
675 smc_hardware_send_packet(dev);
676 netif_wake_queue(dev);
677 return 0;
678 }
679
680 /*
681 . Function: smc_hardware_send_packet(struct net_device * )
682 . Purpose:
683 . This sends the actual packet to the SMC9xxx chip.
684 .
685 . Algorithm:
686 . First, see if a saved_skb is available.
687 . ( this should NOT be called if there is no 'saved_skb'
688 . Now, find the packet number that the chip allocated
689 . Point the data pointers at it in memory
690 . Set the length word in the chip's memory
691 . Dump the packet to chip memory
692 . Check if a last byte is needed ( odd length packet )
693 . if so, set the control flag right
694 . Tell the card to send it
695 . Enable the transmit interrupt, so I know if it failed
696 . Free the kernel data if I actually sent it.
697 */
698 static void smc_hardware_send_packet( struct net_device * dev )
699 {
700 struct smc_local *lp = netdev_priv(dev);
701 byte packet_no;
702 struct sk_buff * skb = lp->saved_skb;
703 word length;
704 smcio_t ioaddr;
705 byte * buf;
706
707 ioaddr = dev->base_addr;
708
709 if ( !skb ) {
710 PRINTK((CARDNAME": In XMIT with no packet to send \n"));
711 return;
712 }
713 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
714 buf = skb->data;
715
716 /* If I get here, I _know_ there is a packet slot waiting for me */
717 packet_no = inb( ioaddr + PNR_ARR + 1 );
718 if ( packet_no & 0x80 ) {
719 /* or isn't there? BAD CHIP! */
720 printk(KERN_DEBUG CARDNAME": Memory allocation failed. \n");
721 dev_kfree_skb_any(skb);
722 lp->saved_skb = NULL;
723 netif_wake_queue(dev);
724 return;
725 }
726
727 /* we have a packet address, so tell the card to use it */
728 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
729 outw( packet_no, ioaddr + PNR_ARR );
730 #else
731 outb( packet_no, ioaddr + PNR_ARR );
732 #endif
733
734 /* point to the beginning of the packet */
735 outw( PTR_AUTOINC , ioaddr + POINTER );
736
737 PRINTK3((CARDNAME": Trying to xmit packet of length %x\n", length ));
738 #if SMC_DEBUG > 2
739 print_packet( buf, length );
740 #endif
741
742 /* send the packet length ( +6 for status, length and ctl byte )
743 and the status word ( set to zeros ) */
744
745 #ifdef USE_32_BIT
746 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
747 outl( (length +6 ) , ioaddr + DATA_1 );
748 #else
749 outl( (length +6 ) << 16 , ioaddr + DATA_1 );
750 #endif
751 #else
752 outw( 0, ioaddr + DATA_1 );
753 /* send the packet length ( +6 for status words, length, and ctl*/
754 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328) || defined(CONFIG_CPU_H8S)
755 outw( (length+6) & 0xFFFF, ioaddr + DATA_1 );
756 #else
757 outb( (length+6) & 0xFF,ioaddr + DATA_1 );
758 outb( (length+6) >> 8 , ioaddr + DATA_1 );
759 #endif
760 #endif
761
762 /* send the actual data
763 . I _think_ it's faster to send the longs first, and then
764 . mop up by sending the last word. It depends heavily
765 . on alignment, at least on the 486. Maybe it would be
766 . a good idea to check which is optimal? But that could take
767 . almost as much time as is saved?
768 */
769 #ifdef USE_32_BIT
770 if ( length & 0x2 ) {
771 outsl(ioaddr + DATA_1, buf, length >> 2 );
772 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
773 outwd( *((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +DATA_1);
774 #elif !defined(__H8300H__) && !defined(__H8300S__)
775 outw( *((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +DATA_1);
776 #else
777 ctrl_outw( *((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +DATA_1);
778 #endif
779 }
780 else
781 outsl(ioaddr + DATA_1, buf, length >> 2 );
782 #else
783 outsw(ioaddr + DATA_1 , buf, (length ) >> 1);
784 #endif
785 /* Send the last byte, if there is one. */
786
787 if ( (length & 1) == 0 ) {
788 outw( 0, ioaddr + DATA_1 );
789 } else {
790 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
791 outw( buf[length -1 ] | (0x20 << 8), ioaddr + DATA_1);
792 #else
793 outb( buf[length -1 ], ioaddr + DATA_1 );
794 outb( 0x20, ioaddr + DATA_1);
795 #endif
796 }
797
798 /* enable the interrupts */
799 SMC_ENABLE_INT( (IM_TX_INT | IM_TX_EMPTY_INT) );
800
801 /* and let the chipset deal with it */
802 outw( MC_ENQUEUE , ioaddr + MMU_CMD );
803
804 PRINTK2((CARDNAME": Sent packet of length %d \n",length));
805
806 lp->saved_skb = NULL;
807 dev_kfree_skb_any (skb);
808
809 dev->trans_start = jiffies;
810
811 /* we can send another packet */
812 netif_wake_queue(dev);
813
814 return;
815 }
816
817 /*-------------------------------------------------------------------------
818 |
819 | smc_init(int unit)
820 | Input parameters:
821 | dev->base_addr == 0, try to find all possible locations
822 | dev->base_addr == 1, return failure code
823 | dev->base_addr == 2, always allocate space, and return success
824 | dev->base_addr == <anything else> this is the address to check
825 |
826 | Output:
827 | pointer to net_device or ERR_PTR(error)
828 |
829 ---------------------------------------------------------------------------
830 */
831 static int io;
832 static int irq;
833 static int ifport;
834
835 struct net_device * __init smc_init(int unit)
836 {
837 struct net_device *dev = alloc_etherdev(sizeof(struct smc_local));
838 static struct devlist *smcdev = smc_devlist;
839 int err = 0;
840
841 #ifndef NO_AUTOPROBE
842 smcdev = smc_devlist;
843 #endif
844 if (!dev)
845 return ERR_PTR(-ENODEV);
846
847 if (unit >= 0) {
848 sprintf(dev->name, "eth%d", unit);
849 netdev_boot_setup_check(dev);
850 io = dev->base_addr;
851 irq = dev->irq;
852 }
853
854 SET_MODULE_OWNER(dev);
855
856 if (io > 0x1ff) { /* Check a single specified location. */
857 err = smc_probe(dev, io);
858 } else if (io != 0) { /* Don't probe at all. */
859 err = -ENXIO;
860 } else {
861 for (port = smc_portlist; *port; port++) {
862 #ifdef CONFIG_NETtel
863 smc_remap(port);
864 #endif
865 if (smc_probe(dev, *port) == 0)
866 break;
867 }
868 if (!smcdev->port)
869 err = -ENODEV;
870 }
871 if (err)
872 goto out;
873 err = register_netdev(dev);
874 if (err)
875 goto out1;
876 return dev;
877 out1:
878 free_irq(dev->irq, dev);
879 release_region(dev->base_addr, SMC_IO_EXTENT);
880 out:
881 free_netdev(dev);
882 return ERR_PTR(err);
883 }
884
885 /*----------------------------------------------------------------------
886 . smc_findirq
887 .
888 . This routine has a simple purpose -- make the SMC chip generate an
889 . interrupt, so an auto-detect routine can detect it, and find the IRQ,
890 ------------------------------------------------------------------------
891 */
892 #ifndef NO_AUTOPROBE
893 int __init smc_findirq( smcio_t ioaddr )
894 {
895 #ifndef NO_AUTOPROBE
896 int timeout = 20;
897 unsigned long cookie;
898
899
900 #if 0
901 /* I have to do a STI() here, because this is called from
902 a routine that does an CLI during this process, making it
903 rather difficult to get interrupts for auto detection */
904 sti();
905 #endif
906
907 cookie = probe_irq_on();
908
909 /*
910 * What I try to do here is trigger an ALLOC_INT. This is done
911 * by allocating a small chunk of memory, which will give an interrupt
912 * when done.
913 */
914
915
916 SMC_SELECT_BANK(2);
917 /* enable ALLOCation interrupts ONLY */
918 SMC_SET_INT( IM_ALLOC_INT );
919
920 /*
921 . Allocate 512 bytes of memory. Note that the chip was just
922 . reset so all the memory is available
923 */
924 outw( MC_ALLOC | 1, ioaddr + MMU_CMD );
925
926 /*
927 . Wait until positive that the interrupt has been generated
928 */
929 while ( timeout ) {
930 byte int_status;
931
932 int_status = inb( ioaddr + INTERRUPT );
933
934 if ( int_status & IM_ALLOC_INT )
935 break; /* got the interrupt */
936 timeout--;
937 }
938 /* there is really nothing that I can do here if timeout fails,
939 as probe_irq_off will return a 0 anyway, which is what I
940 want in this case. Plus, the clean up is needed in both
941 cases. */
942
943 /* DELAY HERE!
944 On a fast machine, the status might change before the interrupt
945 is given to the processor. This means that the interrupt was
946 never detected, and probe_irq_off fails to report anything.
947 This should fix probe_irq_* problems.
948 */
949 SMC_DELAY();
950 SMC_DELAY();
951
952 /* and disable all interrupts again */
953 SMC_SET_INT( 0 );
954
955 #if 0
956 /* clear hardware interrupts again, because that's how it
957 was when I was called... */
958 cli();
959 #endif
960
961 /* and return what I found */
962 return probe_irq_off(cookie);
963 #else /* NO_AUTOPROBE */
964 struct devlist *smcdev;
965 for (smcdev = smc_devlist; smcdev->port; smcdev++) {
966 if (smcdev->port == ioaddr)
967 return smcdev->irq;
968 }
969 return 0;
970 #endif
971 }
972 #endif /* NO_AUTOPROBE */
973
974 /*----------------------------------------------------------------------
975 . Function: smc_probe( smcio_t ioaddr )
976 .
977 . Purpose:
978 . Tests to see if a given ioaddr points to an SMC9xxx chip.
979 . Returns a 0 on success
980 .
981 . Algorithm:
982 . (1) see if the high byte of BANK_SELECT is 0x33
983 . (2) compare the ioaddr with the base register's address
984 . (3) see if I recognize the chip ID in the appropriate register
985 .
986 .---------------------------------------------------------------------
987 */
988
989 /*---------------------------------------------------------------
990 . Here I do typical initialization tasks.
991 .
992 . o Initialize the structure if needed
993 . o print out my vanity message if not done so already
994 . o print out what type of hardware is detected
995 . o print out the ethernet address
996 . o find the IRQ
997 . o set up my private data
998 . o configure the dev structure with my subroutines
999 . o actually GRAB the irq.
1000 . o GRAB the region
1001 .-----------------------------------------------------------------
1002 */
1003 static int __init smc_probe(struct net_device *dev, smcio_t ioaddr)
1004 {
1005 int i, memory, retval;
1006 static unsigned version_printed;
1007 unsigned int bank;
1008 #if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || defined(CONFIG_DISKtel) || defined(CONFIG_CLEOPATRA)
1009 static int nr = 0;
1010 #endif
1011 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1012 unsigned char *ep;
1013 #endif
1014
1015 const char *version_string;
1016 const char *if_string;
1017
1018 /* registers */
1019 word revision_register;
1020 word base_address_register;
1021 word configuration_register;
1022 word memory_info_register;
1023 word memory_cfg_register;
1024
1025 #if !defined(CONFIG_COLDFIRE) && !defined(CONFIG_M68EZ328) && \
1026 !defined(CONFIG_CPU_H8300H) && !defined(CONFIG_CPU_H8S)
1027 /* Grab the region so that no one else tries to probe our ioports. */
1028 if (!request_region(ioaddr, SMC_IO_EXTENT, DRV_NAME))
1029 return -EBUSY;
1030 #elif defined(CONFIG_COLDFIRE)
1031 /*
1032 * We need to put the SMC into 68k mode.
1033 * Do a write before anything else.
1034 */
1035 outw(0, ioaddr + BANK_SELECT);
1036 #endif
1037
1038 dev->irq = irq;
1039 dev->if_port = ifport;
1040
1041 /* First, see if the high byte is 0x33 */
1042 bank = inw( ioaddr + BANK_SELECT );
1043 if ( (bank & 0xFF00) != 0x3300 ) {
1044 retval = -ENODEV;
1045 goto err_out;
1046 }
1047 /* The above MIGHT indicate a device, but I need to write to further
1048 test this. */
1049 outw( 0x0, ioaddr + BANK_SELECT );
1050 bank = inw( ioaddr + BANK_SELECT );
1051 if ( (bank & 0xFF00 ) != 0x3300 ) {
1052 retval = -ENODEV;
1053 goto err_out;
1054 }
1055 /* well, we've already written once, so hopefully another time won't
1056 hurt. This time, I need to switch the bank register to bank 1,
1057 so I can access the base address register */
1058 #if !defined(CONFIG_CPU_H8300H) && !defined(CONFIG_CPU_H8S)
1059 SMC_SELECT_BANK(1);
1060 base_address_register = inw( ioaddr + BASE );
1061 if ( (ioaddr & 0x3E0) != ( base_address_register >> 3 & 0x3E0 ) ) {
1062 printk(CARDNAME ": IOADDR %x doesn't match configuration (%x)."
1063 "Probably not a SMC chip\n",
1064 ioaddr, base_address_register >> 3 & 0x3E0 );
1065 /* well, the base address register didn't match. Must not have
1066 been a SMC chip after all. */
1067 retval = -ENODEV;
1068 goto err_out;
1069 }
1070 #else
1071 (void)base_address_register; /* Warning suppression */
1072 #endif
1073
1074 /* check if the revision register is something that I recognize.
1075 These might need to be added to later, as future revisions
1076 could be added. */
1077 SMC_SELECT_BANK(3);
1078 revision_register = inw( ioaddr + REVISION );
1079 if ( !chip_ids[ ( revision_register >> 4 ) & 0xF ] ) {
1080 /* I don't recognize this chip, so... */
1081 printk(CARDNAME ": IO %x: Unrecognized revision register:"
1082 " %x, Contact author. \n", ioaddr, revision_register );
1083
1084 retval = -ENODEV;
1085 goto err_out;
1086 }
1087
1088 /* at this point I'll assume that the chip is an SMC9xxx.
1089 It might be prudent to check a listing of MAC addresses
1090 against the hardware address, or do some other tests. */
1091 if (version_printed++ == 0)
1092 printk("%s", version);
1093
1094 /* fill in some of the fields */
1095 dev->base_addr = ioaddr;
1096
1097 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1098 #if defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || defined(CONFIG_DISKtel) || defined(CONFIG_CLEOPATRA)
1099 /*
1100 . MAC address should be in FLASH, check that it is valid.
1101 . If good use it, otherwise use the default.
1102 */
1103 ep = (unsigned char *) (0xf0006000 + (nr++ * 6));
1104 if ((ep[0] == 0xff) && (ep[1] == 0xff) && (ep[2] == 0xff) &&
1105 (ep[3] == 0xff) && (ep[4] == 0xff) && (ep[5] == 0xff))
1106 ep = (unsigned char *) &smc_defethaddr[0];
1107 else if ((ep[0] == 0) && (ep[1] == 0) && (ep[2] == 0) &&
1108 (ep[3] == 0) && (ep[4] == 0) && (ep[5] == 0))
1109 ep = (unsigned char *) &smc_defethaddr[0];
1110 #else
1111 ep = (unsigned char *) &smc_defethaddr[0];
1112 #endif
1113 #endif
1114
1115 /*
1116 . Get the MAC address ( bank 1, regs 4 - 9 )
1117 */
1118 SMC_SELECT_BANK( 1 );
1119 for ( i = 0; i < 6; i += 2 ) {
1120 word address;
1121
1122 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1123 dev->dev_addr[ i ] = ep[ i ];
1124 dev->dev_addr[ i + 1 ] = ep[ i + 1 ];
1125 address = (((word) ep[ i ]) << 8) | ep[ i + 1 ];
1126 outw( address, ioaddr + ADDR0 + i);
1127 #else
1128 address = inw( ioaddr + ADDR0 + i );
1129 dev->dev_addr[ i + 1] = address >> 8;
1130 dev->dev_addr[ i ] = address & 0xFF;
1131 #endif
1132 }
1133
1134 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1135 /* HACK: to support 2 ethernets when using default address! */
1136 smc_defethaddr[5]++;
1137 #endif
1138
1139 /* get the memory information */
1140
1141 SMC_SELECT_BANK( 0 );
1142 memory_info_register = inw( ioaddr + MIR );
1143 memory_cfg_register = inw( ioaddr + MCR );
1144 memory = ( memory_cfg_register >> 9 ) & 0x7; /* multiplier */
1145 memory *= 256 * ( memory_info_register & 0xFF );
1146
1147 /*
1148 Now, I want to find out more about the chip. This is sort of
1149 redundant, but it's cleaner to have it in both, rather than having
1150 one VERY long probe procedure.
1151 */
1152 SMC_SELECT_BANK(3);
1153 revision_register = inw( ioaddr + REVISION );
1154 version_string = chip_ids[ ( revision_register >> 4 ) & 0xF ];
1155 if ( !version_string ) {
1156 /* I shouldn't get here because this call was done before.... */
1157 retval = -ENODEV;
1158 goto err_out;
1159 }
1160
1161 /* is it using AUI or 10BaseT ? */
1162 if ( dev->if_port == 0 ) {
1163 SMC_SELECT_BANK(1);
1164 configuration_register = inw( ioaddr + CONFIG );
1165 if ( configuration_register & CFG_AUI_SELECT )
1166 dev->if_port = 2;
1167 else
1168 dev->if_port = 1;
1169 }
1170 if_string = interfaces[ dev->if_port - 1 ];
1171
1172 /* now, reset the chip, and put it into a known state */
1173 smc_reset( ioaddr );
1174
1175 /*
1176 . If dev->irq is 0, then the device has to be banged on to see
1177 . what the IRQ is.
1178 .
1179 . This banging doesn't always detect the IRQ, for unknown reasons.
1180 . a workaround is to reset the chip and try again.
1181 .
1182 . Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1183 . be what is requested on the command line. I don't do that, mostly
1184 . because the card that I have uses a non-standard method of accessing
1185 . the IRQs, and because this _should_ work in most configurations.
1186 .
1187 . Specifying an IRQ is done with the assumption that the user knows
1188 . what (s)he is doing. No checking is done!!!!
1189 .
1190 */
1191 #ifndef NO_AUTOPROBE
1192 if ( dev->irq < 2 ) {
1193 int trials;
1194
1195 trials = 3;
1196 while ( trials-- ) {
1197 dev->irq = smc_findirq( ioaddr );
1198 if ( dev->irq )
1199 break;
1200 /* kick the card and try again */
1201 smc_reset( ioaddr );
1202 }
1203 }
1204 if (dev->irq == 0 ) {
1205 printk(CARDNAME": Couldn't autodetect your IRQ. Use irq=xx.\n");
1206 retval = -ENODEV;
1207 goto err_out;
1208 }
1209 #else
1210 if (dev->irq == 0 ) {
1211 printk(CARDNAME
1212 ": Autoprobing IRQs is not supported for this configuration.\n");
1213 return -ENODEV;
1214 }
1215 #endif
1216
1217 /* now, print out the card info, in a short format.. */
1218
1219 printk("%s: %s(r:%d) at %#3x IRQ:%d INTF:%s MEM:%db ", dev->name,
1220 version_string, revision_register & 0xF, ioaddr, dev->irq,
1221 if_string, memory );
1222 /*
1223 . Print the Ethernet address
1224 */
1225 printk("ADDR: ");
1226 for (i = 0; i < 5; i++)
1227 printk("%2.2x:", dev->dev_addr[i] );
1228 printk("%2.2x \n", dev->dev_addr[5] );
1229
1230 /* set the private data to zero by default */
1231 memset(dev->priv, 0, sizeof(struct smc_local));
1232
1233 /* Grab the IRQ */
1234 #ifdef CONFIG_COLDFIRE
1235 mcf_autovector(dev->irq);
1236 retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
1237 #elif defined(CONFIG_M68EZ328) && !defined(CONFIG_CWEZ328) && !defined(CONFIG_CWVZ328)
1238 retval = request_irq(IRQ_MACHSPEC | dev->irq, &smc_interrupt,
1239 IRQ_FLG_STD, dev->name, dev);
1240 if (retval) panic("Unable to attach Lan91C96 intr\n");
1241 #else
1242 retval = request_irq(dev->irq, &smc_interrupt, 0, DRV_NAME, dev);
1243 #endif
1244 if (retval) {
1245 printk("%s: unable to get IRQ %d (irqval=%d).\n", dev->name,
1246 dev->irq, retval);
1247 goto err_out;
1248 }
1249
1250 dev->open = smc_open;
1251 dev->stop = smc_close;
1252 dev->hard_start_xmit = smc_wait_to_send_packet;
1253 dev->tx_timeout = smc_timeout;
1254 dev->watchdog_timeo = HZ/20;
1255 dev->get_stats = smc_query_statistics;
1256 dev->set_multicast_list = smc_set_multicast_list;
1257
1258 #ifdef PHY_SETUP
1259 setup_phy( ioaddr );
1260 #endif
1261 return 0;
1262
1263 err_out:
1264 release_region(ioaddr, SMC_IO_EXTENT);
1265 return retval;
1266 }
1267
1268 #if SMC_DEBUG > 2
1269 static void print_packet( byte * buf, int length )
1270 {
1271 #if 0
1272 int i;
1273 int remainder;
1274 int lines;
1275
1276 printk("Packet of length %d \n", length );
1277 lines = length / 16;
1278 remainder = length % 16;
1279
1280 for ( i = 0; i < lines ; i ++ ) {
1281 int cur;
1282
1283 for ( cur = 0; cur < 8; cur ++ ) {
1284 byte a, b;
1285
1286 a = *(buf ++ );
1287 b = *(buf ++ );
1288 printk("%02x%02x ", a, b );
1289 }
1290 printk("\n");
1291 }
1292 for ( i = 0; i < remainder/2 ; i++ ) {
1293 byte a, b;
1294
1295 a = *(buf ++ );
1296 b = *(buf ++ );
1297 printk("%02x%02x ", a, b );
1298 }
1299 printk("\n");
1300 #endif
1301 }
1302 #endif
1303
1304
1305 /*
1306 * Open and Initialize the board
1307 *
1308 * Set up everything, reset the card, etc ..
1309 *
1310 */
1311 static int smc_open(struct net_device *dev)
1312 {
1313 smcio_t ioaddr = dev->base_addr;
1314
1315 int i; /* used to set hw ethernet address */
1316
1317 /* clear out all the junk that was put here before... */
1318 memset(dev->priv, 0, sizeof(struct smc_local));
1319
1320 /* reset the hardware */
1321
1322 smc_reset( ioaddr );
1323 smc_enable( ioaddr );
1324
1325 /* Select which interface to use */
1326
1327 SMC_SELECT_BANK( 1 );
1328 #if defined(CONFIG_DISKtel) || defined(CONFIG_SH_KEYWEST)
1329 /* Setup to use external PHY on smc91c110 */
1330 outw( inw( ioaddr + CONFIG ) | CFG_NO_WAIT | CFG_MII_SELECT,
1331 (ioaddr + CONFIG ));
1332 #else
1333 if ( dev->if_port == 1 ) {
1334 outw( inw( ioaddr + CONFIG ) & ~CFG_AUI_SELECT,
1335 ioaddr + CONFIG );
1336 }
1337 else if ( dev->if_port == 2 ) {
1338 outw( inw( ioaddr + CONFIG ) | CFG_AUI_SELECT,
1339 ioaddr + CONFIG );
1340 }
1341 #endif
1342
1343 /*
1344 According to Becker, I have to set the hardware address
1345 at this point, because the (l)user can set it with an
1346 ioctl. Easily done...
1347 */
1348 SMC_SELECT_BANK( 1 );
1349 for ( i = 0; i < 6; i += 2 ) {
1350 word address;
1351
1352 address = dev->dev_addr[ i + 1 ] << 8 ;
1353 address |= dev->dev_addr[ i ];
1354 outw( address, ioaddr + ADDR0 + i );
1355 }
1356
1357 netif_start_queue(dev);
1358
1359 #if defined(CONFIG_LEDMAN) && defined(CONFIG_SNAPGEAR)
1360 /*
1361 * fix the link status LED's
1362 */
1363 SMC_SELECT_BANK( 0 );
1364 ledman_cmd((inw(ioaddr + EPH_STATUS) & ES_LINK_OK) == ES_LINK_OK ?
1365 LEDMAN_CMD_ON : LEDMAN_CMD_OFF,
1366 strcmp(dev->name, "eth0") ?
1367 LEDMAN_LAN2_LINK : LEDMAN_LAN1_LINK);
1368 #endif
1369
1370 return 0;
1371 }
1372
1373 /*--------------------------------------------------------
1374 . Called by the kernel to send a packet out into the void
1375 . of the net. This routine is largely based on
1376 . skeleton.c, from Becker.
1377 .--------------------------------------------------------
1378 */
1379
1380 static void smc_timeout(struct net_device *dev)
1381 {
1382 /* If we get here, some higher level has decided we are broken.
1383 There should really be a "kick me" function call instead. */
1384 printk(KERN_WARNING CARDNAME": transmit timed out, %s?\n",
1385 tx_done(dev) ? "IRQ conflict" :
1386 "network cable problem");
1387 /* "kick" the adaptor */
1388 smc_reset( dev->base_addr );
1389 smc_enable( dev->base_addr );
1390 dev->trans_start = jiffies;
1391 /* clear anything saved */
1392 ((struct smc_local *)dev->priv)->saved_skb = NULL;
1393 netif_wake_queue(dev);
1394 }
1395
1396 /*-------------------------------------------------------------
1397 .
1398 . smc_rcv - receive a packet from the card
1399 .
1400 . There is ( at least ) a packet waiting to be read from
1401 . chip-memory.
1402 .
1403 . o Read the status
1404 . o If an error, record it
1405 . o otherwise, read in the packet
1406 --------------------------------------------------------------
1407 */
1408 static void smc_rcv(struct net_device *dev)
1409 {
1410 struct smc_local *lp = netdev_priv(dev);
1411 int ioaddr = dev->base_addr;
1412 int packet_number;
1413 word status, packet_length;
1414
1415 /* assume bank 2 */
1416
1417 packet_number = inw( ioaddr + FIFO_PORTS );
1418
1419 if ( packet_number & FP_RXEMPTY ) {
1420 /* we got called , but nothing was on the FIFO */
1421 PRINTK((CARDNAME ": WARNING: smc_rcv with nothing on FIFO. \n"));
1422 /* don't need to restore anything */
1423 return;
1424 }
1425
1426 /* start reading from the start of the packet */
1427 outw( PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER );
1428
1429 /* First two words are status and packet_length */
1430 #ifndef CONFIG_SH_KEYWEST
1431 status = inw( ioaddr + DATA_1 );
1432 packet_length = inw( ioaddr + DATA_1 );
1433 #else
1434 {
1435 unsigned int l = inl( ioaddr + DATA_1 );
1436 status = l & 0xffff;
1437 packet_length = l >> 16;
1438 }
1439 #endif
1440
1441 packet_length &= 0x07ff; /* mask off top bits */
1442
1443 PRINTK2(("RCV: STATUS %4x LENGTH %4x\n", status, packet_length ));
1444 /*
1445 . the packet length contains 3 extra words :
1446 . status, length, and an extra word with an odd byte .
1447 */
1448 packet_length -= 6;
1449
1450 if ( !(status & RS_ERRORS ) ){
1451 /* do stuff to make a new packet */
1452 struct sk_buff * skb;
1453 byte * data;
1454
1455 /* read one extra byte */
1456 if ( status & RS_ODDFRAME )
1457 packet_length++;
1458
1459 /* set multicast stats */
1460 if ( status & RS_MULTICAST )
1461 lp->stats.multicast++;
1462
1463 skb = dev_alloc_skb( packet_length + 5);
1464
1465 if ( skb == NULL ) {
1466 printk(KERN_NOTICE CARDNAME ": Low memory, packet dropped.\n");
1467 lp->stats.rx_dropped++;
1468 goto done;
1469 }
1470
1471 /*
1472 ! This should work without alignment, but it could be
1473 ! in the worse case
1474 */
1475
1476 skb_reserve( skb, 2 ); /* 16 bit alignment */
1477
1478 skb->dev = dev;
1479 data = skb_put( skb, packet_length);
1480
1481 #ifdef USE_32_BIT
1482 /* QUESTION: Like in the TX routine, do I want
1483 to send the DWORDs or the bytes first, or some
1484 mixture. A mixture might improve already slow PIO
1485 performance */
1486 PRINTK3((" Reading %d dwords (and %d bytes) \n",
1487 packet_length >> 2, packet_length & 3 ));
1488 insl(ioaddr + DATA_1 , data, packet_length >> 2 );
1489 /* read the left over bytes */
1490 #ifndef CONFIG_SH_KEYWEST
1491 insb( ioaddr + DATA_1, data + (packet_length & 0xFFFFFC),
1492 packet_length & 0x3 );
1493 #else
1494 if (packet_length & 3) {
1495 union { unsigned int l; char data[4]; } l;
1496 l.l = inl(ioaddr + DATA_1);
1497 memcpy(data + (packet_length & ~0x3), l.data, packet_length & 0x3);
1498 }
1499 #endif
1500 #else
1501 PRINTK3((" Reading %d words and %d byte(s) \n",
1502 (packet_length >> 1 ), packet_length & 1 ));
1503 insw(ioaddr + DATA_1 , data, packet_length >> 1);
1504 if ( packet_length & 1 ) {
1505 data += packet_length & ~1;
1506 *(data++) = inb( ioaddr + DATA_1 );
1507 }
1508 #endif
1509 #if SMC_DEBUG > 2
1510 print_packet( data, packet_length );
1511 #endif
1512
1513 skb->protocol = eth_type_trans(skb, dev );
1514 netif_rx(skb);
1515 dev->last_rx = jiffies;
1516 lp->stats.rx_packets++;
1517 lp->stats.rx_bytes += packet_length;
1518 } else {
1519 /* error ... */
1520 lp->stats.rx_errors++;
1521
1522 if ( status & RS_ALGNERR ) lp->stats.rx_frame_errors++;
1523 if ( status & (RS_TOOSHORT | RS_TOOLONG ) )
1524 lp->stats.rx_length_errors++;
1525 if ( status & RS_BADCRC) lp->stats.rx_crc_errors++;
1526 }
1527
1528 done:
1529 /* error or good, tell the card to get rid of this packet */
1530 outw( MC_RELEASE, ioaddr + MMU_CMD );
1531 }
1532
1533
1534 /*************************************************************************
1535 . smc_tx
1536 .
1537 . Purpose: Handle a transmit error message. This will only be called
1538 . when an error, because of the AUTO_RELEASE mode.
1539 .
1540 . Algorithm:
1541 . Save pointer and packet no
1542 . Get the packet no from the top of the queue
1543 . check if it's valid ( if not, is this an error??? )
1544 . read the status word
1545 . record the error
1546 . ( resend? Not really, since we don't want old packets around )
1547 . Restore saved values
1548 ************************************************************************/
1549 static void smc_tx( struct net_device * dev )
1550 {
1551 int ioaddr = dev->base_addr;
1552 struct smc_local *lp = netdev_priv(dev);
1553 byte saved_packet;
1554 byte packet_no;
1555 word tx_status;
1556
1557
1558 /* assume bank 2 */
1559
1560 saved_packet = inb( ioaddr + PNR_ARR );
1561 packet_no = inw( ioaddr + FIFO_PORTS );
1562 packet_no &= 0x7F;
1563
1564 /* select this as the packet to read from */
1565 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1566 outw( packet_no, ioaddr + PNR_ARR );
1567 #else
1568 outb( packet_no, ioaddr + PNR_ARR );
1569 #endif
1570
1571
1572 /* read the first word from this packet */
1573 outw( PTR_AUTOINC | PTR_READ, ioaddr + POINTER );
1574
1575 tx_status = inw( ioaddr + DATA_1 );
1576 PRINTK3((CARDNAME": TX DONE STATUS: %4x \n", tx_status ));
1577
1578 lp->stats.tx_errors++;
1579 if ( tx_status & TS_LOSTCAR ) lp->stats.tx_carrier_errors++;
1580 if ( tx_status & TS_LATCOL ) {
1581 #if 0
1582 printk(KERN_DEBUG CARDNAME
1583 ": Late collision occurred on last xmit.\n");
1584 #endif
1585 lp->stats.tx_window_errors++;
1586 }
1587 #if 0
1588 if ( tx_status & TS_16COL ) { ... }
1589 #endif
1590
1591 if ( tx_status & TS_SUCCESS ) {
1592 printk(CARDNAME": Successful packet caused interrupt \n");
1593 }
1594 /* re-enable transmit */
1595 SMC_SELECT_BANK( 0 );
1596 outw( inw( ioaddr + TCR ) | TCR_ENABLE, ioaddr + TCR );
1597
1598 /* kill the packet */
1599 SMC_SELECT_BANK( 2 );
1600 outw( MC_FREEPKT, ioaddr + MMU_CMD );
1601
1602 /* one less packet waiting for me */
1603 lp->packets_waiting--;
1604
1605 #if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68EZ328)
1606 outw( saved_packet, ioaddr + PNR_ARR );
1607 #else
1608 outb( saved_packet, ioaddr + PNR_ARR );
1609 #endif
1610 return;
1611 }
1612
1613 /*--------------------------------------------------------------------
1614 .
1615 . This is the main routine of the driver, to handle the device when
1616 . it needs some attention.
1617 .
1618 . So:
1619 . first, save state of the chipset
1620 . branch off into routines to handle each case, and acknowledge
1621 . each to the interrupt register
1622 . and finally restore state.
1623 .
1624 ---------------------------------------------------------------------*/
1625
1626 static irqreturn_t smc_interrupt(int irq, void * dev_id, struct pt_regs * regs)
1627 {
1628 struct net_device *dev = dev_id;
1629 int ioaddr = dev->base_addr;
1630 struct smc_local *lp = netdev_priv(dev);
1631
1632 byte status;
1633 word card_stats;
1634 byte mask;
1635 int timeout;
1636 /* state registers */
1637 word saved_bank;
1638 word saved_pointer;
1639 int handled = 0;
1640
1641
1642 PRINTK3((CARDNAME": SMC interrupt started \n"));
1643
1644 saved_bank = inw( ioaddr + BANK_SELECT );
1645
1646 SMC_SELECT_BANK(2);
1647 saved_pointer = inw( ioaddr + POINTER );
1648
1649 mask = inb( ioaddr + INT_MASK );
1650 /* clear all interrupts */
1651 outb( 0, ioaddr + INT_MASK );
1652
1653
1654 /* set a timeout value, so I don't stay here forever */
1655 timeout = 4;
1656
1657 PRINTK2((KERN_WARNING CARDNAME ": MASK IS %x \n", mask ));
1658 do {
1659 /* read the status flag, and mask it */
1660 status = inb( ioaddr + INTERRUPT ) & mask;
1661 if (!status )
1662 break;
1663
1664 handled = 1;
1665
1666 PRINTK3((KERN_WARNING CARDNAME
1667 ": Handling interrupt status %x \n", status ));
1668
1669 if (status & IM_RCV_INT) {
1670 /* Got a packet(s). */
1671 PRINTK2((KERN_WARNING CARDNAME
1672 ": Receive Interrupt\n"));
1673 smc_rcv(dev);
1674 } else if (status & IM_TX_INT ) {
1675 PRINTK2((KERN_WARNING CARDNAME
1676 ": TX ERROR handled\n"));
1677 smc_tx(dev);
1678 outb(IM_TX_INT, ioaddr + INTERRUPT );
1679 } else if (status & IM_TX_EMPTY_INT ) {
1680 /* update stats */
1681 SMC_SELECT_BANK( 0 );
1682 card_stats = inw( ioaddr + COUNTER );
1683 /* single collisions */
1684 lp->stats.collisions += card_stats & 0xF;
1685 card_stats >>= 4;
1686 /* multiple collisions */
1687 lp->stats.collisions += card_stats & 0xF;
1688
1689 /* these are for when linux supports these statistics */
1690
1691 SMC_SELECT_BANK( 2 );
1692 PRINTK2((KERN_WARNING CARDNAME
1693 ": TX_BUFFER_EMPTY handled\n"));
1694 outb( IM_TX_EMPTY_INT, ioaddr + INTERRUPT );
1695 mask &= ~IM_TX_EMPTY_INT;
1696 lp->stats.tx_packets += lp->packets_waiting;
1697 lp->packets_waiting = 0;
1698
1699 } else if (status & IM_ALLOC_INT ) {
1700 PRINTK2((KERN_DEBUG CARDNAME
1701 ": Allocation interrupt \n"));
1702 /* clear this interrupt so it doesn't happen again */
1703 mask &= ~IM_ALLOC_INT;
1704
1705 smc_hardware_send_packet( dev );
1706
1707 /* enable xmit interrupts based on this */
1708 mask |= ( IM_TX_EMPTY_INT | IM_TX_INT );
1709
1710 /* and let the card send more packets to me */
1711 netif_wake_queue(dev);
1712
1713 PRINTK2((CARDNAME": Handoff done successfully.\n"));
1714 } else if (status & IM_RX_OVRN_INT ) {
1715 lp->stats.rx_errors++;
1716 lp->stats.rx_fifo_errors++;
1717 outb( IM_RX_OVRN_INT, ioaddr + INTERRUPT );
1718 } else if (status & IM_EPH_INT ) {
1719 PRINTK((CARDNAME ": UNSUPPORTED: EPH INTERRUPT \n"));
1720 } else if (status & IM_ERCV_INT ) {
1721 PRINTK((CARDNAME ": UNSUPPORTED: ERCV INTERRUPT \n"));
1722 outb( IM_ERCV_INT, ioaddr + INTERRUPT );
1723 }
1724 } while ( timeout -- );
1725
1726
1727 /* restore state register */
1728 SMC_SELECT_BANK( 2 );
1729 outb( mask, ioaddr + INT_MASK );
1730
1731 PRINTK3(( KERN_WARNING CARDNAME ": MASK is now %x \n", mask ));
1732 outw( saved_pointer, ioaddr + POINTER );
1733
1734 SMC_SELECT_BANK( saved_bank );
1735
1736 PRINTK3((CARDNAME ": Interrupt done\n"));
1737 return IRQ_RETVAL(handled);
1738 }
1739
1740
1741 /*----------------------------------------------------
1742 . smc_close
1743 .
1744 . this makes the board clean up everything that it can
1745 . and not talk to the outside world. Caused by
1746 . an 'ifconfig ethX down'
1747 .
1748 -----------------------------------------------------*/
1749 static int smc_close(struct net_device *dev)
1750 {
1751 netif_stop_queue(dev);
1752 /* clear everything */
1753 smc_shutdown( dev->base_addr );
1754
1755 #if defined(CONFIG_LEDMAN) && defined(CONFIG_SNAPGEAR)
1756 ledman_cmd(LEDMAN_CMD_OFF,
1757 strcmp(dev->name, "eth0")?LEDMAN_LAN2_LINK : LEDMAN_LAN1_LINK);
1758 #endif
1759
1760 /* Update the statistics here. */
1761 return 0;
1762 }
1763
1764 /*------------------------------------------------------------
1765 . Get the current statistics.
1766 . This may be called with the card open or closed.
1767 .-------------------------------------------------------------*/
1768 static struct net_device_stats* smc_query_statistics(struct net_device *dev) {
1769 struct smc_local *lp = netdev_priv(dev);
1770
1771 return &lp->stats;
1772 }
1773
1774 /*-----------------------------------------------------------
1775 . smc_set_multicast_list
1776 .
1777 . This routine will, depending on the values passed to it,
1778 . either make it accept multicast packets, go into
1779 . promiscuous mode ( for TCPDUMP and cousins ) or accept
1780 . a select set of multicast packets
1781 */
1782 static void smc_set_multicast_list(struct net_device *dev)
1783 {
1784 smcio_t ioaddr = dev->base_addr;
1785
1786 SMC_SELECT_BANK(0);
1787 if ( dev->flags & IFF_PROMISC )
1788 outw( inw(ioaddr + RCR ) | RCR_PROMISC, ioaddr + RCR );
1789
1790 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1791 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1792 when promiscuous mode is turned on.
1793 */
1794
1795 /* Here, I am setting this to accept all multicast packets.
1796 I don't need to zero the multicast table, because the flag is
1797 checked before the table is
1798 */
1799 else if (dev->flags & IFF_ALLMULTI)
1800 outw( inw(ioaddr + RCR ) | RCR_ALMUL, ioaddr + RCR );
1801
1802 /* We just get all multicast packets even if we only want them
1803 . from one source. This will be changed at some future
1804 . point. */
1805 else if (dev->mc_count ) {
1806 /* support hardware multicasting */
1807
1808 /* be sure I get rid of flags I might have set */
1809 outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL),
1810 ioaddr + RCR );
1811 /* NOTE: this has to set the bank, so make sure it is the
1812 last thing called. The bank is set to zero at the top */
1813 smc_setmulticast( ioaddr, dev->mc_count, dev->mc_list );
1814 }
1815 else {
1816 outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL),
1817 ioaddr + RCR );
1818
1819 /*
1820 since I'm disabling all multicast entirely, I need to
1821 clear the multicast list
1822 */
1823 SMC_SELECT_BANK( 3 );
1824 outw( 0, ioaddr + MULTICAST1 );
1825 outw( 0, ioaddr + MULTICAST2 );
1826 outw( 0, ioaddr + MULTICAST3 );
1827 outw( 0, ioaddr + MULTICAST4 );
1828 }
1829 }
1830
1831 #ifdef PHY_SETUP
1832 static int phy_delay1 = 4;
1833 static int phy_delay2 = 1;
1834 static int phy_delay3 = 100;
1835 #endif
1836
1837 #ifdef MODULE
1838
1839 static struct net_device *devSMC9194;
1840 MODULE_LICENSE("GPL");
1841
1842 MODULE_PARM(io, "i");
1843 MODULE_PARM(irq, "i");
1844 MODULE_PARM(ifport, "i");
1845 MODULE_PARM_DESC(io, "SMC 99194 I/O base address");
1846 MODULE_PARM_DESC(irq, "SMC 99194 IRQ number");
1847 MODULE_PARM_DESC(ifport, "SMC 99194 interface port (0-default, 1-TP, 2-AUI)");
1848
1849 #ifdef PHY_SETUP
1850 MODULE_PARM(phy_delay1, "i");
1851 MODULE_PARM(phy_delay2, "i");
1852 MODULE_PARM(phy_delay3, "i");
1853 MODULE_PARM_DESC(phy_delay1, "Per MII clock delay [4]");
1854 MODULE_PARM_DESC(phy_delay2, "General delay [1]");
1855 MODULE_PARM_DESC(phy_delay3, "pre probe delay [100]");
1856 #endif
1857
1858 int init_module(void)
1859 {
1860 if (io == 0)
1861 printk(KERN_WARNING
1862 CARDNAME": You shouldn't use auto-probing with insmod!\n" );
1863
1864 #ifdef PHY_SETUP
1865 printk(CARDNAME ": phy_delays %d %d %d\n", phy_delay1, phy_delay2,
1866 phy_delay3);
1867 #endif
1868 /* copy the parameters from insmod into the device structure */
1869 devSMC9194 = smc_init(-1);
1870 if (IS_ERR(devSMC9194))
1871 return PTR_ERR(devSMC9194);
1872 return 0;
1873 }
1874
1875 void cleanup_module(void)
1876 {
1877 unregister_netdev(devSMC9194);
1878 free_irq(devSMC9194->irq, devSMC9194);
1879 release_region(devSMC9194->base_addr, SMC_IO_EXTENT);
1880 free_netdev(devSMC9194);
1881 }
1882
1883 #endif /* MODULE */
1884
1885
1886 #ifdef PHY_SETUP
1887 /*-----------------------------------------------------------
1888 . PHY/MII setup routines
1889 .
1890 */
1891
1892 #define phy_delay(x) ({ int d; for (d = 0; d < 100; d++) udelay((x) * 10); })
1893
1894 /*
1895 * Ports for talking to the PHY/MII
1896 */
1897
1898 #define NV_CONTROL 0x10
1899 #define MIICTRL 0x30
1900 #define MIIDATA 0x34
1901 #define MIICFG 0x38
1902
1903 #define MIIREAD 0x0001
1904 #define MIIWRITE 0x0002
1905
1906 #define MDO 0x01 /* MII Register bits */
1907 #define MDI 0x02
1908 #define MCLK 0x04
1909 #define MDOE 0x08
1910 #define MALL 0x0F
1911 #define OPWrite 0x01
1912 #define OPRead 0x02
1913
1914
1915 #define PHY_CR 0 /* PHY Registers and bits */
1916 #define PHY_CR_Reset 0x8000
1917 #define PHY_CR_Speed 0x2000
1918 #define PHY_CR_Duplex 0x0100
1919
1920 #define PHY_SR 1
1921 #define PHY_ID1 2
1922 #define PHY_ID2 3
1923
1924 /*
1925 * PHY propietary registers
1926 */
1927
1928 #define PHY_NATIONAL_PAR 0x19
1929 #define PHY_NATIONAL_PAR_DUPLEX 0x0080
1930 #define PHY_NATIONAL_PAR_SPEED_10 0x0040
1931
1932 #define PHY_TDK_DIAG 0x12
1933 #define PHY_TDK_DIAG_DUPLEX 0x0800
1934 #define PHY_TDK_DIAG_RATE 0x0400
1935
1936 #define PHY_QSI_BASETX 0x1F
1937 #define PHY_QSI_BASETX_OPMODE_MASK 0x001c
1938 #define PHY_QSI_BASETX_OPMODE_10HD (2<<0x1)
1939 #define PHY_QSI_BASETX_OPMODE_100HD (2<<0x2)
1940 #define PHY_QSI_BASETX_OPMODE_10FD (2<<0x5)
1941 #define PHY_QSI_BASETX_OPMODE_100FD (2<<0x6)
1942
1943 #define PHY_SEEQ_STATUS_OUTPUT 0x12
1944 #define PHY_SEEQ_SPD_DET 0x80
1945 #define PHY_SEEQ_DPLX_DET 0x40
1946
1947 #define PHY_OUI_QSI 0x006051
1948 #define PHY_OUI_TDK 0x00C039
1949 #define PHY_OUI_MITELSMSC 0x00A087
1950 #define PHY_OUI_NATIONAL 0x080017
1951 #define PHY_OUI_SEEQSMSC 0x0005BE
1952
1953 #define NWAY_TIMEOUT 10
1954
1955 #define MAC_IS_FEAST() (1)
1956 #define MAC_IS_EPIC() (0)
1957
1958 static void
1959 clkmdio(smcio_t ioaddr, unsigned int MGMTData)
1960 {
1961 outw(MGMTData, ioaddr + MGMT);
1962 udelay(phy_delay1);
1963 outw(MGMTData | MCLK, ioaddr + MGMT);
1964 udelay(phy_delay1);
1965 }
1966
1967
1968 static unsigned
1969 PHYAccess(
1970 smcio_t ioaddr,
1971 unsigned char PHYAdd,
1972 unsigned char RegAdd,
1973 unsigned char OPCode,
1974 unsigned wData)
1975 {
1976 int i;
1977 unsigned MGMTval;
1978
1979 // Filter unused bits from input variables.
1980
1981 PHYAdd &= 0x1F;
1982 RegAdd &= 0x1F;
1983 OPCode &= 0x03;
1984
1985 if (MAC_IS_FEAST()) {
1986 MGMTval = inw(ioaddr + MGMT) & (MALL ^ 0xFFFF);
1987
1988 // Output Preamble (32 '1's)
1989
1990 for (i = 0; i < 32; i++)
1991 clkmdio(ioaddr, MGMTval | MDOE | MDO);
1992
1993 // Output Start of Frame ('01')
1994
1995 for (i = 0; i < 2; i++)
1996 clkmdio(ioaddr, MGMTval | MDOE | i);
1997
1998 // Output OPCode ('01' for write or '10' for Read)
1999
2000 for (i = 1; i >= 0; i--)
2001 clkmdio(ioaddr, MGMTval | MDOE | ((OPCode>>i) & 0x01) );
2002
2003 // Output PHY Address
2004
2005 for (i = 4; i >= 0; i--)
2006 clkmdio(ioaddr, MGMTval | MDOE | ((PHYAdd>>i) & 0x01) );
2007
2008 // Output Register Address
2009
2010 for (i = 4; i >= 0; i--)
2011 clkmdio(ioaddr, MGMTval | MDOE | ((RegAdd>>i) & 0x01) );
2012
2013 if (OPCode == OPRead) {
2014 // Read Operation
2015
2016 // Implement Turnaround ('Z0')
2017
2018 clkmdio(ioaddr, MGMTval);
2019 // clkmdio(ioaddr, MGMTval | MDOE);
2020
2021 // Read Data
2022
2023 wData = 0;
2024
2025 for (i = 15; i >= 0; i--) {
2026 clkmdio(ioaddr, MGMTval);
2027 wData |= (((inw(ioaddr + MGMT) & MDI) >> 1) << i);
2028 }
2029
2030 // Add Idle state
2031
2032 clkmdio(ioaddr, MGMTval);
2033
2034 return (wData);
2035 } else {
2036 // Write Operation
2037
2038 // Implement Turnaround ('10')
2039
2040 for (i = 1; i >= 0; i--)
2041 clkmdio(ioaddr, MGMTval | MDOE | ((2>>i) & 0x01));
2042
2043 // Write Data
2044
2045 for (i = 15; i >= 0; i--)
2046 clkmdio(ioaddr, MGMTval | MDOE | ((wData>>i) & 0x01));
2047
2048 // Add Idle state
2049
2050 clkmdio(ioaddr, MGMTval);
2051
2052 return (1);
2053 }
2054 }
2055
2056 if (MAC_IS_EPIC()) {
2057 if (OPCode == OPRead) {
2058 // Read Operation
2059 outw((((unsigned)PHYAdd)<<9) | (((unsigned)RegAdd)<<4) | MIIREAD,
2060 ioaddr + MIICTRL);
2061 phy_delay(phy_delay2);
2062 wData = inw(MIIDATA);
2063 return(wData);
2064 } else {
2065 // Write Operation
2066 outw(wData, ioaddr + MIIDATA);
2067 outw((((unsigned)PHYAdd)<<9) | (((unsigned)RegAdd)<<4) | MIIWRITE,
2068 ioaddr + MIICTRL);
2069 phy_delay(phy_delay2);
2070 return(1);
2071 }
2072 }
2073
2074 return(1);
2075
2076 }
2077
2078
2079 static unsigned char
2080 DetectPHY(
2081 smcio_t ioaddr,
2082 unsigned long *OUI,
2083 unsigned char *Model,
2084 unsigned char *Revision)
2085 {
2086 unsigned int PhyId1, PhyId2;
2087 unsigned char PhyAdd=0xff;
2088 int Count;
2089
2090 for (Count=31; Count >= 0; Count--) {
2091 PhyId1 = PHYAccess(ioaddr, Count, PHY_ID1, OPRead, 0);
2092 PhyId1 = PHYAccess(ioaddr, Count, PHY_ID1, OPRead, 0);
2093 PhyId2 = PHYAccess(ioaddr, Count, PHY_ID2, OPRead, 0);
2094 PhyId2 = PHYAccess(ioaddr, Count, PHY_ID2, OPRead, 0);
2095
2096 if (PhyId1 > 0x0000 && PhyId1 < 0xffff && PhyId2 > 0x0000 &&
2097 PhyId2 < 0xffff && PhyId1 != 0x8000 && PhyId2 != 0x8000) {
2098 PhyAdd = (unsigned char) Count;
2099 break;
2100 }
2101 phy_delay(phy_delay2);
2102 }
2103
2104 *OUI = (((unsigned long) PhyId1) << 6) | ((PhyId2 & 0xfc00) >> 10);
2105 *Model = (unsigned char) ((PhyId2 & 0x03f0) >> 4);
2106 *Revision = (unsigned char) (PhyId2 & 0x000f);
2107
2108 return(PhyAdd);
2109 }
2110
2111
2112 static int
2113 setup_phy(smcio_t ioaddr)
2114 {
2115 int duplex = 0; /* 0 = Half, !0 = Full */
2116 int speed = 0; /* 0 = 10Mbps, !0 = 100Mbps */
2117 char *report = "";
2118 unsigned long OUI;
2119 unsigned char Model, Revision;
2120
2121 unsigned int i, PHYConfig, PHYConfig2, data;
2122 unsigned char PHYAdd, ositech = 0;
2123
2124 printk("SMCPHY: ");
2125 #if 0
2126 ositech = 1;
2127 #endif
2128
2129 //Setting the AUI Select Bit for 91C110 PCMCIA Design. 11/23/99 PG
2130 if (ositech) {
2131 SMC_SELECT_BANK( 1 );
2132 data = inw(ioaddr + BANK_SELECT);
2133 outw(data | 0x0100, ioaddr);
2134 }
2135
2136 if (MAC_IS_FEAST())
2137 SMC_SELECT_BANK ( 3 );
2138
2139 PHYAdd = DetectPHY(ioaddr, &OUI, &Model, &Revision);
2140
2141 if (PHYAdd > 31) {
2142 printk("UNRECOVERABLE ERROR: PHY is not present or not supported\n");
2143 return(-1);
2144 }
2145
2146 //Setup NV_CONTROL for the cardbus card.
2147 if (OUI == PHY_OUI_TDK)
2148 outw(0x7c03, ioaddr + NV_CONTROL);
2149
2150 // Save Register 0.
2151
2152 if (OUI == PHY_OUI_TDK)
2153 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPRead, 0);
2154 PHYConfig = PHYAccess(ioaddr, PHYAdd,PHY_CR,OPRead,0);
2155
2156 if (OUI == PHY_OUI_TDK) {
2157 outw(0x0012, ioaddr + MIICFG); /* Set ENABLE_694 */
2158 /* if using EPIC, Hardware Reset the PHY from the MAC */
2159 outw(inw(ioaddr + CONTROL) | 0x4000, ioaddr + CONTROL);
2160 phy_delay(phy_delay2);
2161 outw(inw(ioaddr + CONTROL) & (~0x4000), ioaddr + CONTROL);
2162 phy_delay(phy_delay2);
2163 }
2164
2165 /* Reset PHY */
2166 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPWrite, PHY_CR_Reset);
2167 if (OUI == PHY_OUI_TDK)
2168 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPWrite, PHY_CR_Reset);
2169
2170 for (i = 0; i < 500; i++) {
2171 if (OUI == PHY_OUI_TDK)
2172 PHYAccess(ioaddr, PHYAdd, PHY_CR, OPRead, 0);
2173
2174 if (PHYAccess(ioaddr, PHYAdd, PHY_CR, OPRead, 0) & PHY_CR_Reset)
2175 phy_delay(phy_delay2);
2176 else
2177 break;
2178 }
2179
2180 if (i == 500) {
2181 printk("UNRECOVERABLE ERROR: Could not reset PHY\n");
2182 return(-1);
2183 }
2184
2185 /* Write selected configuration to the PHY and verify it by reading back */
2186 /* Set Advertising Register for all 10/100 and Half/Full combinations */
2187
2188 if (OUI == PHY_OUI_TDK)
2189 PHYConfig = PHYAccess(ioaddr, PHYAdd, 4, OPRead, 0);
2190 PHYConfig = PHYAccess(ioaddr, PHYAdd, 4, OPRead, 0);
2191 PHYConfig |= 0x01e0;
2192 PHYAccess(ioaddr, PHYAdd, 4, OPWrite, PHYConfig);
2193 if (OUI == PHY_OUI_TDK)
2194 PHYAccess(ioaddr, PHYAdd, 4, OPWrite, PHYConfig);
2195
2196 /* Start 1 */
2197
2198 /* National PHY requires clear before set 1 enable. */
2199 PHYAccess(ioaddr, PHYAdd, 0, OPWrite, 0x0000);
2200 PHYAccess(ioaddr, PHYAdd, 0, OPWrite, 0x1200);
2201 if (OUI == PHY_OUI_TDK)
2202 PHYAccess(ioaddr, PHYAdd, 0, OPWrite, 0x1200);
2203
2204 /* Wait for completion */
2205 for (i = 0; i < NWAY_TIMEOUT * 10; i++) {
2206 printk("%c\b", "|/-\\"[i&3]);
2207
2208 phy_delay(phy_delay3);
2209
2210 PHYConfig = PHYAccess(ioaddr, PHYAdd, 1, OPRead, 0);
2211 PHYConfig2 = PHYAccess(ioaddr, PHYAdd, 1, OPRead, 0);
2212
2213 if (PHYConfig != PHYConfig2) /* Value is not stable */
2214 continue;
2215 if (PHYConfig & 0x0010) /* Remote Fault */
2216 continue;
2217 if ((PHYConfig == 0x0000) || (PHYConfig == 0xffff)) /* invalid value */
2218 continue;
2219 if (PHYConfig & 0x0020)
2220 break;
2221 }
2222
2223 /* Now read the results of the NWAY. */
2224
2225 if (OUI == PHY_OUI_TDK)
2226 PHYConfig = PHYAccess(ioaddr, PHYAdd, 5, OPRead, 0);
2227 PHYConfig = PHYAccess(ioaddr, PHYAdd, 5, OPRead, 0);
2228
2229 if (PHYConfig != 0) {
2230 /* Got real NWAY information here */
2231 report = "ANLPA";
2232 speed = (PHYConfig & 0x0180);
2233 duplex = (PHYConfig & 0x0140);
2234 } else {
2235 /*
2236 * ANLPA was 0 so NWAY did not complete or is not reported fine.
2237 * Get the info from propietary regs or from the control register.
2238 */
2239 report = "Prop."; /* Proprietary Status */
2240
2241 switch (OUI) {
2242 case PHY_OUI_NATIONAL:
2243 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_NATIONAL_PAR, OPRead, 0);
2244 duplex = (PHYConfig & PHY_NATIONAL_PAR_DUPLEX);
2245 speed = ! (PHYConfig & PHY_NATIONAL_PAR_SPEED_10);
2246 break;
2247
2248 case PHY_OUI_TDK:
2249 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_TDK_DIAG, OPRead, 0);
2250 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_TDK_DIAG, OPRead, 0);
2251 speed = ((Revision < 7) && ((PHYConfig & 0x300) == 0x300)) ||
2252 ((Revision >= 7) && (PHYConfig & PHY_TDK_DIAG_RATE));
2253 duplex = ((Revision >= 7) && (PHYConfig & PHY_TDK_DIAG_DUPLEX));
2254 break;
2255
2256 case PHY_OUI_QSI:
2257 PHYConfig = PHYAccess(ioaddr, PHYAdd, PHY_QSI_BASETX, OPRead, 0);
2258 PHYConfig &= PHY_QSI_BASETX_OPMODE_MASK;
2259 duplex = (PHYConfig & PHY_QSI_BASETX_OPMODE_10FD) ||
2260 (PHYConfig & PHY_QSI_BASETX_OPMODE_100FD);
2261 speed = (PHYConfig & PHY_QSI_BASETX_OPMODE_100HD) ||
2262 (PHYConfig & PHY_QSI_BASETX_OPMODE_100FD);
2263 break;
2264
2265 case PHY_OUI_SEEQSMSC:
2266 PHYConfig=PHYAccess(ioaddr,PHYAdd,PHY_SEEQ_STATUS_OUTPUT,OPRead,0);
2267 duplex = (PHYConfig & PHY_SEEQ_DPLX_DET);
2268 speed = (PHYConfig & PHY_SEEQ_SPD_DET);
2269 break;
2270
2271 default:
2272 report = "Command";
2273 PHYConfig = PHYAccess(ioaddr, PHYAdd, 0, OPRead, 0);
2274 speed = (PHYConfig & 0x2000);
2275 duplex = (PHYConfig & 0x0100);
2276 break;
2277 }
2278 }
2279
2280 /* Do we need to adjust the Carrier sense on full duplex FEAST issue ? */
2281
2282 if (duplex && MAC_IS_FEAST() && (OUI == PHY_OUI_MITELSMSC))
2283 PHYAccess(ioaddr, PHYAdd, 0x18, OPWrite,
2284 0x0020 | PHYAccess(ioaddr, PHYAdd, 0x18, OPRead, 0));
2285
2286 /* Display what we learned */
2287
2288 printk(" %s-duplex %d Mbps ", duplex ? "Full" : "Half", speed ? 100 : 10);
2289
2290 if (MAC_IS_FEAST())
2291 printk("FEAST ");
2292 if (MAC_IS_EPIC())
2293 printk("EPIC ");
2294
2295 switch (OUI) {
2296 case PHY_OUI_QSI: printk("QSI"); break;
2297 case PHY_OUI_TDK: printk("TDK"); break;
2298 case PHY_OUI_MITELSMSC: printk("MITEL/SMSC180"); break;
2299 case PHY_OUI_NATIONAL: printk("NATIONAL"); break;
2300 case PHY_OUI_SEEQSMSC: printk("SEEQ/SMSC183"); break;
2301 default: printk("%06lX(UNKNOWN)",OUI); break;
2302 }
2303
2304 printk(" Model=%02X Rev=%02X ", Model, Revision);
2305 #if DEBUG
2306 printk("Addr=%02X ", PHYAdd);
2307 printk("Conf=%s ", report);
2308 #endif
2309 if (i == NWAY_TIMEOUT)
2310 printk("TIMEOUT!\n");
2311 else
2312 printk("Done.\n");
2313 return(0);
2314 }
2315
2316 /*----------------------------------------------------------- */
2317 #endif /* PHY_SETUP */
MOXA 2.6.9 from sdlinux-moxaart.tgz