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[linux-2.6.9-moxart.git] / drivers / pcmcia / i82092.c
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1 /*
2 * Driver for Intel I82092AA PCI-PCMCIA bridge.
4 * (C) 2001 Red Hat, Inc.
6 * Author: Arjan Van De Ven <arjanv@redhat.com>
7 * Loosly based on i82365.c from the pcmcia-cs package
9 * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $
12 #include <linux/kernel.h>
13 #include <linux/config.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16 #include <linux/init.h>
17 #include <linux/workqueue.h>
18 #include <linux/interrupt.h>
19 #include <linux/device.h>
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/ss.h>
23 #include <pcmcia/cs.h>
25 #include <asm/system.h>
26 #include <asm/io.h>
28 #include "i82092aa.h"
29 #include "i82365.h"
31 MODULE_LICENSE("GPL");
33 /* PCI core routines */
34 static struct pci_device_id i82092aa_pci_ids[] = {
36 .vendor = PCI_VENDOR_ID_INTEL,
37 .device = PCI_DEVICE_ID_INTEL_82092AA_0,
38 .subvendor = PCI_ANY_ID,
39 .subdevice = PCI_ANY_ID,
41 {}
43 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
45 static int i82092aa_socket_suspend (struct pci_dev *dev, u32 state)
47 return pcmcia_socket_dev_suspend(&dev->dev, state);
50 static int i82092aa_socket_resume (struct pci_dev *dev)
52 return pcmcia_socket_dev_resume(&dev->dev);
55 static struct pci_driver i82092aa_pci_drv = {
56 .name = "i82092aa",
57 .id_table = i82092aa_pci_ids,
58 .probe = i82092aa_pci_probe,
59 .remove = __devexit_p(i82092aa_pci_remove),
60 .suspend = i82092aa_socket_suspend,
61 .resume = i82092aa_socket_resume,
65 /* the pccard structure and its functions */
66 static struct pccard_operations i82092aa_operations = {
67 .init = i82092aa_init,
68 .suspend = i82092aa_suspend,
69 .get_status = i82092aa_get_status,
70 .get_socket = i82092aa_get_socket,
71 .set_socket = i82092aa_set_socket,
72 .set_io_map = i82092aa_set_io_map,
73 .set_mem_map = i82092aa_set_mem_map,
76 /* The card can do upto 4 sockets, allocate a structure for each of them */
78 struct socket_info {
79 int number;
80 int card_state; /* 0 = no socket,
81 1 = empty socket,
82 2 = card but not initialized,
83 3 = operational card */
84 int io_base; /* base io address of the socket */
86 struct pcmcia_socket socket;
87 struct pci_dev *dev; /* The PCI device for the socket */
90 #define MAX_SOCKETS 4
91 static struct socket_info sockets[MAX_SOCKETS];
92 static int socket_count; /* shortcut */
95 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
97 unsigned char configbyte;
98 int i, ret;
100 enter("i82092aa_pci_probe");
102 if ((ret = pci_enable_device(dev)))
103 return ret;
105 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */
106 switch(configbyte&6) {
107 case 0:
108 socket_count = 2;
109 break;
110 case 2:
111 socket_count = 1;
112 break;
113 case 4:
114 case 6:
115 socket_count = 4;
116 break;
118 default:
119 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
120 ret = -EIO;
121 goto err_out_disable;
123 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
125 if (request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
126 ret = -EBUSY;
127 goto err_out_disable;
130 for (i = 0;i<socket_count;i++) {
131 sockets[i].card_state = 1; /* 1 = present but empty */
132 sockets[i].io_base = pci_resource_start(dev, 0);
133 sockets[i].socket.features |= SS_CAP_PCCARD;
134 sockets[i].socket.map_size = 0x1000;
135 sockets[i].socket.irq_mask = 0;
136 sockets[i].socket.pci_irq = dev->irq;
137 sockets[i].socket.owner = THIS_MODULE;
139 sockets[i].number = i;
141 if (card_present(i)) {
142 sockets[i].card_state = 3;
143 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
144 } else {
145 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
149 /* Now, specifiy that all interrupts are to be done as PCI interrupts */
150 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
151 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
153 /* Register the interrupt handler */
154 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
155 if ((ret = request_irq(dev->irq, i82092aa_interrupt, SA_SHIRQ, "i82092aa", i82092aa_interrupt))) {
156 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
157 goto err_out_free_res;
160 pci_set_drvdata(dev, &sockets[i].socket);
162 for (i = 0; i<socket_count; i++) {
163 sockets[i].socket.dev.dev = &dev->dev;
164 sockets[i].socket.ops = &i82092aa_operations;
165 ret = pcmcia_register_socket(&sockets[i].socket);
166 if (ret) {
167 goto err_out_free_sockets;
171 leave("i82092aa_pci_probe");
172 return 0;
174 err_out_free_sockets:
175 if (i) {
176 for (i--;i>=0;i--) {
177 pcmcia_unregister_socket(&sockets[i].socket);
180 free_irq(dev->irq, i82092aa_interrupt);
181 err_out_free_res:
182 release_region(pci_resource_start(dev, 0), 2);
183 err_out_disable:
184 pci_disable_device(dev);
185 return ret;
188 static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
190 struct pcmcia_socket *socket = pci_get_drvdata(dev);
192 enter("i82092aa_pci_remove");
194 free_irq(dev->irq, i82092aa_interrupt);
196 if (socket)
197 pcmcia_unregister_socket(socket);
199 leave("i82092aa_pci_remove");
202 static spinlock_t port_lock = SPIN_LOCK_UNLOCKED;
204 /* basic value read/write functions */
206 static unsigned char indirect_read(int socket, unsigned short reg)
208 unsigned short int port;
209 unsigned char val;
210 unsigned long flags;
211 spin_lock_irqsave(&port_lock,flags);
212 reg += socket * 0x40;
213 port = sockets[socket].io_base;
214 outb(reg,port);
215 val = inb(port+1);
216 spin_unlock_irqrestore(&port_lock,flags);
217 return val;
220 #if 0
221 static unsigned short indirect_read16(int socket, unsigned short reg)
223 unsigned short int port;
224 unsigned short tmp;
225 unsigned long flags;
226 spin_lock_irqsave(&port_lock,flags);
227 reg = reg + socket * 0x40;
228 port = sockets[socket].io_base;
229 outb(reg,port);
230 tmp = inb(port+1);
231 reg++;
232 outb(reg,port);
233 tmp = tmp | (inb(port+1)<<8);
234 spin_unlock_irqrestore(&port_lock,flags);
235 return tmp;
237 #endif
239 static void indirect_write(int socket, unsigned short reg, unsigned char value)
241 unsigned short int port;
242 unsigned long flags;
243 spin_lock_irqsave(&port_lock,flags);
244 reg = reg + socket * 0x40;
245 port = sockets[socket].io_base;
246 outb(reg,port);
247 outb(value,port+1);
248 spin_unlock_irqrestore(&port_lock,flags);
251 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
253 unsigned short int port;
254 unsigned char val;
255 unsigned long flags;
256 spin_lock_irqsave(&port_lock,flags);
257 reg = reg + socket * 0x40;
258 port = sockets[socket].io_base;
259 outb(reg,port);
260 val = inb(port+1);
261 val |= mask;
262 outb(reg,port);
263 outb(val,port+1);
264 spin_unlock_irqrestore(&port_lock,flags);
268 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
270 unsigned short int port;
271 unsigned char val;
272 unsigned long flags;
273 spin_lock_irqsave(&port_lock,flags);
274 reg = reg + socket * 0x40;
275 port = sockets[socket].io_base;
276 outb(reg,port);
277 val = inb(port+1);
278 val &= ~mask;
279 outb(reg,port);
280 outb(val,port+1);
281 spin_unlock_irqrestore(&port_lock,flags);
284 static void indirect_write16(int socket, unsigned short reg, unsigned short value)
286 unsigned short int port;
287 unsigned char val;
288 unsigned long flags;
289 spin_lock_irqsave(&port_lock,flags);
290 reg = reg + socket * 0x40;
291 port = sockets[socket].io_base;
293 outb(reg,port);
294 val = value & 255;
295 outb(val,port+1);
297 reg++;
299 outb(reg,port);
300 val = value>>8;
301 outb(val,port+1);
302 spin_unlock_irqrestore(&port_lock,flags);
305 /* simple helper functions */
306 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */
307 static int cycle_time = 120;
309 static int to_cycles(int ns)
311 if (cycle_time!=0)
312 return ns/cycle_time;
313 else
314 return 0;
318 /* Interrupt handler functionality */
320 static irqreturn_t i82092aa_interrupt(int irq, void *dev, struct pt_regs *regs)
322 int i;
323 int loopcount = 0;
324 int handled = 0;
326 unsigned int events, active=0;
328 /* enter("i82092aa_interrupt");*/
330 while (1) {
331 loopcount++;
332 if (loopcount>20) {
333 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
334 break;
337 active = 0;
339 for (i=0;i<socket_count;i++) {
340 int csc;
341 if (sockets[i].card_state==0) /* Inactive socket, should not happen */
342 continue;
344 csc = indirect_read(i,I365_CSC); /* card status change register */
346 if (csc==0) /* no events on this socket */
347 continue;
348 handled = 1;
349 events = 0;
351 if (csc & I365_CSC_DETECT) {
352 events |= SS_DETECT;
353 printk("Card detected in socket %i!\n",i);
356 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) {
357 /* For IO/CARDS, bit 0 means "read the card" */
358 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
359 } else {
360 /* Check for battery/ready events */
361 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
362 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
363 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
366 if (events) {
367 pcmcia_parse_events(&sockets[i].socket, events);
369 active |= events;
372 if (active==0) /* no more events to handle */
373 break;
376 return IRQ_RETVAL(handled);
377 /* leave("i82092aa_interrupt");*/
382 /* socket functions */
384 static int card_present(int socketno)
386 unsigned int val;
387 enter("card_present");
389 if ((socketno<0) || (socketno >= MAX_SOCKETS))
390 return 0;
391 if (sockets[socketno].io_base == 0)
392 return 0;
395 val = indirect_read(socketno, 1); /* Interface status register */
396 if ((val&12)==12) {
397 leave("card_present 1");
398 return 1;
401 leave("card_present 0");
402 return 0;
405 static void set_bridge_state(int sock)
407 enter("set_bridge_state");
408 indirect_write(sock, I365_GBLCTL,0x00);
409 indirect_write(sock, I365_GENCTL,0x00);
411 indirect_setbit(sock, I365_INTCTL,0x08);
412 leave("set_bridge_state");
420 static int i82092aa_init(struct pcmcia_socket *sock)
422 int i;
423 struct resource res = { .start = 0, .end = 0x0fff };
424 pccard_io_map io = { 0, 0, 0, 0, 1 };
425 pccard_mem_map mem = { .res = &res, };
427 enter("i82092aa_init");
429 for (i = 0; i < 2; i++) {
430 io.map = i;
431 i82092aa_set_io_map(sock, &io);
433 for (i = 0; i < 5; i++) {
434 mem.map = i;
435 i82092aa_set_mem_map(sock, &mem);
438 leave("i82092aa_init");
439 return 0;
442 static int i82092aa_suspend(struct pcmcia_socket *sock)
444 int retval;
445 enter("i82092aa_suspend");
446 retval = i82092aa_set_socket(sock, &dead_socket);
447 leave("i82092aa_suspend");
448 return retval;
451 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)
453 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
454 unsigned int status;
456 enter("i82092aa_get_status");
458 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
459 *value = 0;
461 if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
462 *value |= SS_DETECT;
465 /* IO cards have a different meaning of bits 0,1 */
466 /* Also notice the inverse-logic on the bits */
467 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
468 /* IO card */
469 if (!(status & I365_CS_STSCHG))
470 *value |= SS_STSCHG;
471 } else { /* non I/O card */
472 if (!(status & I365_CS_BVD1))
473 *value |= SS_BATDEAD;
474 if (!(status & I365_CS_BVD2))
475 *value |= SS_BATWARN;
479 if (status & I365_CS_WRPROT)
480 (*value) |= SS_WRPROT; /* card is write protected */
482 if (status & I365_CS_READY)
483 (*value) |= SS_READY; /* card is not busy */
485 if (status & I365_CS_POWERON)
486 (*value) |= SS_POWERON; /* power is applied to the card */
489 leave("i82092aa_get_status");
490 return 0;
494 static int i82092aa_get_socket(struct pcmcia_socket *socket, socket_state_t *state)
496 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
497 unsigned char reg,vcc,vpp;
499 enter("i82092aa_get_socket");
500 state->flags = 0;
501 state->Vcc = 0;
502 state->Vpp = 0;
503 state->io_irq = 0;
504 state->csc_mask = 0;
506 /* First the power status of the socket */
507 reg = indirect_read(sock,I365_POWER); /* PCTRL - Power Control Register */
509 if (reg & I365_PWR_AUTO)
510 state->flags |= SS_PWR_AUTO; /* Automatic Power Switch */
512 if (reg & I365_PWR_OUT)
513 state->flags |= SS_OUTPUT_ENA; /* Output signals are enabled */
515 vcc = reg & I365_VCC_MASK; vpp = reg & I365_VPP1_MASK;
517 if (reg & I365_VCC_5V) { /* Can still be 3.3V, in this case the Vcc value will be overwritten later */
518 state->Vcc = 50;
520 if (vpp == I365_VPP1_5V)
521 state->Vpp = 50;
522 if (vpp == I365_VPP1_12V)
523 state->Vpp = 120;
527 if ((reg & I365_VCC_3V)==I365_VCC_3V)
528 state->Vcc = 33;
531 /* Now the IO card, RESET flags and IO interrupt */
533 reg = indirect_read(sock, I365_INTCTL); /* IGENC, Interrupt and General Control */
535 if ((reg & I365_PC_RESET)==0)
536 state->flags |= SS_RESET;
537 if (reg & I365_PC_IOCARD)
538 state->flags |= SS_IOCARD; /* This is an IO card */
540 /* Set the IRQ number */
541 if (sockets[sock].dev!=NULL)
542 state->io_irq = sockets[sock].dev->irq;
544 /* Card status change */
545 reg = indirect_read(sock, I365_CSCINT); /* CSCICR, Card Status Change Interrupt Configuration */
547 if (reg & I365_CSC_DETECT)
548 state->csc_mask |= SS_DETECT; /* Card detect is enabled */
550 if (state->flags & SS_IOCARD) {/* IO Cards behave different */
551 if (reg & I365_CSC_STSCHG)
552 state->csc_mask |= SS_STSCHG;
553 } else {
554 if (reg & I365_CSC_BVD1)
555 state->csc_mask |= SS_BATDEAD;
556 if (reg & I365_CSC_BVD2)
557 state->csc_mask |= SS_BATWARN;
558 if (reg & I365_CSC_READY)
559 state->csc_mask |= SS_READY;
562 leave("i82092aa_get_socket");
563 return 0;
566 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state)
568 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
569 unsigned char reg;
571 enter("i82092aa_set_socket");
573 /* First, set the global controller options */
575 set_bridge_state(sock);
577 /* Values for the IGENC register */
579 reg = 0;
580 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */
581 reg = reg | I365_PC_RESET;
582 if (state->flags & SS_IOCARD)
583 reg = reg | I365_PC_IOCARD;
585 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
587 /* Power registers */
589 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
591 if (state->flags & SS_PWR_AUTO) {
592 printk("Auto power\n");
593 reg |= I365_PWR_AUTO; /* automatic power mngmnt */
595 if (state->flags & SS_OUTPUT_ENA) {
596 printk("Power Enabled \n");
597 reg |= I365_PWR_OUT; /* enable power */
600 switch (state->Vcc) {
601 case 0:
602 break;
603 case 50:
604 printk("setting voltage to Vcc to 5V on socket %i\n",sock);
605 reg |= I365_VCC_5V;
606 break;
607 default:
608 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
609 leave("i82092aa_set_socket");
610 return -EINVAL;
614 switch (state->Vpp) {
615 case 0:
616 printk("not setting Vpp on socket %i\n",sock);
617 break;
618 case 50:
619 printk("setting Vpp to 5.0 for socket %i\n",sock);
620 reg |= I365_VPP1_5V | I365_VPP2_5V;
621 break;
622 case 120:
623 printk("setting Vpp to 12.0\n");
624 reg |= I365_VPP1_12V | I365_VPP2_12V;
625 break;
626 default:
627 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
628 leave("i82092aa_set_socket");
629 return -EINVAL;
632 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
633 indirect_write(sock,I365_POWER,reg);
635 /* Enable specific interrupt events */
637 reg = 0x00;
638 if (state->csc_mask & SS_DETECT) {
639 reg |= I365_CSC_DETECT;
641 if (state->flags & SS_IOCARD) {
642 if (state->csc_mask & SS_STSCHG)
643 reg |= I365_CSC_STSCHG;
644 } else {
645 if (state->csc_mask & SS_BATDEAD)
646 reg |= I365_CSC_BVD1;
647 if (state->csc_mask & SS_BATWARN)
648 reg |= I365_CSC_BVD2;
649 if (state->csc_mask & SS_READY)
650 reg |= I365_CSC_READY;
654 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
656 indirect_write(sock,I365_CSCINT,reg);
657 (void)indirect_read(sock,I365_CSC);
659 leave("i82092aa_set_socket");
660 return 0;
663 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io)
665 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
666 unsigned char map, ioctl;
668 enter("i82092aa_set_io_map");
670 map = io->map;
672 /* Check error conditions */
673 if (map > 1) {
674 leave("i82092aa_set_io_map with invalid map");
675 return -EINVAL;
677 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
678 leave("i82092aa_set_io_map with invalid io");
679 return -EINVAL;
682 /* Turn off the window before changing anything */
683 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
684 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
686 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */
688 /* write the new values */
689 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);
690 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);
692 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
694 if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
695 ioctl |= I365_IOCTL_16BIT(map);
697 indirect_write(sock,I365_IOCTL,ioctl);
699 /* Turn the window back on if needed */
700 if (io->flags & MAP_ACTIVE)
701 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
703 leave("i82092aa_set_io_map");
704 return 0;
707 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem)
709 struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
710 unsigned int sock = sock_info->number;
711 struct pci_bus_region region;
712 unsigned short base, i;
713 unsigned char map;
715 enter("i82092aa_set_mem_map");
717 pcibios_resource_to_bus(sock_info->dev, &region, mem->res);
719 map = mem->map;
720 if (map > 4) {
721 leave("i82092aa_set_mem_map: invalid map");
722 return -EINVAL;
726 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) ||
727 (mem->speed > 1000) ) {
728 leave("i82092aa_set_mem_map: invalid address / speed");
729 printk("invalid mem map for socket %i : %lx to %lx with a start of %x \n",sock,region.start, region.end, mem->card_start);
730 return -EINVAL;
733 /* Turn off the window before changing anything */
734 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
735 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
738 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */
740 /* write the start address */
741 base = I365_MEM(map);
742 i = (region.start >> 12) & 0x0fff;
743 if (mem->flags & MAP_16BIT)
744 i |= I365_MEM_16BIT;
745 if (mem->flags & MAP_0WS)
746 i |= I365_MEM_0WS;
747 indirect_write16(sock,base+I365_W_START,i);
749 /* write the stop address */
751 i= (region.end >> 12) & 0x0fff;
752 switch (to_cycles(mem->speed)) {
753 case 0:
754 break;
755 case 1:
756 i |= I365_MEM_WS0;
757 break;
758 case 2:
759 i |= I365_MEM_WS1;
760 break;
761 default:
762 i |= I365_MEM_WS1 | I365_MEM_WS0;
763 break;
766 indirect_write16(sock,base+I365_W_STOP,i);
768 /* card start */
770 i = ((mem->card_start - region.start) >> 12) & 0x3fff;
771 if (mem->flags & MAP_WRPROT)
772 i |= I365_MEM_WRPROT;
773 if (mem->flags & MAP_ATTRIB) {
774 /* printk("requesting attribute memory for socket %i\n",sock);*/
775 i |= I365_MEM_REG;
776 } else {
777 /* printk("requesting normal memory for socket %i\n",sock);*/
779 indirect_write16(sock,base+I365_W_OFF,i);
781 /* Enable the window if necessary */
782 if (mem->flags & MAP_ACTIVE)
783 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
785 leave("i82092aa_set_mem_map");
786 return 0;
789 static int i82092aa_module_init(void)
791 enter("i82092aa_module_init");
792 pci_register_driver(&i82092aa_pci_drv);
793 leave("i82092aa_module_init");
794 return 0;
797 static void i82092aa_module_exit(void)
799 enter("i82092aa_module_exit");
800 pci_unregister_driver(&i82092aa_pci_drv);
801 if (sockets[0].io_base>0)
802 release_region(sockets[0].io_base, 2);
803 leave("i82092aa_module_exit");
806 module_init(i82092aa_module_init);
807 module_exit(i82092aa_module_exit);