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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / pcmcia / yenta_socket.c
blob36bbf6bab924cf02b16be1f79c7e018e2210ac76
1 /*
2 * Regular cardbus driver ("yenta_socket")
3 *
4 * (C) Copyright 1999, 2000 Linus Torvalds
5 *
6 * Changelog:
7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8 * Dynamically adjust the size of the bridge resource
9 *
10 * May 2003: Dominik Brodowski <linux@brodo.de>
11 * Merge pci_socket.c and yenta.c into one file
12 */
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/sched.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20
21 #include <pcmcia/version.h>
22 #include <pcmcia/cs_types.h>
23 #include <pcmcia/ss.h>
24 #include <pcmcia/cs.h>
25
26 #include <asm/io.h>
27
28 #include "yenta_socket.h"
29 #include "i82365.h"
30
31
32 //#define VICTOR_IO // just for debug used, add by Victor Yu. 03-10-2006
33
34 #if 0
35 #define debug(x,args...) printk("%s: " x, __func__ , ##args)
36 #else
37 #define debug(x,args...)
38 #endif
39
40 /* Don't ask.. */
41 #define to_cycles(ns) ((ns)/120)
42 #define to_ns(cycles) ((cycles)*120)
43
44 static int yenta_probe_cb_irq(struct yenta_socket *socket);
45
46
47 /*
48 * Generate easy-to-use ways of reading a cardbus sockets
49 * regular memory space ("cb_xxx"), configuration space
50 * ("config_xxx") and compatibility space ("exca_xxxx")
51 */
52 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
53 {
54 #ifdef VICTOR_IO // add by Victor Yu. 03-10-2006
55 u32 val = *(volatile u32 *)(socket->base + reg);
56 #else
57 u32 val = readl(socket->base + reg);
58 #endif
59 debug("%p %p %04x %08x\n", socket, socket->base, reg, val);
60 return val;
61 }
62
63 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
64 {
65 debug("%p %p %04x %08x\n", socket, socket->base, reg, val);
66 #ifdef VICTOR_IO // add by Victor Yu. 03-10-2006
67 *(volatile u32 *)(socket->base + reg) = val;
68 #else
69 writel(val, socket->base + reg);
70 #endif
71 }
72
73 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
74 {
75 u8 val;
76 pci_read_config_byte(socket->dev, offset, &val);
77 debug("%p %04x %02x\n", socket, offset, val);
78 return val;
79 }
80
81 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
82 {
83 u16 val;
84 pci_read_config_word(socket->dev, offset, &val);
85 debug("%p %04x %04x\n", socket, offset, val);
86 return val;
87 }
88
89 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
90 {
91 u32 val;
92 pci_read_config_dword(socket->dev, offset, &val);
93 debug("%p %04x %08x\n", socket, offset, val);
94 return val;
95 }
96
97 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
98 {
99 debug("%p %04x %02x\n", socket, offset, val);
100 pci_write_config_byte(socket->dev, offset, val);
101 }
102
103 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
104 {
105 debug("%p %04x %04x\n", socket, offset, val);
106 pci_write_config_word(socket->dev, offset, val);
107 }
108
109 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
110 {
111 debug("%p %04x %08x\n", socket, offset, val);
112 pci_write_config_dword(socket->dev, offset, val);
113 }
114
115 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
116 {
117 #ifdef VICTOR_IO // add by Victor Yu. 03-10-2006
118 u8 val = *(volatile u8 *)(socket->base + 0x800 + reg);
119 #else
120 u8 val = readb(socket->base + 0x800 + reg);
121 #endif
122 debug("%p %p %04x %02x\n", socket, socket->base, reg, val);
123 return val;
124 }
125
126 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
127 {
128 u16 val;
129 #ifdef VICTOR_IO // add by Victor Yu. 03-10-2006
130 val = *(volatile u8 *)(socket->base+0x800+reg);
131 val |= (*(volatile u8 *)(socket->base+0x800+reg+1)) << 8;
132 #else
133 val = readb(socket->base + 0x800 + reg);
134 val |= readb(socket->base + 0x800 + reg + 1) << 8;
135 #endif
136 debug("%p %p %04x %04x\n", socket, socket->base, reg, val);
137 return val;
138 }
139
140 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
141 {
142 debug("%p %p %04x %02x\n", socket, socket->base, reg, val);
143 #ifdef VICTOR_IO // add by Victor Yu. 03-10-2006
144 *(volatile u8 *)(socket->base+0x800+reg) = val;
145 #else
146 writeb(val, socket->base + 0x800 + reg);
147 #endif
148 }
149
150 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
151 {
152 debug("%p %p %04x %04x\n", socket, socket->base, reg, val);
153 #ifdef VICTOR_IO // add by Victor Yu. 03-10-2006
154 *(volatile u8 *)(socket->base+0x800+reg) = val;
155 *(volatile u8 *)(socket->base+0x800+reg+1) = val >> 8;
156 #else
157 writeb(val, socket->base + 0x800 + reg);
158 writeb(val >> 8, socket->base + 0x800 + reg + 1);
159 #endif
160 }
161
162 /*
163 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
164 * on what kind of card is inserted..
165 */
166 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
167 {
168 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
169 unsigned int val;
170 u32 state = cb_readl(socket, CB_SOCKET_STATE);
171
172 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
173 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
174 val |= (state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD | CB_3VCARD
175 | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
176
177 if (state & CB_CBCARD) {
178 val |= SS_CARDBUS;
179 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
180 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
181 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
182 } else {
183 u8 status = exca_readb(socket, I365_STATUS);
184 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
185 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
186 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
187 } else {
188 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
189 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
190 }
191 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
192 val |= (status & I365_CS_READY) ? SS_READY : 0;
193 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
194 }
195
196 *value = val;
197 return 0;
198 }
199
200 static int yenta_Vcc_power(u32 control)
201 {
202 switch (control & CB_SC_VCC_MASK) {
203 case CB_SC_VCC_5V: return 50;
204 case CB_SC_VCC_3V: return 33;
205 default: return 0;
206 }
207 }
208
209 static int yenta_Vpp_power(u32 control)
210 {
211 switch (control & CB_SC_VPP_MASK) {
212 case CB_SC_VPP_12V: return 120;
213 case CB_SC_VPP_5V: return 50;
214 case CB_SC_VPP_3V: return 33;
215 default: return 0;
216 }
217 }
218
219 static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state)
220 {
221 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
222 u8 reg;
223 u32 control;
224
225 control = cb_readl(socket, CB_SOCKET_CONTROL);
226
227 state->Vcc = yenta_Vcc_power(control);
228 state->Vpp = yenta_Vpp_power(control);
229 state->io_irq = socket->io_irq;
230
231 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
232 u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
233 if (bridge & CB_BRIDGE_CRST)
234 state->flags |= SS_RESET;
235 return 0;
236 }
237
238 /* 16-bit card state.. */
239 reg = exca_readb(socket, I365_POWER);
240 state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
241 state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
242
243 reg = exca_readb(socket, I365_INTCTL);
244 state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
245 state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0;
246
247 reg = exca_readb(socket, I365_CSCINT);
248 state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
249 if (state->flags & SS_IOCARD) {
250 state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
251 } else {
252 state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
253 state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
254 state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
255 }
256
257 return 0;
258 }
259
260 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
261 {
262 u32 reg = 0; /* CB_SC_STPCLK? */
263 switch (state->Vcc) {
264 case 33: reg = CB_SC_VCC_3V; break;
265 case 50: reg = CB_SC_VCC_5V; break;
266 default: reg = 0; break;
267 }
268 switch (state->Vpp) {
269 case 33: reg |= CB_SC_VPP_3V; break;
270 case 50: reg |= CB_SC_VPP_5V; break;
271 case 120: reg |= CB_SC_VPP_12V; break;
272 }
273 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
274 cb_writel(socket, CB_SOCKET_CONTROL, reg);
275 }
276
277 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
278 {
279 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
280 u16 bridge;
281
282 yenta_set_power(socket, state);
283 socket->io_irq = state->io_irq;
284 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
285 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
286 u8 intr;
287 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
288
289 /* ISA interrupt control? */
290 intr = exca_readb(socket, I365_INTCTL);
291 intr = (intr & ~0xf);
292 if (!socket->cb_irq) {
293 intr |= state->io_irq;
294 bridge |= CB_BRIDGE_INTR;
295 }
296 exca_writeb(socket, I365_INTCTL, intr);
297 } else {
298 u8 reg;
299
300 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
301 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
302 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
303 if (state->io_irq != socket->cb_irq) {
304 reg |= state->io_irq;
305 bridge |= CB_BRIDGE_INTR;
306 }
307 exca_writeb(socket, I365_INTCTL, reg);
308
309 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
310 reg |= I365_PWR_NORESET;
311 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
312 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
313 if (exca_readb(socket, I365_POWER) != reg)
314 exca_writeb(socket, I365_POWER, reg);
315
316 /* CSC interrupt: no ISA irq for CSC */
317 reg = I365_CSC_DETECT;
318 if (state->flags & SS_IOCARD) {
319 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
320 } else {
321 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
322 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
323 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
324 }
325 exca_writeb(socket, I365_CSCINT, reg);
326 exca_readb(socket, I365_CSC);
327 if(sock->zoom_video)
328 sock->zoom_video(sock, state->flags & SS_ZVCARD);
329 }
330 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
331 /* Socket event mask: get card insert/remove events.. */
332 cb_writel(socket, CB_SOCKET_EVENT, -1);
333 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
334 return 0;
335 }
336
337 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
338 {
339 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
340 int map;
341 unsigned char ioctl, addr, enable;
342
343 map = io->map;
344
345 if (map > 1)
346 return -EINVAL;
347
348 enable = I365_ENA_IO(map);
349 addr = exca_readb(socket, I365_ADDRWIN);
350
351 /* Disable the window before changing it.. */
352 if (addr & enable) {
353 addr &= ~enable;
354 exca_writeb(socket, I365_ADDRWIN, addr);
355 }
356
357 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
358 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
359
360 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
361 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
362 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
363 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
364 exca_writeb(socket, I365_IOCTL, ioctl);
365
366 if (io->flags & MAP_ACTIVE)
367 exca_writeb(socket, I365_ADDRWIN, addr | enable);
368 return 0;
369 }
370
371 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
372 {
373 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
374 struct pci_bus_region region;
375 int map;
376 unsigned char addr, enable;
377 unsigned int start, stop, card_start;
378 unsigned short word;
379
380 pcibios_resource_to_bus(socket->dev, &region, mem->res);
381
382 map = mem->map;
383 start = region.start;
384 stop = region.end;
385 card_start = mem->card_start;
386
387 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
388 (card_start >> 26) || mem->speed > 1000)
389 return -EINVAL;
390
391 enable = I365_ENA_MEM(map);
392 addr = exca_readb(socket, I365_ADDRWIN);
393 if (addr & enable) {
394 addr &= ~enable;
395 exca_writeb(socket, I365_ADDRWIN, addr);
396 }
397
398 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
399
400 word = (start >> 12) & 0x0fff;
401 if (mem->flags & MAP_16BIT)
402 word |= I365_MEM_16BIT;
403 if (mem->flags & MAP_0WS)
404 word |= I365_MEM_0WS;
405 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
406
407 word = (stop >> 12) & 0x0fff;
408 switch (to_cycles(mem->speed)) {
409 case 0: break;
410 case 1: word |= I365_MEM_WS0; break;
411 case 2: word |= I365_MEM_WS1; break;
412 default: word |= I365_MEM_WS1 | I365_MEM_WS0; break;
413 }
414 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
415
416 word = ((card_start - start) >> 12) & 0x3fff;
417 if (mem->flags & MAP_WRPROT)
418 word |= I365_MEM_WRPROT;
419 if (mem->flags & MAP_ATTRIB)
420 word |= I365_MEM_REG;
421 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
422
423 if (mem->flags & MAP_ACTIVE)
424 exca_writeb(socket, I365_ADDRWIN, addr | enable);
425 return 0;
426 }
427
428
429 static unsigned int yenta_events(struct yenta_socket *socket)
430 {
431 u8 csc;
432 u32 cb_event;
433 unsigned int events;
434
435 /* Clear interrupt status for the event */
436 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
437 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
438
439 csc = exca_readb(socket, I365_CSC);
440
441 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
442 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
443 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
444 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
445 } else {
446 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
447 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
448 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
449 }
450 return events;
451 }
452
453
454 static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs)
455 {
456 unsigned int events;
457 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
458
459 events = yenta_events(socket);
460 if (events) {
461 pcmcia_parse_events(&socket->socket, events);
462 return IRQ_HANDLED;
463 }
464 return IRQ_NONE;
465 }
466
467 static void yenta_interrupt_wrapper(unsigned long data)
468 {
469 struct yenta_socket *socket = (struct yenta_socket *) data;
470
471 yenta_interrupt(0, (void *)socket, NULL);
472 socket->poll_timer.expires = jiffies + HZ;
473 add_timer(&socket->poll_timer);
474 }
475
476 static void yenta_clear_maps(struct yenta_socket *socket)
477 {
478 int i;
479 struct resource res = { .start = 0, .end = 0x0fff };
480 pccard_io_map io = { 0, 0, 0, 0, 1 };
481 pccard_mem_map mem = { .res = &res, };
482
483 yenta_set_socket(&socket->socket, &dead_socket);
484 for (i = 0; i < 2; i++) {
485 io.map = i;
486 yenta_set_io_map(&socket->socket, &io);
487 }
488 for (i = 0; i < 5; i++) {
489 mem.map = i;
490 yenta_set_mem_map(&socket->socket, &mem);
491 }
492 }
493
494 /* Called at resume and initialization events */
495 static int yenta_sock_init(struct pcmcia_socket *sock)
496 {
497 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
498 u32 state;
499 u16 bridge;
500
501 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~CB_BRIDGE_INTR;
502 if (!socket->cb_irq)
503 bridge |= CB_BRIDGE_INTR;
504 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
505
506 exca_writeb(socket, I365_GBLCTL, 0x00);
507 exca_writeb(socket, I365_GENCTL, 0x00);
508
509 /* Redo card voltage interrogation */
510 state = cb_readl(socket, CB_SOCKET_STATE);
511 if (!(state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD |
512 CB_3VCARD | CB_XVCARD | CB_YVCARD)))
513 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
514
515 yenta_clear_maps(socket);
516
517 if (socket->type && socket->type->sock_init)
518 socket->type->sock_init(socket);
519
520 /* Re-enable CSC interrupts */
521 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
522
523 return 0;
524 }
525
526 static int yenta_sock_suspend(struct pcmcia_socket *sock)
527 {
528 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
529
530 yenta_set_socket(sock, &dead_socket);
531
532 /* Disable CSC interrupts */
533 cb_writel(socket, CB_SOCKET_MASK, 0x0);
534
535 return 0;
536 }
537
538 #if 0 // Don't need to do this. Because the PCI has did it. Victor Yu. 01-11-2006
539 /*
540 * Use an adaptive allocation for the memory resource,
541 * sometimes the memory behind pci bridges is limited:
542 * 1/8 of the size of the io window of the parent.
543 * max 4 MB, min 16 kB.
544 */
545 #define BRIDGE_MEM_MAX 4*1024*1024
546 #define BRIDGE_MEM_MIN 16*1024
547
548 #define BRIDGE_IO_MAX 256
549 #define BRIDGE_IO_MIN 32
550
551 #ifndef PCIBIOS_MIN_CARDBUS_IO
552 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
553 #endif
554
555 static void yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type)
556 {
557 struct pci_bus *bus;
558 struct resource *root, *res;
559 u32 start, end;
560 u32 align, size, min;
561 unsigned offset;
562 unsigned mask;
563
564 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
565 mask = ~0xfff;
566 if (type & IORESOURCE_IO)
567 mask = ~3;
568
569 offset = 0x1c + 8*nr;
570 bus = socket->dev->subordinate;
571 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr;
572 res->name = bus->name;
573 res->flags = type;
574 res->start = 0;
575 res->end = 0;
576 root = pci_find_parent_resource(socket->dev, res);
577
578 if (!root)
579 return;
580
581 start = config_readl(socket, offset) & mask;
582 end = config_readl(socket, offset+4) | ~mask;
583 if (start && end > start) {
584 res->start = start;
585 res->end = end;
586 if (request_resource(root, res) == 0)
587 return;
588 printk(KERN_INFO "yenta %s: Preassigned resource %d busy, reconfiguring...\n",
589 pci_name(socket->dev), nr);
590 res->start = res->end = 0;
591 }
592
593 if (type & IORESOURCE_IO) {
594 align = 1024;
595 size = BRIDGE_IO_MAX;
596 min = BRIDGE_IO_MIN;
597 start = PCIBIOS_MIN_CARDBUS_IO;
598 end = ~0U;
599 } else {
600 unsigned long avail = root->end - root->start;
601 int i;
602 size = BRIDGE_MEM_MAX;
603 if (size > avail/8) {
604 size=(avail+1)/8;
605 /* round size down to next power of 2 */
606 i = 0;
607 while ((size /= 2) != 0)
608 i++;
609 size = 1 << i;
610 }
611 if (size < BRIDGE_MEM_MIN)
612 size = BRIDGE_MEM_MIN;
613 min = BRIDGE_MEM_MIN;
614 align = size;
615 start = PCIBIOS_MIN_MEM;
616 end = ~0U;
617 }
618
619 do {
620 if (allocate_resource(root, res, size, start, end, align, NULL, NULL)==0) {
621 config_writel(socket, offset, res->start);
622 config_writel(socket, offset+4, res->end);
623 return;
624 }
625 size = size/2;
626 align = size;
627 } while (size >= min);
628 printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n",
629 pci_name(socket->dev), type);
630 res->start = res->end = 0;
631 }
632
633 /*
634 * Allocate the bridge mappings for the device..
635 */
636 static void yenta_allocate_resources(struct yenta_socket *socket)
637 {
638 yenta_allocate_res(socket, 0, IORESOURCE_MEM|IORESOURCE_PREFETCH);
639 yenta_allocate_res(socket, 1, IORESOURCE_MEM);
640 yenta_allocate_res(socket, 2, IORESOURCE_IO);
641 yenta_allocate_res(socket, 3, IORESOURCE_IO); /* PCI isn't clever enough to use this one yet */
642 }
643
644
645 /*
646 * Free the bridge mappings for the device..
647 */
648 static void yenta_free_resources(struct yenta_socket *socket)
649 {
650 int i;
651 for (i=0;i<4;i++) {
652 struct resource *res;
653 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
654 if (res->start != 0 && res->end != 0)
655 release_resource(res);
656 res->start = res->end = 0;
657 }
658 }
659 #endif
660
661
662 /*
663 * Close it down - release our resources and go home..
664 */
665 static void yenta_close(struct pci_dev *dev)
666 {
667 struct yenta_socket *sock = pci_get_drvdata(dev);
668
669 /* we don't want a dying socket registered */
670 pcmcia_unregister_socket(&sock->socket);
671
672 /* Disable all events so we don't die in an IRQ storm */
673 cb_writel(sock, CB_SOCKET_MASK, 0x0);
674 exca_writeb(sock, I365_CSCINT, 0);
675
676 if (sock->cb_irq)
677 free_irq(sock->cb_irq, sock);
678 else
679 del_timer_sync(&sock->poll_timer);
680
681 if (sock->base)
682 iounmap(sock->base);
683 #if 0 // Don't need to do this. Because the PCI has did it. Victor Yu. 01-11-2006
684 yenta_free_resources(sock);
685 #endif
686
687 pci_release_regions(dev);
688 pci_set_drvdata(dev, NULL);
689 }
690
691
692 static struct pccard_operations yenta_socket_operations = {
693 .init = yenta_sock_init,
694 .suspend = yenta_sock_suspend,
695 .get_status = yenta_get_status,
696 .get_socket = yenta_get_socket,
697 .set_socket = yenta_set_socket,
698 .set_io_map = yenta_set_io_map,
699 .set_mem_map = yenta_set_mem_map,
700 };
701
702
703 #include "ti113x.h"
704 #include "ricoh.h"
705 #include "topic.h"
706 #include "o2micro.h"
707
708 enum {
709 CARDBUS_TYPE_DEFAULT = -1,
710 CARDBUS_TYPE_TI,
711 CARDBUS_TYPE_TI113X,
712 CARDBUS_TYPE_TI12XX,
713 CARDBUS_TYPE_TI1250,
714 CARDBUS_TYPE_RICOH,
715 CARDBUS_TYPE_TOPIC97,
716 CARDBUS_TYPE_O2MICRO,
717 };
718
719 /*
720 * Different cardbus controllers have slightly different
721 * initialization sequences etc details. List them here..
722 */
723 struct cardbus_type cardbus_type[] = {
724 [CARDBUS_TYPE_TI] = {
725 .override = ti_override,
726 .save_state = ti_save_state,
727 .restore_state = ti_restore_state,
728 .sock_init = ti_init,
729 },
730 [CARDBUS_TYPE_TI113X] = {
731 .override = ti113x_override,
732 .save_state = ti_save_state,
733 .restore_state = ti_restore_state,
734 .sock_init = ti_init,
735 },
736 [CARDBUS_TYPE_TI12XX] = {
737 .override = ti12xx_override,
738 .save_state = ti_save_state,
739 .restore_state = ti_restore_state,
740 .sock_init = ti_init,
741 },
742 [CARDBUS_TYPE_TI1250] = {
743 .override = ti1250_override,
744 .save_state = ti_save_state,
745 .restore_state = ti_restore_state,
746 .sock_init = ti_init,
747 },
748 [CARDBUS_TYPE_RICOH] = {
749 .override = ricoh_override,
750 .save_state = ricoh_save_state,
751 .restore_state = ricoh_restore_state,
752 },
753 [CARDBUS_TYPE_TOPIC97] = {
754 .override = topic97_override,
755 },
756 [CARDBUS_TYPE_O2MICRO] = {
757 .override = o2micro_override,
758 .restore_state = o2micro_restore_state,
759 },
760 };
761
762
763 /*
764 * Only probe "regular" interrupts, don't
765 * touch dangerous spots like the mouse irq,
766 * because there are mice that apparently
767 * get really confused if they get fondled
768 * too intimately.
769 *
770 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
771 */
772 static u32 isa_interrupts = 0x0ef8;
773
774 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
775 {
776 int i;
777 unsigned long val;
778 u16 bridge_ctrl;
779 u32 mask;
780
781 /* Set up ISA irq routing to probe the ISA irqs.. */
782 bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
783 if (!(bridge_ctrl & CB_BRIDGE_INTR)) {
784 bridge_ctrl |= CB_BRIDGE_INTR;
785 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
786 }
787
788 /*
789 * Probe for usable interrupts using the force
790 * register to generate bogus card status events.
791 */
792 cb_writel(socket, CB_SOCKET_EVENT, -1);
793 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
794 exca_writeb(socket, I365_CSCINT, 0);
795 val = probe_irq_on() & isa_irq_mask;
796 for (i = 1; i < 16; i++) {
797 if (!((val >> i) & 1))
798 continue;
799 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
800 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
801 udelay(100);
802 cb_writel(socket, CB_SOCKET_EVENT, -1);
803 }
804 cb_writel(socket, CB_SOCKET_MASK, 0);
805 exca_writeb(socket, I365_CSCINT, 0);
806
807 mask = probe_irq_mask(val) & 0xffff;
808
809 bridge_ctrl &= ~CB_BRIDGE_INTR;
810 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
811
812 return mask;
813 }
814
815
816 /* interrupt handler, only used during probing */
817 static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs)
818 {
819 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
820 u8 csc;
821 u32 cb_event;
822
823 /* Clear interrupt status for the event */
824 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
825 cb_writel(socket, CB_SOCKET_EVENT, -1);
826 csc = exca_readb(socket, I365_CSC);
827
828 if (cb_event || csc) {
829 socket->probe_status = 1;
830 return IRQ_HANDLED;
831 }
832
833 return IRQ_NONE;
834 }
835
836 /* probes the PCI interrupt, use only on override functions */
837 static int yenta_probe_cb_irq(struct yenta_socket *socket)
838 {
839 u16 bridge_ctrl;
840
841 if (!socket->cb_irq)
842 return -1;
843
844 socket->probe_status = 0;
845
846 /* disable ISA interrupts */
847 bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
848 bridge_ctrl &= ~CB_BRIDGE_INTR;
849 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
850
851 if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) {
852 printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n");
853 return -1;
854 }
855
856 /* generate interrupt, wait */
857 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG);
858 cb_writel(socket, CB_SOCKET_EVENT, -1);
859 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
860 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
861
862 set_current_state(TASK_UNINTERRUPTIBLE);
863 schedule_timeout(HZ/10);
864
865 /* disable interrupts */
866 cb_writel(socket, CB_SOCKET_MASK, 0);
867 exca_writeb(socket, I365_CSCINT, 0);
868 cb_writel(socket, CB_SOCKET_EVENT, -1);
869 exca_readb(socket, I365_CSC);
870
871 free_irq(socket->cb_irq, socket);
872
873 return (int) socket->probe_status;
874 }
875
876
877
878 /*
879 * Set static data that doesn't need re-initializing..
880 */
881 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
882 {
883 socket->socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD | SS_CAP_CARDBUS;
884 socket->socket.map_size = 0x1000;
885 socket->socket.pci_irq = socket->cb_irq;
886 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
887 socket->socket.cb_dev = socket->dev;
888
889 printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n",
890 socket->socket.irq_mask, socket->cb_irq);
891 }
892
893 /*
894 * Initialize the standard cardbus registers
895 */
896 static void yenta_config_init(struct yenta_socket *socket)
897 {
898 u16 bridge;
899 struct pci_dev *dev = socket->dev;
900
901 pci_set_power_state(socket->dev, 0);
902
903 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
904 #ifdef CONFIG_ARCH_MOXACPU // add by Victor Yu. 01-10-2006
905 if ( dev->resource[0].flags & IORESOURCE_IO )
906 config_writel(socket, PCI_BASE_ADDRESS_0, PHY_ADDRESS(dev->resource[0].start));
907 else
908 config_writel(socket, PCI_BASE_ADDRESS_0, MEM_PHY_ADDRESS(dev->resource[0].start));
909 #else
910 config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start);
911 #endif
912 config_writew(socket, PCI_COMMAND,
913 PCI_COMMAND_IO |
914 PCI_COMMAND_MEMORY |
915 PCI_COMMAND_MASTER |
916 PCI_COMMAND_WAIT);
917
918 /* MAGIC NUMBERS! Fixme */
919 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
920 config_writeb(socket, PCI_LATENCY_TIMER, 0xa8);
921 #if 0 // mask by Victor Yu. 01-09-2006
922 config_writel(socket, PCI_PRIMARY_BUS,
923 (176 << 24) | /* sec. latency timer */
924 (dev->subordinate->subordinate << 16) | /* subordinate bus */
925 (dev->subordinate->secondary << 8) | /* secondary bus */
926 dev->subordinate->primary); /* primary bus */
927 #else // add by Victor Yu. 01-09-2006
928 config_writeb(socket, PCI_PRIMARY_BUS, dev->subordinate->primary & 0xff);
929 config_writeb(socket, PCI_PRIMARY_BUS+1, dev->subordinate->secondary & 0xff);
930 config_writeb(socket, PCI_PRIMARY_BUS+2, dev->subordinate->subordinate & 0xff);
931 config_writeb(socket, PCI_PRIMARY_BUS+3, 0xb0);
932 #endif
933
934 /*
935 * Set up the bridging state:
936 * - enable write posting.
937 * - memory window 0 prefetchable, window 1 non-prefetchable
938 * - PCI interrupts enabled if a PCI interrupt exists..
939 */
940 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
941 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_INTR | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
942 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN | CB_BRIDGE_INTR;
943 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
944
945 #ifdef CONFIG_ARCH_MOXACPU // add by Victor Yu. 03-09-2006, because the hardware design must on
946 {
947 u32 _reg;
948 _reg = config_readl(socket, 0x80);
949 _reg |= 0x08000000;
950 config_writel(socket, 0x80, _reg);
951 }
952 #endif
953 }
954
955 /*
956 * Initialize a cardbus controller. Make sure we have a usable
957 * interrupt, and that we can map the cardbus area. Fill in the
958 * socket information structure..
959 */
960 //#define VICTOR_JUST_ONE_SLOT 1
961 #ifdef VICTOR_JUST_ONE_SLOT
962 static int cardbuscnt=0;
963 #endif
964 static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id)
965 {
966 struct yenta_socket *socket;
967 int ret;
968
969 #ifdef VICTOR_JUST_ONE_SLOT
970 if ( cardbuscnt )
971 return -ENODEV;
972 #endif
973 socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL);
974 if (!socket)
975 return -ENOMEM;
976 memset(socket, 0, sizeof(*socket));
977
978 /* prepare pcmcia_socket */
979 socket->socket.ops = &yenta_socket_operations;
980 socket->socket.dev.dev = &dev->dev;
981 socket->socket.driver_data = socket;
982 socket->socket.owner = THIS_MODULE;
983
984 /* prepare struct yenta_socket */
985 socket->dev = dev;
986 pci_set_drvdata(dev, socket);
987
988 /*
989 * Do some basic sanity checking..
990 */
991 if (pci_enable_device(dev)) {
992 ret = -EBUSY;
993 goto free;
994 }
995
996 ret = pci_request_regions(dev, "yenta_socket");
997 if (ret)
998 goto disable;
999
1000 if (!pci_resource_start(dev, 0)) {
1001 printk(KERN_ERR "No cardbus resource!\n");
1002 ret = -ENODEV;
1003 goto release;
1004 }
1005
1006 /*
1007 * Ok, start setup.. Map the cardbus registers,
1008 * and request the IRQ.
1009 */
1010 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1011 if (!socket->base) {
1012 ret = -ENOMEM;
1013 goto release;
1014 }
1015
1016 /*
1017 * report the subsystem vendor and device for help debugging
1018 * the irq stuff...
1019 */
1020 printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n",
1021 dev->slot_name, dev->subsystem_vendor, dev->subsystem_device);
1022
1023 yenta_config_init(socket);
1024
1025 /* Disable all events */
1026 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1027
1028 /* Set up the bridge regions.. */
1029 #if 0 // Don't need to do this. Because the PCI has did it. Victor Yu. 01-11-2006
1030 yenta_allocate_resources(socket);
1031 #endif
1032
1033 socket->cb_irq = dev->irq;
1034
1035 /* Do we have special options for the device? */
1036 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1037 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1038 socket->type = &cardbus_type[id->driver_data];
1039
1040 ret = socket->type->override(socket);
1041 if (ret < 0)
1042 goto unmap;
1043 }
1044
1045 /* We must finish initialization here */
1046
1047 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) {
1048 /* No IRQ or request_irq failed. Poll */
1049 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1050 init_timer(&socket->poll_timer);
1051 socket->poll_timer.function = yenta_interrupt_wrapper;
1052 socket->poll_timer.data = (unsigned long)socket;
1053 socket->poll_timer.expires = jiffies + HZ;
1054 add_timer(&socket->poll_timer);
1055 }
1056
1057 /* Figure out what the dang thing can do for the PCMCIA layer... */
1058 yenta_get_socket_capabilities(socket, isa_interrupts);
1059 printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
1060
1061 /* Register it with the pcmcia layer.. */
1062 ret = pcmcia_register_socket(&socket->socket);
1063 if (ret == 0)
1064 goto out;
1065
1066 unmap:
1067 iounmap(socket->base);
1068 release:
1069 pci_release_regions(dev);
1070 disable:
1071 pci_disable_device(dev);
1072 free:
1073 kfree(socket);
1074 out:
1075 #ifdef VICTOR_JUST_ONE_SLOT
1076 cardbuscnt++;
1077 #endif
1078 return ret;
1079 }
1080
1081
1082 static int yenta_dev_suspend (struct pci_dev *dev, u32 state)
1083 {
1084 struct yenta_socket *socket = pci_get_drvdata(dev);
1085 int ret;
1086
1087 printk("Cardbus is suspended !\n");
1088 ret = pcmcia_socket_dev_suspend(&dev->dev, state);
1089
1090 if (socket) {
1091 if (socket->type && socket->type->save_state)
1092 socket->type->save_state(socket);
1093
1094 /* FIXME: pci_save_state needs to have a better interface */
1095 pci_save_state(dev, socket->saved_state);
1096 pci_read_config_dword(dev, 16*4, &socket->saved_state[16]);
1097 pci_read_config_dword(dev, 17*4, &socket->saved_state[17]);
1098 pci_set_power_state(dev, 3);
1099 }
1100
1101 return ret;
1102 }
1103
1104
1105 static int yenta_dev_resume (struct pci_dev *dev)
1106 {
1107 struct yenta_socket *socket = pci_get_drvdata(dev);
1108
1109 printk("Cardbus is resumed !\n");
1110 if (socket) {
1111 pci_set_power_state(dev, 0);
1112 /* FIXME: pci_restore_state needs to have a better interface */
1113 pci_restore_state(dev, socket->saved_state);
1114 pci_write_config_dword(dev, 16*4, socket->saved_state[16]);
1115 pci_write_config_dword(dev, 17*4, socket->saved_state[17]);
1116
1117 if (socket->type && socket->type->restore_state)
1118 socket->type->restore_state(socket);
1119 }
1120
1121 return pcmcia_socket_dev_resume(&dev->dev);
1122 }
1123
1124
1125 #define CB_ID(vend,dev,type) \
1126 { \
1127 .vendor = vend, \
1128 .device = dev, \
1129 .subvendor = PCI_ANY_ID, \
1130 .subdevice = PCI_ANY_ID, \
1131 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1132 .class_mask = ~0, \
1133 .driver_data = CARDBUS_TYPE_##type, \
1134 }
1135
1136 static struct pci_device_id yenta_table [] = {
1137 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1138
1139 /*
1140 * TBD: Check if these TI variants can use more
1141 * advanced overrides instead. (I can't get the
1142 * data sheets for these devices. --rmk)
1143 */
1144 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1145
1146 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1147 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1148
1149 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1150 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1151 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1152 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1153 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1154 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1155 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1156 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1157 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1158 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1159 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1160 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1161 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1162 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1163 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1164 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1165
1166 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1167 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1168
1169 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, TI12XX),
1170 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, TI12XX),
1171 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, TI1250),
1172 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, TI12XX),
1173
1174 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1175 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1176 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1177 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1178 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1179
1180 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1181 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1182
1183 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1184
1185 /* match any cardbus bridge */
1186 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1187 { /* all zeroes */ }
1188 };
1189 MODULE_DEVICE_TABLE(pci, yenta_table);
1190
1191
1192 static struct pci_driver yenta_cardbus_driver = {
1193 .name = "yenta_cardbus",
1194 .id_table = yenta_table,
1195 .probe = yenta_probe,
1196 .remove = __devexit_p(yenta_close),
1197 .suspend = yenta_dev_suspend,
1198 .resume = yenta_dev_resume,
1199 };
1200
1201
1202 static int __init yenta_socket_init(void)
1203 {
1204 return pci_register_driver (&yenta_cardbus_driver);
1205 }
1206
1207
1208 static void __exit yenta_socket_exit (void)
1209 {
1210 pci_unregister_driver (&yenta_cardbus_driver);
1211 }
1212
1213
1214 module_init(yenta_socket_init);
1215 module_exit(yenta_socket_exit);
1216
1217 MODULE_LICENSE("GPL");
MOXA 2.6.9 from sdlinux-moxaart.tgz