drivers/serial/uart00.c

   1 /*
   2  *  linux/drivers/serial/uart00.c
   3  *
   4  *  Driver for UART00 serial ports
   5  *
   6  *  Based on drivers/char/serial_amba.c, by ARM Limited &
   7  *                                          Deep Blue Solutions Ltd.
   8  *  Copyright 2001 Altera Corporation
   9  *
  10  *  Update for 2.6.4 by Dirk Behme <dirk.behme@de.bosch.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; either version 2 of the License, or
  15  * (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  *
  26  *  $Id: uart00.c,v 1.35 2002/07/28 10:03:28 rmk Exp $
  27  *
  28  */
  29 #include <linux/config.h>
  30 #include <linux/module.h>
  31 #include <linux/tty.h>
  32 #include <linux/ioport.h>
  33 #include <linux/init.h>
  34 #include <linux/serial.h>
  35 #include <linux/console.h>
  36 #include <linux/sysrq.h>
  37
  38 #include <asm/io.h>
  39 #include <asm/irq.h>
  40 #include <asm/sizes.h>
  41
  42 #if defined(CONFIG_SERIAL_UART00_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  43 #define SUPPORT_SYSRQ
  44 #endif
  45
  46 #include <linux/serial_core.h>
  47 #include <asm/arch/excalibur.h>
  48 #define UART00_TYPE (volatile unsigned int*)
  49 #include <asm/arch/uart00.h>
  50 #include <asm/arch/int_ctrl00.h>
  51
  52 #define UART_NR         2
  53
  54 #define SERIAL_UART00_NAME      "ttyUA"
  55 #define SERIAL_UART00_MAJOR     204
  56 #define SERIAL_UART00_MINOR     16      /* Temporary - will change in future */
  57 #define SERIAL_UART00_NR        UART_NR
  58 #define UART_PORT_SIZE 0x50
  59
  60 #define UART00_ISR_PASS_LIMIT   256
  61
  62 /*
  63  * Access macros for the UART00 UARTs
  64  */
  65 #define UART_GET_INT_STATUS(p)  inl(UART_ISR((p)->membase))
  66 #define UART_PUT_IES(p, c)      outl(c,UART_IES((p)->membase))
  67 #define UART_GET_IES(p)         inl(UART_IES((p)->membase))
  68 #define UART_PUT_IEC(p, c)      outl(c,UART_IEC((p)->membase))
  69 #define UART_GET_IEC(p)         inl(UART_IEC((p)->membase))
  70 #define UART_PUT_CHAR(p, c)     outl(c,UART_TD((p)->membase))
  71 #define UART_GET_CHAR(p)        inl(UART_RD((p)->membase))
  72 #define UART_GET_RSR(p)         inl(UART_RSR((p)->membase))
  73 #define UART_GET_RDS(p)         inl(UART_RDS((p)->membase))
  74 #define UART_GET_MSR(p)         inl(UART_MSR((p)->membase))
  75 #define UART_GET_MCR(p)         inl(UART_MCR((p)->membase))
  76 #define UART_PUT_MCR(p, c)      outl(c,UART_MCR((p)->membase))
  77 #define UART_GET_MC(p)          inl(UART_MC((p)->membase))
  78 #define UART_PUT_MC(p, c)       outl(c,UART_MC((p)->membase))
  79 #define UART_GET_TSR(p)         inl(UART_TSR((p)->membase))
  80 #define UART_GET_DIV_HI(p)      inl(UART_DIV_HI((p)->membase))
  81 #define UART_PUT_DIV_HI(p,c)    outl(c,UART_DIV_HI((p)->membase))
  82 #define UART_GET_DIV_LO(p)      inl(UART_DIV_LO((p)->membase))
  83 #define UART_PUT_DIV_LO(p,c)    outl(c,UART_DIV_LO((p)->membase))
  84 #define UART_RX_DATA(s)         ((s) & UART_RSR_RX_LEVEL_MSK)
  85 #define UART_TX_READY(s)        (((s) & UART_TSR_TX_LEVEL_MSK) < 15)
  86 //#define UART_TX_EMPTY(p)      ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0)
  87
  88 static void uart00_stop_tx(struct uart_port *port, unsigned int tty_stop)
  89 {
  90         UART_PUT_IEC(port, UART_IEC_TIE_MSK);
  91 }
  92
  93 static void uart00_stop_rx(struct uart_port *port)
  94 {
  95         UART_PUT_IEC(port, UART_IEC_RE_MSK);
  96 }
  97
  98 static void uart00_enable_ms(struct uart_port *port)
  99 {
 100         UART_PUT_IES(port, UART_IES_ME_MSK);
 101 }
 102
 103 static void
 104 uart00_rx_chars(struct uart_port *port, struct pt_regs *regs)
 105 {
 106         struct tty_struct *tty = port->info->tty;
 107         unsigned int status, ch, rds, flg, ignored = 0;
 108
 109         status = UART_GET_RSR(port);
 110         while (UART_RX_DATA(status)) {
 111                 /*
 112                  * We need to read rds before reading the
 113                  * character from the fifo
 114                  */
 115                 rds = UART_GET_RDS(port);
 116                 ch = UART_GET_CHAR(port);
 117                 port->icount.rx++;
 118
 119                 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 120                         goto ignore_char;
 121
 122                 flg = TTY_NORMAL;
 123
 124                 /*
 125                  * Note that the error handling code is
 126                  * out of the main execution path
 127                  */
 128                 if (rds & (UART_RDS_BI_MSK |UART_RDS_FE_MSK|
 129                            UART_RDS_PE_MSK |UART_RDS_PE_MSK))
 130                         goto handle_error;
 131                 if (uart_handle_sysrq_char(port, ch, regs))
 132                         goto ignore_char;
 133
 134         error_return:
 135                 *tty->flip.flag_buf_ptr++ = flg;
 136                 *tty->flip.char_buf_ptr++ = ch;
 137                 tty->flip.count++;
 138         ignore_char:
 139                 status = UART_GET_RSR(port);
 140         }
 141  out:
 142         tty_flip_buffer_push(tty);
 143         return;
 144
 145  handle_error:
 146         if (rds & UART_RDS_BI_MSK) {
 147                 status &= ~(UART_RDS_FE_MSK | UART_RDS_PE_MSK);
 148                 port->icount.brk++;
 149                 if (uart_handle_break(port))
 150                         goto ignore_char;
 151         } else if (rds & UART_RDS_PE_MSK)
 152                 port->icount.parity++;
 153         else if (rds & UART_RDS_FE_MSK)
 154                 port->icount.frame++;
 155         if (rds & UART_RDS_OE_MSK)
 156                 port->icount.overrun++;
 157
 158         if (rds & port->ignore_status_mask) {
 159                 if (++ignored > 100)
 160                         goto out;
 161                 goto ignore_char;
 162         }
 163         rds &= port->read_status_mask;
 164
 165         if (rds & UART_RDS_BI_MSK)
 166                 flg = TTY_BREAK;
 167         else if (rds & UART_RDS_PE_MSK)
 168                 flg = TTY_PARITY;
 169         else if (rds & UART_RDS_FE_MSK)
 170                 flg = TTY_FRAME;
 171
 172         if (rds & UART_RDS_OE_MSK) {
 173                 /*
 174                  * CHECK: does overrun affect the current character?
 175                  * ASSUMPTION: it does not.
 176                  */
 177                 *tty->flip.flag_buf_ptr++ = flg;
 178                 *tty->flip.char_buf_ptr++ = ch;
 179                 tty->flip.count++;
 180                 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
 181                         goto ignore_char;
 182                 ch = 0;
 183                 flg = TTY_OVERRUN;
 184         }
 185 #ifdef SUPPORT_SYSRQ
 186         port->sysrq = 0;
 187 #endif
 188         goto error_return;
 189 }
 190
 191 static void uart00_tx_chars(struct uart_port *port)
 192 {
 193         struct circ_buf *xmit = &port->info->xmit;
 194         int count;
 195
 196         if (port->x_char) {
 197                 while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
 198                         barrier();
 199                 UART_PUT_CHAR(port, port->x_char);
 200                 port->icount.tx++;
 201                 port->x_char = 0;
 202                 return;
 203         }
 204         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 205                 uart00_stop_tx(port, 0);
 206                 return;
 207         }
 208
 209         count = port->fifosize >> 1;
 210         do {
 211                 while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
 212                         barrier();
 213                 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
 214                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 215                 port->icount.tx++;
 216                 if (uart_circ_empty(xmit))
 217                         break;
 218         } while (--count > 0);
 219
 220         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 221                 uart_write_wakeup(port);
 222
 223         if (uart_circ_empty(xmit))
 224                 uart00_stop_tx(port, 0);
 225 }
 226
 227 static void uart00_start_tx(struct uart_port *port, unsigned int tty_start)
 228 {
 229         UART_PUT_IES(port, UART_IES_TIE_MSK);
 230         uart00_tx_chars(port);
 231 }
 232
 233 static void uart00_modem_status(struct uart_port *port)
 234 {
 235         unsigned int status;
 236
 237         status = UART_GET_MSR(port);
 238
 239         if (!(status & (UART_MSR_DCTS_MSK | UART_MSR_DDSR_MSK |
 240                         UART_MSR_TERI_MSK | UART_MSR_DDCD_MSK)))
 241                 return;
 242
 243         if (status & UART_MSR_DDCD_MSK)
 244                 uart_handle_dcd_change(port, status & UART_MSR_DCD_MSK);
 245
 246         if (status & UART_MSR_DDSR_MSK)
 247                 port->icount.dsr++;
 248
 249         if (status & UART_MSR_DCTS_MSK)
 250                 uart_handle_cts_change(port, status & UART_MSR_CTS_MSK);
 251
 252         wake_up_interruptible(&port->info->delta_msr_wait);
 253 }
 254
 255 static irqreturn_t uart00_int(int irq, void *dev_id, struct pt_regs *regs)
 256 {
 257         struct uart_port *port = dev_id;
 258         unsigned int status, pass_counter = 0;
 259
 260         status = UART_GET_INT_STATUS(port);
 261         do {
 262                 if (status & UART_ISR_RI_MSK)
 263                         uart00_rx_chars(port, regs);
 264                 if (status & UART_ISR_MI_MSK)
 265                         uart00_modem_status(port);
 266                 if (status & (UART_ISR_TI_MSK | UART_ISR_TII_MSK))
 267                         uart00_tx_chars(port);
 268                 if (pass_counter++ > UART00_ISR_PASS_LIMIT)
 269                         break;
 270
 271                 status = UART_GET_INT_STATUS(port);
 272         } while (status);
 273
 274         return IRQ_HANDLED;
 275 }
 276
 277 static unsigned int uart00_tx_empty(struct uart_port *port)
 278 {
 279         return UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK? 0 : TIOCSER_TEMT;
 280 }
 281
 282 static unsigned int uart00_get_mctrl(struct uart_port *port)
 283 {
 284         unsigned int result = 0;
 285         unsigned int status;
 286
 287         status = UART_GET_MSR(port);
 288         if (status & UART_MSR_DCD_MSK)
 289                 result |= TIOCM_CAR;
 290         if (status & UART_MSR_DSR_MSK)
 291                 result |= TIOCM_DSR;
 292         if (status & UART_MSR_CTS_MSK)
 293                 result |= TIOCM_CTS;
 294         if (status & UART_MSR_RI_MSK)
 295                 result |= TIOCM_RI;
 296
 297         return result;
 298 }
 299
 300 static void uart00_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
 301 {
 302 }
 303
 304 static void uart00_break_ctl(struct uart_port *port, int break_state)
 305 {
 306         unsigned long flags;
 307         unsigned int mcr;
 308
 309         spin_lock_irqsave(&port->lock, flags);
 310         mcr = UART_GET_MCR(port);
 311         if (break_state == -1)
 312                 mcr |= UART_MCR_BR_MSK;
 313         else
 314                 mcr &= ~UART_MCR_BR_MSK;
 315         UART_PUT_MCR(port, mcr);
 316         spin_unlock_irqrestore(&port->lock, flags);
 317 }
 318
 319 static void
 320 uart00_set_termios(struct uart_port *port, struct termios *termios,
 321                    struct termios *old)
 322 {
 323         unsigned int uart_mc, old_ies, baud, quot;
 324         unsigned long flags;
 325
 326         /*
 327          * We don't support CREAD (yet)
 328          */
 329         termios->c_cflag |= CREAD;
 330
 331         /*
 332          * Ask the core to calculate the divisor for us.
 333          */
 334         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 335         quot = uart_get_divisor(port, baud);
 336
 337         /* byte size and parity */
 338         switch (termios->c_cflag & CSIZE) {
 339         case CS5:
 340                 uart_mc = UART_MC_CLS_CHARLEN_5;
 341                 break;
 342         case CS6:
 343                 uart_mc = UART_MC_CLS_CHARLEN_6;
 344                 break;
 345         case CS7:
 346                 uart_mc = UART_MC_CLS_CHARLEN_7;
 347                 break;
 348         default: // CS8
 349                 uart_mc = UART_MC_CLS_CHARLEN_8;
 350                 break;
 351         }
 352         if (termios->c_cflag & CSTOPB)
 353                 uart_mc|= UART_MC_ST_TWO;
 354         if (termios->c_cflag & PARENB) {
 355                 uart_mc |= UART_MC_PE_MSK;
 356                 if (!(termios->c_cflag & PARODD))
 357                         uart_mc |= UART_MC_EP_MSK;
 358         }
 359
 360         spin_lock_irqsave(&port->lock, flags);
 361
 362         /*
 363          * Update the per-port timeout.
 364          */
 365         uart_update_timeout(port, termios->c_cflag, baud);
 366
 367         port->read_status_mask = UART_RDS_OE_MSK;
 368         if (termios->c_iflag & INPCK)
 369                 port->read_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;
 370         if (termios->c_iflag & (BRKINT | PARMRK))
 371                 port->read_status_mask |= UART_RDS_BI_MSK;
 372
 373         /*
 374          * Characters to ignore
 375          */
 376         port->ignore_status_mask = 0;
 377         if (termios->c_iflag & IGNPAR)
 378                 port->ignore_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;
 379         if (termios->c_iflag & IGNBRK) {
 380                 port->ignore_status_mask |= UART_RDS_BI_MSK;
 381                 /*
 382                  * If we're ignoring parity and break indicators,
 383                  * ignore overruns to (for real raw support).
 384                  */
 385                 if (termios->c_iflag & IGNPAR)
 386                         port->ignore_status_mask |= UART_RDS_OE_MSK;
 387         }
 388
 389         /* first, disable everything */
 390         old_ies = UART_GET_IES(port);
 391
 392         if (UART_ENABLE_MS(port, termios->c_cflag))
 393                 old_ies |= UART_IES_ME_MSK;
 394
 395         /* Set baud rate */
 396         UART_PUT_DIV_LO(port, (quot & 0xff));
 397         UART_PUT_DIV_HI(port, ((quot & 0xf00) >> 8));
 398
 399         UART_PUT_MC(port, uart_mc);
 400         UART_PUT_IES(port, old_ies);
 401
 402         spin_unlock_irqrestore(&port->lock, flags);
 403 }
 404
 405 static int uart00_startup(struct uart_port *port)
 406 {
 407         int result;
 408
 409         /*
 410          * Allocate the IRQ
 411          */
 412         result = request_irq(port->irq, uart00_int, 0, "uart00", port);
 413         if (result) {
 414                 printk(KERN_ERR "Request of irq %d failed\n", port->irq);
 415                 return result;
 416         }
 417
 418         /*
 419          * Finally, enable interrupts. Use the TII interrupt to minimise
 420          * the number of interrupts generated. If higher performance is
 421          * needed, consider using the TI interrupt with a suitable FIFO
 422          * threshold
 423          */
 424         UART_PUT_IES(port, UART_IES_RE_MSK | UART_IES_TIE_MSK);
 425
 426         return 0;
 427 }
 428
 429 static void uart00_shutdown(struct uart_port *port)
 430 {
 431         /*
 432          * disable all interrupts, disable the port
 433          */
 434         UART_PUT_IEC(port, 0xff);
 435
 436         /* disable break condition and fifos */
 437         UART_PUT_MCR(port, UART_GET_MCR(port) &~UART_MCR_BR_MSK);
 438
 439         /*
 440          * Free the interrupt
 441          */
 442         free_irq(port->irq, port);
 443 }
 444
 445 static const char *uart00_type(struct uart_port *port)
 446 {
 447         return port->type == PORT_UART00 ? "Altera UART00" : NULL;
 448 }
 449
 450 /*
 451  * Release the memory region(s) being used by 'port'
 452  */
 453 static void uart00_release_port(struct uart_port *port)
 454 {
 455         release_mem_region(port->mapbase, UART_PORT_SIZE);
 456
 457 #ifdef CONFIG_ARCH_CAMELOT
 458         if (port->membase != (void*)IO_ADDRESS(EXC_UART00_BASE)) {
 459                 iounmap(port->membase);
 460         }
 461 #endif
 462 }
 463
 464 /*
 465  * Request the memory region(s) being used by 'port'
 466  */
 467 static int uart00_request_port(struct uart_port *port)
 468 {
 469         return request_mem_region(port->mapbase, UART_PORT_SIZE, "serial_uart00")
 470                         != NULL ? 0 : -EBUSY;
 471 }
 472
 473 /*
 474  * Configure/autoconfigure the port.
 475  */
 476 static void uart00_config_port(struct uart_port *port, int flags)
 477 {
 478
 479         /*
 480          * Map the io memory if this is a soft uart
 481          */
 482         if (!port->membase)
 483                 port->membase = ioremap_nocache(port->mapbase,SZ_4K);
 484
 485         if (!port->membase)
 486                 printk(KERN_ERR "serial00: cannot map io memory\n");
 487         else
 488                 port->type = PORT_UART00;
 489
 490 }
 491
 492 /*
 493  * verify the new serial_struct (for TIOCSSERIAL).
 494  */
 495 static int uart00_verify_port(struct uart_port *port, struct serial_struct *ser)
 496 {
 497         int ret = 0;
 498         if (ser->type != PORT_UNKNOWN && ser->type != PORT_UART00)
 499                 ret = -EINVAL;
 500         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 501                 ret = -EINVAL;
 502         if (ser->baud_base < 9600)
 503                 ret = -EINVAL;
 504         return ret;
 505 }
 506
 507 static struct uart_ops uart00_pops = {
 508         .tx_empty       = uart00_tx_empty,
 509         .set_mctrl      = uart00_set_mctrl_null,
 510         .get_mctrl      = uart00_get_mctrl,
 511         .stop_tx        = uart00_stop_tx,
 512         .start_tx       = uart00_start_tx,
 513         .stop_rx        = uart00_stop_rx,
 514         .enable_ms      = uart00_enable_ms,
 515         .break_ctl      = uart00_break_ctl,
 516         .startup        = uart00_startup,
 517         .shutdown       = uart00_shutdown,
 518         .set_termios    = uart00_set_termios,
 519         .type           = uart00_type,
 520         .release_port   = uart00_release_port,
 521         .request_port   = uart00_request_port,
 522         .config_port    = uart00_config_port,
 523         .verify_port    = uart00_verify_port,
 524 };
 525
 526
 527 #ifdef CONFIG_ARCH_CAMELOT
 528 static struct uart_port epxa10db_port = {
 529         .membase        = (void*)IO_ADDRESS(EXC_UART00_BASE),
 530         .mapbase        = EXC_UART00_BASE,
 531         .iotype         = SERIAL_IO_MEM,
 532         .irq            = IRQ_UART,
 533         .uartclk        = EXC_AHB2_CLK_FREQUENCY,
 534         .fifosize       = 16,
 535         .ops            = &uart00_pops,
 536         .flags          = ASYNC_BOOT_AUTOCONF,
 537 };
 538 #endif
 539
 540
 541 #ifdef CONFIG_SERIAL_UART00_CONSOLE
 542 static void uart00_console_write(struct console *co, const char *s, unsigned count)
 543 {
 544 #ifdef CONFIG_ARCH_CAMELOT
 545         struct uart_port *port = &epxa10db_port;
 546         unsigned int status, old_ies;
 547         int i;
 548
 549         /*
 550          *      First save the CR then disable the interrupts
 551          */
 552         old_ies = UART_GET_IES(port);
 553         UART_PUT_IEC(port,0xff);
 554
 555         /*
 556          *      Now, do each character
 557          */
 558         for (i = 0; i < count; i++) {
 559                 do {
 560                         status = UART_GET_TSR(port);
 561                 } while (!UART_TX_READY(status));
 562                 UART_PUT_CHAR(port, s[i]);
 563                 if (s[i] == '\n') {
 564                         do {
 565                                 status = UART_GET_TSR(port);
 566                         } while (!UART_TX_READY(status));
 567                         UART_PUT_CHAR(port, '\r');
 568                 }
 569         }
 570
 571         /*
 572          *      Finally, wait for transmitter to become empty
 573          *      and restore the IES
 574          */
 575         do {
 576                 status = UART_GET_TSR(port);
 577         } while (status & UART_TSR_TX_LEVEL_MSK);
 578         UART_PUT_IES(port, old_ies);
 579 #endif
 580 }
 581
 582 static void __init
 583 uart00_console_get_options(struct uart_port *port, int *baud,
 584                            int *parity, int *bits)
 585 {
 586         unsigned int uart_mc, quot;
 587
 588         uart_mc = UART_GET_MC(port);
 589
 590         *parity = 'n';
 591         if (uart_mc & UART_MC_PE_MSK) {
 592                 if (uart_mc & UART_MC_EP_MSK)
 593                         *parity = 'e';
 594                 else
 595                         *parity = 'o';
 596         }
 597
 598         switch (uart_mc & UART_MC_CLS_MSK) {
 599         case UART_MC_CLS_CHARLEN_5:
 600                 *bits = 5;
 601                 break;
 602         case UART_MC_CLS_CHARLEN_6:
 603                 *bits = 6;
 604                 break;
 605         case UART_MC_CLS_CHARLEN_7:
 606                 *bits = 7;
 607                 break;
 608         case UART_MC_CLS_CHARLEN_8:
 609                 *bits = 8;
 610                 break;
 611         }
 612         quot = UART_GET_DIV_LO(port) | (UART_GET_DIV_HI(port) << 8);
 613         *baud = port->uartclk / (16 *quot );
 614 }
 615
 616 static int __init uart00_console_setup(struct console *co, char *options)
 617 {
 618         struct uart_port *port;
 619         int baud = 115200;
 620         int bits = 8;
 621         int parity = 'n';
 622         int flow = 'n';
 623
 624 #ifdef CONFIG_ARCH_CAMELOT
 625         port = &epxa10db_port;             ;
 626 #else
 627         return -ENODEV;
 628 #endif
 629         if (options)
 630                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 631         else
 632                 uart00_console_get_options(port, &baud, &parity, &bits);
 633
 634         return uart_set_options(port, co, baud, parity, bits, flow);
 635 }
 636
 637 extern struct uart_driver uart00_reg;
 638 static struct console uart00_console = {
 639         .name           = SERIAL_UART00_NAME,
 640         .write          = uart00_console_write,
 641         .device         = uart_console_device,
 642         .setup          = uart00_console_setup,
 643         .flags          = CON_PRINTBUFFER,
 644         .index          = 0,
 645         .data           = &uart00_reg,
 646 };
 647
 648 static int __init uart00_console_init(void)
 649 {
 650         register_console(&uart00_console);
 651         return 0;
 652 }
 653 console_initcall(uart00_console_init);
 654
 655 #define UART00_CONSOLE  &uart00_console
 656 #else
 657 #define UART00_CONSOLE  NULL
 658 #endif
 659
 660 static struct uart_driver uart00_reg = {
 661         .owner                  = NULL,
 662         .driver_name            = SERIAL_UART00_NAME,
 663         .dev_name               = SERIAL_UART00_NAME,
 664         .major                  = SERIAL_UART00_MAJOR,
 665         .minor                  = SERIAL_UART00_MINOR,
 666         .nr                     = UART_NR,
 667         .cons                   = UART00_CONSOLE,
 668 };
 669
 670 struct dev_port_entry{
 671         unsigned int base_addr;
 672         struct uart_port *port;
 673 };
 674
 675 #ifdef CONFIG_PLD_HOTSWAP
 676
 677 static struct dev_port_entry dev_port_map[UART_NR];
 678
 679 /*
 680  * Keep a mapping of dev_info addresses -> port lines to use when
 681  * removing ports dev==NULL indicates unused entry
 682  */
 683
 684 struct uart00_ps_data{
 685         unsigned int clk;
 686         unsigned int fifosize;
 687 };
 688
 689 int uart00_add_device(struct pldhs_dev_info* dev_info, void* dev_ps_data)
 690 {
 691         struct uart00_ps_data* dev_ps=dev_ps_data;
 692         struct uart_port * port;
 693         int i,result;
 694
 695         i=0;
 696         while(dev_port_map[i].port)
 697                 i++;
 698
 699         if(i==UART_NR){
 700                 printk(KERN_WARNING "uart00: Maximum number of ports reached\n");
 701                 return 0;
 702         }
 703
 704         port=kmalloc(sizeof(struct uart_port),GFP_KERNEL);
 705         if(!port)
 706                 return -ENOMEM;
 707
 708         printk("clk=%d fifo=%d\n",dev_ps->clk,dev_ps->fifosize);
 709         port->membase=0;
 710         port->mapbase=dev_info->base_addr;
 711         port->iotype=SERIAL_IO_MEM;
 712         port->irq=dev_info->irq;
 713         port->uartclk=dev_ps->clk;
 714         port->fifosize=dev_ps->fifosize;
 715         port->ops=&uart00_pops;
 716         port->line=i;
 717         port->flags=ASYNC_BOOT_AUTOCONF;
 718
 719         result=uart_add_one_port(&uart00_reg, port);
 720         if(result){
 721                 printk("uart_add_one_port returned %d\n",result);
 722                 return result;
 723         }
 724         dev_port_map[i].base_addr=dev_info->base_addr;
 725         dev_port_map[i].port=port;
 726         printk("uart00: added device at %x as ttyUA%d\n",dev_port_map[i].base_addr,i);
 727         return 0;
 728
 729 }
 730
 731 int uart00_remove_devices(void)
 732 {
 733         int i,result;
 734
 735
 736         result=0;
 737         for(i=1;i<UART_NR;i++){
 738                 if(dev_port_map[i].base_addr){
 739                         result=uart_remove_one_port(&uart00_reg, dev_port_map[i].port);
 740                         if(result)
 741                                 return result;
 742
 743                         /* port removed sucessfully, so now tidy up */
 744                         kfree(dev_port_map[i].port);
 745                         dev_port_map[i].base_addr=0;
 746                         dev_port_map[i].port=NULL;
 747                 }
 748         }
 749         return 0;
 750
 751 }
 752
 753 struct pld_hotswap_ops uart00_pldhs_ops={
 754         .name           = "uart00",
 755         .add_device     = uart00_add_device,
 756         .remove_devices = uart00_remove_devices,
 757 };
 758
 759 #endif
 760
 761 static int __init uart00_init(void)
 762 {
 763         int result;
 764
 765         printk(KERN_INFO "Serial: UART00 driver $Revision: 1.35 $\n");
 766
 767         printk(KERN_WARNING "serial_uart00:Using temporary major/minor pairs"
 768                 " - these WILL change in the future\n");
 769
 770         result = uart_register_driver(&uart00_reg);
 771         if (result)
 772                 return result;
 773 #ifdef CONFIG_ARCH_CAMELOT
 774         result = uart_add_one_port(&uart00_reg,&epxa10db_port);
 775 #endif
 776         if (result)
 777                 uart_unregister_driver(&uart00_reg);
 778
 779 #ifdef  CONFIG_PLD_HOTSWAP
 780         pldhs_register_driver(&uart00_pldhs_ops);
 781 #endif
 782         return result;
 783 }
 784
 785 __initcall(uart00_init);