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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / video / matrox / matroxfb_base.c
blobe2a2290b628a6e9bdcfb9d7345f8267d0989bf63
1 /*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writting this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102 /* make checkconfig does not check included files... */
103 #include <linux/config.h>
104 #include <linux/version.h>
105
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <asm/uaccess.h>
117
118 #ifdef CONFIG_PPC_PMAC
119 unsigned char nvram_read_byte(int);
120 static int default_vmode = VMODE_NVRAM;
121 static int default_cmode = CMODE_NVRAM;
122 #endif
123
124 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
125
126 /* --------------------------------------------------------------------- */
127
128 /*
129 * card parameters
130 */
131
132 /* --------------------------------------------------------------------- */
133
134 static struct fb_var_screeninfo vesafb_defined = {
135 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
136 0,0, /* virtual -> visible no offset */
137 8, /* depth -> load bits_per_pixel */
138 0, /* greyscale ? */
139 {0,0,0}, /* R */
140 {0,0,0}, /* G */
141 {0,0,0}, /* B */
142 {0,0,0}, /* transparency */
143 0, /* standard pixel format */
144 FB_ACTIVATE_NOW,
145 -1,-1,
146 FB_ACCELF_TEXT, /* accel flags */
147 39721L,48L,16L,33L,10L,
148 96L,2L,~0, /* No sync info */
149 FB_VMODE_NONINTERLACED,
150 0, {0,0,0,0,0}
151 };
152
153
154
155 /* --------------------------------------------------------------------- */
156 static void update_crtc2(WPMINFO unsigned int pos) {
157 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
158
159 /* Make sure that displays are compatible */
160 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
161 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
162 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
163 ) {
164 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
165 case 16:
166 case 32:
167 pos = pos * 8;
168 if (info->interlaced) {
169 mga_outl(0x3C2C, pos);
170 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
171 } else {
172 mga_outl(0x3C28, pos);
173 }
174 break;
175 }
176 }
177 }
178
179 static void matroxfb_crtc1_panpos(WPMINFO2) {
180 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
181 unsigned long flags;
182 int panpos;
183
184 matroxfb_DAC_lock_irqsave(flags);
185 panpos = ACCESS_FBINFO(crtc1.panpos);
186 if (panpos >= 0) {
187 unsigned int extvga_reg;
188
189 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
190 extvga_reg = mga_inb(M_EXTVGA_INDEX);
191 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
192 if (extvga_reg != 0x00) {
193 mga_outb(M_EXTVGA_INDEX, extvga_reg);
194 }
195 }
196 matroxfb_DAC_unlock_irqrestore(flags);
197 }
198 }
199
200 static irqreturn_t matrox_irq(int irq, void *dev_id, struct pt_regs *fp)
201 {
202 u_int32_t status;
203 int handled = 0;
204
205 MINFO_FROM(dev_id);
206
207 status = mga_inl(M_STATUS);
208
209 if (status & 0x20) {
210 mga_outl(M_ICLEAR, 0x20);
211 ACCESS_FBINFO(crtc1.vsync.cnt)++;
212 matroxfb_crtc1_panpos(PMINFO2);
213 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
214 handled = 1;
215 }
216 if (status & 0x200) {
217 mga_outl(M_ICLEAR, 0x200);
218 ACCESS_FBINFO(crtc2.vsync.cnt)++;
219 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
220 handled = 1;
221 }
222 return IRQ_RETVAL(handled);
223 }
224
225 int matroxfb_enable_irq(WPMINFO int reenable) {
226 u_int32_t bm;
227
228 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
229 bm = 0x220;
230 else
231 bm = 0x020;
232
233 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
234 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
235 SA_SHIRQ, "matroxfb", MINFO)) {
236 clear_bit(0, &ACCESS_FBINFO(irq_flags));
237 return -EINVAL;
238 }
239 /* Clear any pending field interrupts */
240 mga_outl(M_ICLEAR, bm);
241 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
242 } else if (reenable) {
243 u_int32_t ien;
244
245 ien = mga_inl(M_IEN);
246 if ((ien & bm) != bm) {
247 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
248 mga_outl(M_IEN, ien | bm);
249 }
250 }
251 return 0;
252 }
253
254 static void matroxfb_disable_irq(WPMINFO2) {
255 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
256 /* Flush pending pan-at-vbl request... */
257 matroxfb_crtc1_panpos(PMINFO2);
258 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
259 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
260 else
261 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
262 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
263 }
264 }
265
266 int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
267 wait_queue_t __wait;
268 struct matrox_vsync *vs;
269 unsigned int cnt;
270 int ret;
271
272 switch (crtc) {
273 case 0:
274 vs = &ACCESS_FBINFO(crtc1.vsync);
275 break;
276 case 1:
277 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
278 return -ENODEV;
279 }
280 vs = &ACCESS_FBINFO(crtc2.vsync);
281 break;
282 default:
283 return -ENODEV;
284 }
285 ret = matroxfb_enable_irq(PMINFO 0);
286 if (ret) {
287 return ret;
288 }
289 init_waitqueue_entry(&__wait, current);
290
291 cnt = vs->cnt;
292 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
293 if (ret < 0) {
294 return ret;
295 }
296 if (ret == 0) {
297 matroxfb_enable_irq(PMINFO 1);
298 return -ETIMEDOUT;
299 }
300 return 0;
301 }
302
303 /* --------------------------------------------------------------------- */
304
305 static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
306 unsigned int pos;
307 unsigned short p0, p1, p2;
308 #ifdef CONFIG_FB_MATROX_32MB
309 unsigned int p3;
310 #endif
311 int vbl;
312 unsigned long flags;
313
314 CRITFLAGS
315
316 DBG(__FUNCTION__)
317
318 if (ACCESS_FBINFO(dead))
319 return;
320
321 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
322 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
323 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
324 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
325 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
326 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
327 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
328 #ifdef CONFIG_FB_MATROX_32MB
329 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
330 #endif
331
332 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
333 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
334
335 CRITBEGIN
336
337 matroxfb_DAC_lock_irqsave(flags);
338 mga_setr(M_CRTC_INDEX, 0x0D, p0);
339 mga_setr(M_CRTC_INDEX, 0x0C, p1);
340 #ifdef CONFIG_FB_MATROX_32MB
341 if (ACCESS_FBINFO(devflags.support32MB))
342 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
343 #endif
344 if (vbl) {
345 ACCESS_FBINFO(crtc1.panpos) = p2;
346 } else {
347 /* Abort any pending change */
348 ACCESS_FBINFO(crtc1.panpos) = -1;
349 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
350 }
351 matroxfb_DAC_unlock_irqrestore(flags);
352
353 update_crtc2(PMINFO pos);
354
355 CRITEND
356 }
357
358 static void matroxfb_remove(WPMINFO int dummy) {
359 /* Currently we are holding big kernel lock on all dead & usecount updates.
360 * Destroy everything after all users release it. Especially do not unregister
361 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
362 * for device unplugged when in use.
363 * In future we should point mmio.vbase & video.vbase somewhere where we can
364 * write data without causing too much damage...
365 */
366
367 ACCESS_FBINFO(dead) = 1;
368 if (ACCESS_FBINFO(usecount)) {
369 /* destroy it later */
370 return;
371 }
372 matroxfb_unregister_device(MINFO);
373 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
374 matroxfb_g450_shutdown(PMINFO2);
375 #ifdef CONFIG_MTRR
376 if (ACCESS_FBINFO(mtrr.vram_valid))
377 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
378 #endif
379 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
380 mga_iounmap(ACCESS_FBINFO(video.vbase));
381 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
382 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
383 #ifdef CONFIG_FB_MATROX_MULTIHEAD
384 kfree(minfo);
385 #endif
386 }
387
388 /*
389 * Open/Release the frame buffer device
390 */
391
392 static int matroxfb_open(struct fb_info *info, int user)
393 {
394 MINFO_FROM_INFO(info);
395
396 DBG_LOOP(__FUNCTION__)
397
398 if (ACCESS_FBINFO(dead)) {
399 return -ENXIO;
400 }
401 ACCESS_FBINFO(usecount)++;
402 if (user) {
403 ACCESS_FBINFO(userusecount)++;
404 }
405 return(0);
406 }
407
408 static int matroxfb_release(struct fb_info *info, int user)
409 {
410 MINFO_FROM_INFO(info);
411
412 DBG_LOOP(__FUNCTION__)
413
414 if (user) {
415 if (0 == --ACCESS_FBINFO(userusecount)) {
416 matroxfb_disable_irq(PMINFO2);
417 }
418 }
419 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
420 matroxfb_remove(PMINFO 0);
421 }
422 return(0);
423 }
424
425 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
426 struct fb_info* info) {
427 MINFO_FROM_INFO(info);
428
429 DBG(__FUNCTION__)
430
431 matrox_pan_var(PMINFO var);
432 return 0;
433 }
434
435 static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
436 int bppshft2;
437
438 DBG(__FUNCTION__)
439
440 bppshft2 = bpp;
441 if (!bppshft2) {
442 return 8;
443 }
444 if (isInterleave(MINFO))
445 bppshft2 >>= 1;
446 if (ACCESS_FBINFO(devflags.video64bits))
447 bppshft2 >>= 1;
448 return bppshft2;
449 }
450
451 static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
452 int over;
453 int rounding;
454
455 DBG(__FUNCTION__)
456
457 switch (bpp) {
458 case 0: return xres;
459 case 4: rounding = 128;
460 break;
461 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
462 break;
463 case 16: rounding = 32;
464 break;
465 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
466 break;
467 default: rounding = 16;
468 /* on G400, 16 really does not work */
469 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
470 rounding = 32;
471 break;
472 }
473 if (isInterleave(MINFO)) {
474 rounding *= 2;
475 }
476 over = xres % rounding;
477 if (over)
478 xres += rounding-over;
479 return xres;
480 }
481
482 static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
483 const int* width;
484 int xres_new;
485
486 DBG(__FUNCTION__)
487
488 if (!bpp) return xres;
489
490 width = ACCESS_FBINFO(capable.vxres);
491
492 if (ACCESS_FBINFO(devflags.precise_width)) {
493 while (*width) {
494 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
495 break;
496 }
497 width++;
498 }
499 xres_new = *width;
500 } else {
501 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
502 }
503 if (!xres_new) return 0;
504 if (xres != xres_new) {
505 printk(KERN_INFO "matroxfb: cannot set xres to %d, rounded up to %d\n", xres, xres_new);
506 }
507 return xres_new;
508 }
509
510 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
511
512 DBG(__FUNCTION__)
513
514 switch (var->bits_per_pixel) {
515 case 4:
516 return 16; /* pseudocolor... 16 entries HW palette */
517 case 8:
518 return 256; /* pseudocolor... 256 entries HW palette */
519 case 16:
520 return 16; /* directcolor... 16 entries SW palette */
521 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
522 case 24:
523 return 16; /* directcolor... 16 entries SW palette */
524 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
525 case 32:
526 return 16; /* directcolor... 16 entries SW palette */
527 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
528 }
529 return 16; /* return something reasonable... or panic()? */
530 }
531
532 static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
533 struct RGBT {
534 unsigned char bpp;
535 struct {
536 unsigned char offset,
537 length;
538 } red,
539 green,
540 blue,
541 transp;
542 signed char visual;
543 };
544 static const struct RGBT table[]= {
545 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
546 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
547 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
548 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
549 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
550 };
551 struct RGBT const *rgbt;
552 unsigned int bpp = var->bits_per_pixel;
553 unsigned int vramlen;
554 unsigned int memlen;
555
556 DBG(__FUNCTION__)
557
558 switch (bpp) {
559 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
560 break;
561 case 8: break;
562 case 16: break;
563 case 24: break;
564 case 32: break;
565 default: return -EINVAL;
566 }
567 *ydstorg = 0;
568 vramlen = ACCESS_FBINFO(video.len_usable);
569 if (var->yres_virtual < var->yres)
570 var->yres_virtual = var->yres;
571 if (var->xres_virtual < var->xres)
572 var->xres_virtual = var->xres;
573
574 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
575 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
576 if (memlen > vramlen) {
577 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
578 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
579 }
580 /* There is hardware bug that no line can cross 4MB boundary */
581 /* give up for CFB24, it is impossible to easy workaround it */
582 /* for other try to do something */
583 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
584 if (bpp == 24) {
585 /* sorry */
586 } else {
587 unsigned int linelen;
588 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
589 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
590 unsigned int max_yres;
591
592 while (m1) {
593 int t;
594
595 while (m2 >= m1) m2 -= m1;
596 t = m1;
597 m1 = m2;
598 m2 = t;
599 }
600 m2 = linelen * PAGE_SIZE / m2;
601 *ydstorg = m2 = 0x400000 % m2;
602 max_yres = (vramlen - m2) / linelen;
603 if (var->yres_virtual > max_yres)
604 var->yres_virtual = max_yres;
605 }
606 }
607 /* YDSTLEN contains only signed 16bit value */
608 if (var->yres_virtual > 32767)
609 var->yres_virtual = 32767;
610 /* we must round yres/xres down, we already rounded y/xres_virtual up
611 if it was possible. We should return -EINVAL, but I disagree */
612 if (var->yres_virtual < var->yres)
613 var->yres = var->yres_virtual;
614 if (var->xres_virtual < var->xres)
615 var->xres = var->xres_virtual;
616 if (var->xoffset + var->xres > var->xres_virtual)
617 var->xoffset = var->xres_virtual - var->xres;
618 if (var->yoffset + var->yres > var->yres_virtual)
619 var->yoffset = var->yres_virtual - var->yres;
620
621 if (bpp == 16 && var->green.length == 5) {
622 bpp--; /* an artifical value - 15 */
623 }
624
625 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
626 #define SETCLR(clr)\
627 var->clr.offset = rgbt->clr.offset;\
628 var->clr.length = rgbt->clr.length
629 SETCLR(red);
630 SETCLR(green);
631 SETCLR(blue);
632 SETCLR(transp);
633 #undef SETCLR
634 *visual = rgbt->visual;
635
636 if (bpp > 8)
637 dprintk("matroxfb: truecolor: "
638 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
639 var->transp.length, var->red.length, var->green.length, var->blue.length,
640 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
641
642 *video_cmap_len = matroxfb_get_cmap_len(var);
643 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
644 var->xres_virtual, var->yres_virtual);
645 return 0;
646 }
647
648 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
649 unsigned blue, unsigned transp,
650 struct fb_info *fb_info)
651 {
652 #ifdef CONFIG_FB_MATROX_MULTIHEAD
653 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
654 #endif
655
656 DBG(__FUNCTION__)
657
658 /*
659 * Set a single color register. The values supplied are
660 * already rounded down to the hardware's capabilities
661 * (according to the entries in the `var' structure). Return
662 * != 0 for invalid regno.
663 */
664
665 if (regno >= ACCESS_FBINFO(curr.cmap_len))
666 return 1;
667
668 if (ACCESS_FBINFO(fbcon).var.grayscale) {
669 /* gray = 0.30*R + 0.59*G + 0.11*B */
670 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
671 }
672
673 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
674 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
675 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
676 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
677
678 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
679 case 4:
680 case 8:
681 mga_outb(M_DAC_REG, regno);
682 mga_outb(M_DAC_VAL, red);
683 mga_outb(M_DAC_VAL, green);
684 mga_outb(M_DAC_VAL, blue);
685 break;
686 case 16:
687 {
688 u_int16_t col =
689 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
690 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
691 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
692 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
693 ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
694 }
695 break;
696 case 24:
697 case 32:
698 ACCESS_FBINFO(cmap[regno]) =
699 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
700 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
701 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
702 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
703 break;
704 }
705 return 0;
706 }
707
708 static void matroxfb_init_fix(WPMINFO2)
709 {
710 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
711 DBG(__FUNCTION__)
712
713 strcpy(fix->id,"MATROX");
714
715 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
716 fix->ypanstep = 1;
717 fix->ywrapstep = 0;
718 fix->mmio_start = ACCESS_FBINFO(mmio.base);
719 fix->mmio_len = ACCESS_FBINFO(mmio.len);
720 fix->accel = ACCESS_FBINFO(devflags.accelerator);
721 }
722
723 static void matroxfb_update_fix(WPMINFO2)
724 {
725 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
726 DBG(__FUNCTION__)
727
728 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
729 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
730 }
731
732 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
733 {
734 int err;
735 int visual;
736 int cmap_len;
737 unsigned int ydstorg;
738 MINFO_FROM_INFO(info);
739
740 if (ACCESS_FBINFO(dead)) {
741 return -ENXIO;
742 }
743 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
744 return err;
745 return 0;
746 }
747
748 static int matroxfb_set_par(struct fb_info *info)
749 {
750 int err;
751 int visual;
752 int cmap_len;
753 unsigned int ydstorg;
754 struct fb_var_screeninfo *var;
755 MINFO_FROM_INFO(info);
756
757 DBG(__FUNCTION__)
758
759 if (ACCESS_FBINFO(dead)) {
760 return -ENXIO;
761 }
762
763 var = &info->var;
764 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
765 return err;
766 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
767 matroxfb_update_fix(PMINFO2);
768 ACCESS_FBINFO(fbcon).fix.visual = visual;
769 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
770 ACCESS_FBINFO(fbcon).fix.type_aux = 0;
771 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
772 {
773 unsigned int pos;
774
775 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
776 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
777 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
778 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
779 if (var->bits_per_pixel == 4)
780 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
781 else
782 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
783 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
784 { struct my_timming mt;
785 struct matrox_hw_state* hw;
786 int out;
787
788 matroxfb_var2my(var, &mt);
789 mt.crtc = MATROXFB_SRC_CRTC1;
790 /* CRTC1 delays */
791 switch (var->bits_per_pixel) {
792 case 0: mt.delay = 31 + 0; break;
793 case 16: mt.delay = 21 + 8; break;
794 case 24: mt.delay = 17 + 8; break;
795 case 32: mt.delay = 16 + 8; break;
796 default: mt.delay = 31 + 8; break;
797 }
798
799 hw = &ACCESS_FBINFO(hw);
800
801 down_read(&ACCESS_FBINFO(altout).lock);
802 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
803 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
804 ACCESS_FBINFO(outputs[out]).output->compute) {
805 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
806 }
807 }
808 up_read(&ACCESS_FBINFO(altout).lock);
809 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
810 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
811 ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
812 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
813 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
814
815 hw->CRTC[0x0D] = pos & 0xFF;
816 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
817 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
818 hw->CRTCEXT[8] = pos >> 21;
819 ACCESS_FBINFO(hw_switch->restore(PMINFO2));
820 update_crtc2(PMINFO pos);
821 down_read(&ACCESS_FBINFO(altout).lock);
822 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
823 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
824 ACCESS_FBINFO(outputs[out]).output->program) {
825 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
826 }
827 }
828 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
829 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
830 ACCESS_FBINFO(outputs[out]).output->start) {
831 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
832 }
833 }
834 up_read(&ACCESS_FBINFO(altout).lock);
835 matrox_cfbX_init(PMINFO2);
836 }
837 }
838 return 0;
839 }
840
841 static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
842 {
843 unsigned int sts1;
844
845 matroxfb_enable_irq(PMINFO 0);
846 memset(vblank, 0, sizeof(*vblank));
847 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
848 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
849 sts1 = mga_inb(M_INSTS1);
850 vblank->vcount = mga_inl(M_VCOUNT);
851 /* BTW, on my PIII/450 with G400, reading M_INSTS1
852 byte makes this call about 12% slower (1.70 vs. 2.05 us
853 per ioctl()) */
854 if (sts1 & 1)
855 vblank->flags |= FB_VBLANK_HBLANKING;
856 if (sts1 & 8)
857 vblank->flags |= FB_VBLANK_VSYNCING;
858 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
859 vblank->flags |= FB_VBLANK_VBLANKING;
860 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
861 vblank->flags |= FB_VBLANK_HAVE_COUNT;
862 /* Only one writer, aligned int value...
863 it should work without lock and without atomic_t */
864 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
865 }
866 return 0;
867 }
868
869 static struct matrox_altout panellink_output = {
870 .name = "Panellink output",
871 };
872
873 static int matroxfb_ioctl(struct inode *inode, struct file *file,
874 unsigned int cmd, unsigned long arg,
875 struct fb_info *info)
876 {
877 void __user *argp = (void __user *)arg;
878 MINFO_FROM_INFO(info);
879
880 DBG(__FUNCTION__)
881
882 if (ACCESS_FBINFO(dead)) {
883 return -ENXIO;
884 }
885
886 switch (cmd) {
887 case FBIOGET_VBLANK:
888 {
889 struct fb_vblank vblank;
890 int err;
891
892 err = matroxfb_get_vblank(PMINFO &vblank);
893 if (err)
894 return err;
895 if (copy_to_user(argp, &vblank, sizeof(vblank)))
896 return -EFAULT;
897 return 0;
898 }
899 case FBIO_WAITFORVSYNC:
900 {
901 u_int32_t crt;
902
903 if (get_user(crt, (u_int32_t __user *)arg))
904 return -EFAULT;
905
906 return matroxfb_wait_for_sync(PMINFO crt);
907 }
908 case MATROXFB_SET_OUTPUT_MODE:
909 {
910 struct matroxioc_output_mode mom;
911 struct matrox_altout *oproc;
912 int val;
913
914 if (copy_from_user(&mom, argp, sizeof(mom)))
915 return -EFAULT;
916 if (mom.output >= MATROXFB_MAX_OUTPUTS)
917 return -ENXIO;
918 down_read(&ACCESS_FBINFO(altout.lock));
919 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
920 if (!oproc) {
921 val = -ENXIO;
922 } else if (!oproc->verifymode) {
923 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
924 val = 0;
925 } else {
926 val = -EINVAL;
927 }
928 } else {
929 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
930 }
931 if (!val) {
932 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
933 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
934 val = 1;
935 }
936 }
937 up_read(&ACCESS_FBINFO(altout.lock));
938 if (val != 1)
939 return val;
940 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
941 case MATROXFB_SRC_CRTC1:
942 matroxfb_set_par(info);
943 break;
944 case MATROXFB_SRC_CRTC2:
945 {
946 struct matroxfb_dh_fb_info* crtc2;
947
948 down_read(&ACCESS_FBINFO(crtc2.lock));
949 crtc2 = ACCESS_FBINFO(crtc2.info);
950 if (crtc2)
951 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
952 up_read(&ACCESS_FBINFO(crtc2.lock));
953 }
954 break;
955 }
956 return 0;
957 }
958 case MATROXFB_GET_OUTPUT_MODE:
959 {
960 struct matroxioc_output_mode mom;
961 struct matrox_altout *oproc;
962 int val;
963
964 if (copy_from_user(&mom, argp, sizeof(mom)))
965 return -EFAULT;
966 if (mom.output >= MATROXFB_MAX_OUTPUTS)
967 return -ENXIO;
968 down_read(&ACCESS_FBINFO(altout.lock));
969 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
970 if (!oproc) {
971 val = -ENXIO;
972 } else {
973 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
974 val = 0;
975 }
976 up_read(&ACCESS_FBINFO(altout.lock));
977 if (val)
978 return val;
979 if (copy_to_user(argp, &mom, sizeof(mom)))
980 return -EFAULT;
981 return 0;
982 }
983 case MATROXFB_SET_OUTPUT_CONNECTION:
984 {
985 u_int32_t tmp;
986 int i;
987 int changes;
988
989 if (copy_from_user(&tmp, argp, sizeof(tmp)))
990 return -EFAULT;
991 for (i = 0; i < 32; i++) {
992 if (tmp & (1 << i)) {
993 if (i >= MATROXFB_MAX_OUTPUTS)
994 return -ENXIO;
995 if (!ACCESS_FBINFO(outputs[i]).output)
996 return -ENXIO;
997 switch (ACCESS_FBINFO(outputs[i]).src) {
998 case MATROXFB_SRC_NONE:
999 case MATROXFB_SRC_CRTC1:
1000 break;
1001 default:
1002 return -EBUSY;
1003 }
1004 }
1005 }
1006 if (ACCESS_FBINFO(devflags.panellink)) {
1007 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1008 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1009 return -EINVAL;
1010 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1011 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1012 return -EBUSY;
1013 }
1014 }
1015 }
1016 }
1017 changes = 0;
1018 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1019 if (tmp & (1 << i)) {
1020 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1021 changes = 1;
1022 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1023 }
1024 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1025 changes = 1;
1026 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1027 }
1028 }
1029 if (!changes)
1030 return 0;
1031 matroxfb_set_par(info);
1032 return 0;
1033 }
1034 case MATROXFB_GET_OUTPUT_CONNECTION:
1035 {
1036 u_int32_t conn = 0;
1037 int i;
1038
1039 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1040 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1041 conn |= 1 << i;
1042 }
1043 }
1044 if (put_user(conn, (u_int32_t __user *)arg))
1045 return -EFAULT;
1046 return 0;
1047 }
1048 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1049 {
1050 u_int32_t conn = 0;
1051 int i;
1052
1053 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1054 if (ACCESS_FBINFO(outputs[i]).output) {
1055 switch (ACCESS_FBINFO(outputs[i]).src) {
1056 case MATROXFB_SRC_NONE:
1057 case MATROXFB_SRC_CRTC1:
1058 conn |= 1 << i;
1059 break;
1060 }
1061 }
1062 }
1063 if (ACCESS_FBINFO(devflags.panellink)) {
1064 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1065 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1066 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1067 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1068 }
1069 if (put_user(conn, (u_int32_t __user *)arg))
1070 return -EFAULT;
1071 return 0;
1072 }
1073 case MATROXFB_GET_ALL_OUTPUTS:
1074 {
1075 u_int32_t conn = 0;
1076 int i;
1077
1078 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1079 if (ACCESS_FBINFO(outputs[i]).output) {
1080 conn |= 1 << i;
1081 }
1082 }
1083 if (put_user(conn, (u_int32_t __user *)arg))
1084 return -EFAULT;
1085 return 0;
1086 }
1087 case VIDIOC_QUERYCAP:
1088 {
1089 struct v4l2_capability r;
1090
1091 memset(&r, 0, sizeof(r));
1092 strcpy(r.driver, "matroxfb");
1093 strcpy(r.card, "Matrox");
1094 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
1095 r.version = KERNEL_VERSION(1,0,0);
1096 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1097 if (copy_to_user(argp, &r, sizeof(r)))
1098 return -EFAULT;
1099 return 0;
1100
1101 }
1102 case VIDIOC_QUERYCTRL:
1103 {
1104 struct v4l2_queryctrl qctrl;
1105 int err;
1106
1107 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1108 return -EFAULT;
1109
1110 down_read(&ACCESS_FBINFO(altout).lock);
1111 if (!ACCESS_FBINFO(outputs[1]).output) {
1112 err = -ENXIO;
1113 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1114 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1115 } else {
1116 err = -EINVAL;
1117 }
1118 up_read(&ACCESS_FBINFO(altout).lock);
1119 if (err >= 0 &&
1120 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1121 return -EFAULT;
1122 return err;
1123 }
1124 case VIDIOC_G_CTRL:
1125 {
1126 struct v4l2_control ctrl;
1127 int err;
1128
1129 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1130 return -EFAULT;
1131
1132 down_read(&ACCESS_FBINFO(altout).lock);
1133 if (!ACCESS_FBINFO(outputs[1]).output) {
1134 err = -ENXIO;
1135 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1136 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1137 } else {
1138 err = -EINVAL;
1139 }
1140 up_read(&ACCESS_FBINFO(altout).lock);
1141 if (err >= 0 &&
1142 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1143 return -EFAULT;
1144 return err;
1145 }
1146 case VIDIOC_S_CTRL:
1147 {
1148 struct v4l2_control ctrl;
1149 int err;
1150
1151 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1152 return -EFAULT;
1153
1154 down_read(&ACCESS_FBINFO(altout).lock);
1155 if (!ACCESS_FBINFO(outputs[1]).output) {
1156 err = -ENXIO;
1157 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1158 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1159 } else {
1160 err = -EINVAL;
1161 }
1162 up_read(&ACCESS_FBINFO(altout).lock);
1163 return err;
1164 }
1165 }
1166 return -ENOTTY;
1167 }
1168
1169 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1170
1171 static int matroxfb_blank(int blank, struct fb_info *info)
1172 {
1173 int seq;
1174 int crtc;
1175 CRITFLAGS
1176 MINFO_FROM_INFO(info);
1177
1178 DBG(__FUNCTION__)
1179
1180 if (ACCESS_FBINFO(dead))
1181 return 1;
1182
1183 switch (blank) {
1184 case 1: seq = 0x20; crtc = 0x00; break; /* works ??? */
1185 case 2: seq = 0x20; crtc = 0x10; break;
1186 case 3: seq = 0x20; crtc = 0x20; break;
1187 case 4: seq = 0x20; crtc = 0x30; break;
1188 default: seq = 0x00; crtc = 0x00; break;
1189 }
1190
1191 CRITBEGIN
1192
1193 mga_outb(M_SEQ_INDEX, 1);
1194 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1195 mga_outb(M_EXTVGA_INDEX, 1);
1196 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1197
1198 CRITEND
1199 return 0;
1200 }
1201
1202 static struct fb_ops matroxfb_ops = {
1203 .owner = THIS_MODULE,
1204 .fb_open = matroxfb_open,
1205 .fb_release = matroxfb_release,
1206 .fb_check_var = matroxfb_check_var,
1207 .fb_set_par = matroxfb_set_par,
1208 .fb_setcolreg = matroxfb_setcolreg,
1209 .fb_pan_display =matroxfb_pan_display,
1210 .fb_blank = matroxfb_blank,
1211 .fb_ioctl = matroxfb_ioctl,
1212 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1213 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1214 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1215 /* .fb_cursor = <set by matrox_cfbX_init>, */
1216 };
1217
1218 #define RSDepth(X) (((X) >> 8) & 0x0F)
1219 #define RS8bpp 0x1
1220 #define RS15bpp 0x2
1221 #define RS16bpp 0x3
1222 #define RS32bpp 0x4
1223 #define RS4bpp 0x5
1224 #define RS24bpp 0x6
1225 #define RSText 0x7
1226 #define RSText8 0x8
1227 /* 9-F */
1228 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1229 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1230 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1231 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1232 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1233 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1234 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1235 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1236 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1237 };
1238
1239 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1240 static unsigned int mem; /* "matrox:mem:xxxxxM" */
1241 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1242 static int inv24; /* "matrox:inv24" */
1243 static int cross4MB = -1; /* "matrox:cross4MB" */
1244 static int disabled; /* "matrox:disabled" */
1245 static int noaccel; /* "matrox:noaccel" */
1246 static int nopan; /* "matrox:nopan" */
1247 static int no_pci_retry; /* "matrox:nopciretry" */
1248 static int novga; /* "matrox:novga" */
1249 static int nobios; /* "matrox:nobios" */
1250 static int noinit = 1; /* "matrox:init" */
1251 static int inverse; /* "matrox:inverse" */
1252 static int sgram; /* "matrox:sgram" */
1253 #ifdef CONFIG_MTRR
1254 static int mtrr = 1; /* "matrox:nomtrr" */
1255 #endif
1256 static int grayscale; /* "matrox:grayscale" */
1257 static int dev = -1; /* "matrox:dev:xxxxx" */
1258 static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1259 static int depth = -1; /* "matrox:depth:xxxxx" */
1260 static unsigned int xres; /* "matrox:xres:xxxxx" */
1261 static unsigned int yres; /* "matrox:yres:xxxxx" */
1262 static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1263 static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1264 static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1265 static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1266 static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1267 static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1268 static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1269 static int sync = -1; /* "matrox:sync:xxxxx" */
1270 static unsigned int fv; /* "matrox:fv:xxxxx" */
1271 static unsigned int fh; /* "matrox:fh:xxxxxk" */
1272 static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1273 static int dfp; /* "matrox:dfp */
1274 static int dfp_type = -1; /* "matrox:dfp:xxx */
1275 static int memtype = -1; /* "matrox:memtype:xxx" */
1276 static char outputs[8]; /* "matrox:outputs:xxx" */
1277
1278 #ifndef MODULE
1279 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1280 #endif
1281
1282 static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1283 vaddr_t vm;
1284 unsigned int offs;
1285 unsigned int offs2;
1286 unsigned char store;
1287 unsigned char bytes[32];
1288 unsigned char* tmp;
1289
1290 DBG(__FUNCTION__)
1291
1292 vm = ACCESS_FBINFO(video.vbase);
1293 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1294 /* at least 2MB */
1295 if (maxSize < 0x0200000) return 0;
1296 if (maxSize > 0x2000000) maxSize = 0x2000000;
1297
1298 mga_outb(M_EXTVGA_INDEX, 0x03);
1299 mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) | 0x80);
1300
1301 store = mga_readb(vm, 0x1234);
1302 tmp = bytes;
1303 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1304 *tmp++ = mga_readb(vm, offs);
1305 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1306 mga_writeb(vm, offs, 0x02);
1307 if (ACCESS_FBINFO(features.accel.has_cacheflush))
1308 mga_outb(M_CACHEFLUSH, 0x00);
1309 else
1310 mga_writeb(vm, 0x1234, 0x99);
1311 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1312 if (mga_readb(vm, offs) != 0x02)
1313 break;
1314 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1315 if (mga_readb(vm, offs))
1316 break;
1317 }
1318 tmp = bytes;
1319 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1320 mga_writeb(vm, offs2, *tmp++);
1321 mga_writeb(vm, 0x1234, store);
1322
1323 mga_outb(M_EXTVGA_INDEX, 0x03);
1324 mga_outb(M_EXTVGA_DATA, mga_inb(M_EXTVGA_DATA) & ~0x80);
1325
1326 *realSize = offs - 0x100000;
1327 #ifdef CONFIG_FB_MATROX_MILLENIUM
1328 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
1329 #endif
1330 return 1;
1331 }
1332
1333 struct video_board {
1334 int maxvram;
1335 int maxdisplayable;
1336 int accelID;
1337 struct matrox_switch* lowlevel;
1338 };
1339 #ifdef CONFIG_FB_MATROX_MILLENIUM
1340 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1341 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1342 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1343 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1344 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1345 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1346 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1347 #ifdef CONFIG_FB_MATROX_G100
1348 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1349 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1350 #ifdef CONFIG_FB_MATROX_32MB
1351 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1352 whole 32MB */
1353 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1354 #else
1355 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1356 #endif
1357 #endif
1358
1359 #define DEVF_VIDEO64BIT 0x0001
1360 #define DEVF_SWAPS 0x0002
1361 #define DEVF_SRCORG 0x0004
1362 #define DEVF_DUALHEAD 0x0008
1363 #define DEVF_CROSS4MB 0x0010
1364 #define DEVF_TEXT4B 0x0020
1365 /* #define DEVF_recycled 0x0040 */
1366 /* #define DEVF_recycled 0x0080 */
1367 #define DEVF_SUPPORT32MB 0x0100
1368 #define DEVF_ANY_VXRES 0x0200
1369 #define DEVF_TEXT16B 0x0400
1370 #define DEVF_CRTC2 0x0800
1371 #define DEVF_MAVEN_CAPABLE 0x1000
1372 #define DEVF_PANELLINK_CAPABLE 0x2000
1373 #define DEVF_G450DAC 0x4000
1374
1375 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1376 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1377 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1378 #define DEVF_G200 (DEVF_G2CORE)
1379 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1380 /* if you'll find how to drive DFP... */
1381 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1382 #define DEVF_G550 (DEVF_G450)
1383
1384 static struct board {
1385 unsigned short vendor, device, rev, svid, sid;
1386 unsigned int flags;
1387 unsigned int maxclk;
1388 enum mga_chip chip;
1389 struct video_board* base;
1390 const char* name;
1391 } dev_list[] = {
1392 #ifdef CONFIG_FB_MATROX_MILLENIUM
1393 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1394 0, 0,
1395 DEVF_TEXT4B,
1396 230000,
1397 MGA_2064,
1398 &vbMillennium,
1399 "Millennium (PCI)"},
1400 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1401 0, 0,
1402 DEVF_SWAPS,
1403 220000,
1404 MGA_2164,
1405 &vbMillennium2,
1406 "Millennium II (PCI)"},
1407 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1408 0, 0,
1409 DEVF_SWAPS,
1410 250000,
1411 MGA_2164,
1412 &vbMillennium2A,
1413 "Millennium II (AGP)"},
1414 #endif
1415 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1416 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1417 0, 0,
1418 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1419 180000,
1420 MGA_1064,
1421 &vbMystique,
1422 "Mystique (PCI)"},
1423 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1424 0, 0,
1425 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1426 220000,
1427 MGA_1164,
1428 &vbMystique,
1429 "Mystique 220 (PCI)"},
1430 #endif
1431 #ifdef CONFIG_FB_MATROX_G100
1432 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1433 0, 0,
1434 DEVF_G100,
1435 230000,
1436 MGA_G100,
1437 &vbG100,
1438 "MGA-G100 (PCI)"},
1439 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1440 0, 0,
1441 DEVF_G100,
1442 230000,
1443 MGA_G100,
1444 &vbG100,
1445 "MGA-G100 (AGP)"},
1446 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1447 0, 0,
1448 DEVF_G200,
1449 250000,
1450 MGA_G200,
1451 &vbG200,
1452 "MGA-G200 (PCI)"},
1453 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1454 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1455 DEVF_G200,
1456 220000,
1457 MGA_G200,
1458 &vbG200,
1459 "MGA-G200 (AGP)"},
1460 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1461 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1462 DEVF_G200,
1463 230000,
1464 MGA_G200,
1465 &vbG200,
1466 "Mystique G200 (AGP)"},
1467 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1468 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1469 DEVF_G200,
1470 250000,
1471 MGA_G200,
1472 &vbG200,
1473 "Millennium G200 (AGP)"},
1474 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1475 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1476 DEVF_G200,
1477 230000,
1478 MGA_G200,
1479 &vbG200,
1480 "Marvel G200 (AGP)"},
1481 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1482 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1483 DEVF_G200,
1484 230000,
1485 MGA_G200,
1486 &vbG200,
1487 "MGA-G200 (AGP)"},
1488 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1489 0, 0,
1490 DEVF_G200,
1491 230000,
1492 MGA_G200,
1493 &vbG200,
1494 "G200 (AGP)"},
1495 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1496 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1497 DEVF_G400,
1498 360000,
1499 MGA_G400,
1500 &vbG400,
1501 "Millennium G400 MAX (AGP)"},
1502 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1503 0, 0,
1504 DEVF_G400,
1505 300000,
1506 MGA_G400,
1507 &vbG400,
1508 "G400 (AGP)"},
1509 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1510 0, 0,
1511 DEVF_G450,
1512 360000,
1513 MGA_G450,
1514 &vbG400,
1515 "G450"},
1516 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1517 0, 0,
1518 DEVF_G550,
1519 360000,
1520 MGA_G550,
1521 &vbG400,
1522 "G550"},
1523 #endif
1524 {0, 0, 0xFF,
1525 0, 0,
1526 0,
1527 0,
1528 0,
1529 NULL,
1530 NULL}};
1531
1532 #ifndef MODULE
1533 static struct fb_videomode defaultmode = {
1534 /* 640x480 @ 60Hz, 31.5 kHz */
1535 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1536 0, FB_VMODE_NONINTERLACED
1537 };
1538 #endif /* !MODULE */
1539
1540 static int hotplug = 0;
1541
1542 static void setDefaultOutputs(WPMINFO2) {
1543 unsigned int i;
1544 const char* ptr;
1545
1546 ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1;
1547 if (ACCESS_FBINFO(devflags.g450dac)) {
1548 ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1;
1549 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1550 } else if (dfp) {
1551 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1552 }
1553 ptr = outputs;
1554 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1555 char c = *ptr++;
1556
1557 if (c == 0) {
1558 break;
1559 }
1560 if (c == '0') {
1561 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE;
1562 } else if (c == '1') {
1563 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1;
1564 } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) {
1565 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2;
1566 } else {
1567 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1568 break;
1569 }
1570 }
1571 /* Nullify this option for subsequent adapters */
1572 outputs[0] = 0;
1573 }
1574
1575 static int initMatrox2(WPMINFO struct board* b){
1576 unsigned long ctrlptr_phys = 0;
1577 unsigned long video_base_phys = 0;
1578 unsigned int memsize;
1579 int err;
1580
1581 DBG(__FUNCTION__)
1582
1583 /* set default values... */
1584 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1585
1586 ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
1587 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
1588 ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
1589
1590 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1591 ACCESS_FBINFO(capable.plnwt) = 1;
1592 ACCESS_FBINFO(chip) = b->chip;
1593 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
1594 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
1595 if (b->flags & DEVF_TEXT4B) {
1596 ACCESS_FBINFO(devflags.vgastep) = 4;
1597 ACCESS_FBINFO(devflags.textmode) = 4;
1598 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1599 } else if (b->flags & DEVF_TEXT16B) {
1600 ACCESS_FBINFO(devflags.vgastep) = 16;
1601 ACCESS_FBINFO(devflags.textmode) = 1;
1602 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1603 } else {
1604 ACCESS_FBINFO(devflags.vgastep) = 8;
1605 ACCESS_FBINFO(devflags.textmode) = 1;
1606 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
1607 }
1608 #ifdef CONFIG_FB_MATROX_32MB
1609 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
1610 #endif
1611 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
1612 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
1613 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1614 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
1615 ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
1616 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
1617 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
1618 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
1619 setDefaultOutputs(PMINFO2);
1620 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1621 ACCESS_FBINFO(outputs[2]).data = MINFO;
1622 ACCESS_FBINFO(outputs[2]).output = &panellink_output;
1623 ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
1624 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
1625 ACCESS_FBINFO(devflags.panellink) = 1;
1626 }
1627
1628 if (ACCESS_FBINFO(capable.cross4MB) < 0)
1629 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
1630 if (b->flags & DEVF_SWAPS) {
1631 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1632 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1633 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
1634 } else {
1635 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1636 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1637 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
1638 }
1639 err = -EINVAL;
1640 if (!ctrlptr_phys) {
1641 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1642 goto fail;
1643 }
1644 if (!video_base_phys) {
1645 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1646 goto fail;
1647 }
1648 memsize = b->base->maxvram;
1649 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1650 goto fail;
1651 }
1652 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1653 goto failCtrlMR;
1654 }
1655 ACCESS_FBINFO(video.len_maximum) = memsize;
1656 /* convert mem (autodetect k, M) */
1657 if (mem < 1024) mem *= 1024;
1658 if (mem < 0x00100000) mem *= 1024;
1659
1660 if (mem && (mem < memsize))
1661 memsize = mem;
1662 err = -ENOMEM;
1663 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
1664 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1665 goto failVideoMR;
1666 }
1667 ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
1668 ACCESS_FBINFO(mmio.len) = 16384;
1669 ACCESS_FBINFO(video.base) = video_base_phys;
1670 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
1671 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1672 video_base_phys, memsize);
1673 goto failCtrlIO;
1674 }
1675 {
1676 u_int32_t cmd;
1677 u_int32_t mga_option;
1678
1679 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
1680 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
1681 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1682 mga_option |= MX_OPTION_BSWAP;
1683 /* disable palette snooping */
1684 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1685 if (pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437, NULL)) {
1686 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
1687 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1688 }
1689 mga_option |= 0x20000000;
1690 ACCESS_FBINFO(devflags.nopciretry) = 1;
1691 }
1692 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
1693 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
1694 ACCESS_FBINFO(hw).MXoptionReg = mga_option;
1695
1696 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1697 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1698 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
1699 }
1700
1701 err = -ENXIO;
1702 matroxfb_read_pins(PMINFO2);
1703 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
1704 goto failVideoIO;
1705 }
1706
1707 err = -ENOMEM;
1708 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
1709 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1710 goto failVideoIO;
1711 }
1712 ACCESS_FBINFO(devflags.ydstorg) = 0;
1713
1714 ACCESS_FBINFO(fbcon.currcon) = -1;
1715 ACCESS_FBINFO(video.base) = video_base_phys;
1716 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
1717 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
1718 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
1719 #ifdef CONFIG_MTRR
1720 if (mtrr) {
1721 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
1722 ACCESS_FBINFO(mtrr.vram_valid) = 1;
1723 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1724 }
1725 #endif /* CONFIG_MTRR */
1726
1727 if (!ACCESS_FBINFO(devflags.novga))
1728 request_region(0x3C0, 32, "matrox");
1729 matroxfb_g450_connect(PMINFO2);
1730 ACCESS_FBINFO(hw_switch->reset(PMINFO2));
1731
1732 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
1733 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
1734 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
1735 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
1736 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
1737
1738 /* static settings */
1739 vesafb_defined.red = colors[depth-1].red;
1740 vesafb_defined.green = colors[depth-1].green;
1741 vesafb_defined.blue = colors[depth-1].blue;
1742 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1743 vesafb_defined.grayscale = grayscale;
1744 vesafb_defined.vmode = 0;
1745 if (noaccel)
1746 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1747
1748 ACCESS_FBINFO(fbops) = matroxfb_ops;
1749 ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
1750 ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
1751 /* after __init time we are like module... no logo */
1752 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1753 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
1754 fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
1755
1756 #ifndef MODULE
1757 /* mode database is marked __init!!! */
1758 if (!hotplug) {
1759 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
1760 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1761 }
1762 #endif /* !MODULE */
1763
1764 /* mode modifiers */
1765 if (hslen)
1766 vesafb_defined.hsync_len = hslen;
1767 if (vslen)
1768 vesafb_defined.vsync_len = vslen;
1769 if (left != ~0)
1770 vesafb_defined.left_margin = left;
1771 if (right != ~0)
1772 vesafb_defined.right_margin = right;
1773 if (upper != ~0)
1774 vesafb_defined.upper_margin = upper;
1775 if (lower != ~0)
1776 vesafb_defined.lower_margin = lower;
1777 if (xres)
1778 vesafb_defined.xres = xres;
1779 if (yres)
1780 vesafb_defined.yres = yres;
1781 if (sync != -1)
1782 vesafb_defined.sync = sync;
1783 else if (vesafb_defined.sync == ~0) {
1784 vesafb_defined.sync = 0;
1785 if (yres < 400)
1786 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1787 else if (yres < 480)
1788 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1789 }
1790
1791 /* fv, fh, maxclk limits was specified */
1792 {
1793 unsigned int tmp;
1794
1795 if (fv) {
1796 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1797 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1798 if ((tmp < fh) || (fh == 0)) fh = tmp;
1799 }
1800 if (fh) {
1801 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1802 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1803 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1804 }
1805 tmp = (maxclk + 499) / 500;
1806 if (tmp) {
1807 tmp = (2000000000 + tmp) / tmp;
1808 if (tmp > pixclock) pixclock = tmp;
1809 }
1810 }
1811 if (pixclock) {
1812 if (pixclock < 2000) /* > 500MHz */
1813 pixclock = 4000; /* 250MHz */
1814 if (pixclock > 1000000)
1815 pixclock = 1000000; /* 1MHz */
1816 vesafb_defined.pixclock = pixclock;
1817 }
1818
1819 /* FIXME: Where to move this?! */
1820 #if defined(CONFIG_PPC_PMAC)
1821 #ifndef MODULE
1822 if (_machine == _MACH_Pmac) {
1823 struct fb_var_screeninfo var;
1824 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1825 default_vmode = VMODE_640_480_60;
1826 #ifdef CONFIG_NVRAM
1827 if (default_cmode == CMODE_NVRAM)
1828 default_cmode = nvram_read_byte(NV_CMODE);
1829 #endif
1830 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1831 default_cmode = CMODE_8;
1832 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1833 var.accel_flags = vesafb_defined.accel_flags;
1834 var.xoffset = var.yoffset = 0;
1835 /* Note: mac_vmode_to_var() does not set all parameters */
1836 vesafb_defined = var;
1837 }
1838 }
1839 #endif /* !MODULE */
1840 #endif /* CONFIG_PPC_PMAC */
1841 vesafb_defined.xres_virtual = vesafb_defined.xres;
1842 if (nopan) {
1843 vesafb_defined.yres_virtual = vesafb_defined.yres;
1844 } else {
1845 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1846 to yres_virtual * xres_virtual < 2^32 */
1847 }
1848 matroxfb_init_fix(PMINFO2);
1849 /* Normalize values (namely yres_virtual) */
1850 matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon));
1851 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1852 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1853 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1854 * anyway. But we at least tried... */
1855 ACCESS_FBINFO(fbcon.var) = vesafb_defined;
1856 err = -EINVAL;
1857
1858 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1859 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1860 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1861 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1862 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
1863
1864 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1865 * and we do not want currcon == 0 for subsequent framebuffers */
1866
1867 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
1868 goto failVideoIO;
1869 }
1870 printk("fb%d: %s frame buffer device\n",
1871 ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
1872 if (ACCESS_FBINFO(fbcon.currcon) < 0) {
1873 /* there is no console on this fb... but we have to initialize hardware
1874 * until someone tells me what is proper thing to do */
1875 printk(KERN_INFO "fb%d: initializing hardware\n",
1876 ACCESS_FBINFO(fbcon.node));
1877 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1878 * already before, so register_framebuffer works correctly. */
1879 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1880 fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
1881 }
1882 return 0;
1883 failVideoIO:;
1884 matroxfb_g450_shutdown(PMINFO2);
1885 mga_iounmap(ACCESS_FBINFO(video.vbase));
1886 failCtrlIO:;
1887 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
1888 failVideoMR:;
1889 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
1890 failCtrlMR:;
1891 release_mem_region(ctrlptr_phys, 16384);
1892 fail:;
1893 return err;
1894 }
1895
1896 LIST_HEAD(matroxfb_list);
1897 LIST_HEAD(matroxfb_driver_list);
1898
1899 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1900 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1901 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1902 struct matrox_fb_info* minfo;
1903
1904 list_add(&drv->node, &matroxfb_driver_list);
1905 for (minfo = matroxfb_l(matroxfb_list.next);
1906 minfo != matroxfb_l(&matroxfb_list);
1907 minfo = matroxfb_l(minfo->next_fb.next)) {
1908 void* p;
1909
1910 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1911 continue;
1912 p = drv->probe(minfo);
1913 if (p) {
1914 minfo->drivers_data[minfo->drivers_count] = p;
1915 minfo->drivers[minfo->drivers_count++] = drv;
1916 }
1917 }
1918 return 0;
1919 }
1920
1921 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1922 struct matrox_fb_info* minfo;
1923
1924 list_del(&drv->node);
1925 for (minfo = matroxfb_l(matroxfb_list.next);
1926 minfo != matroxfb_l(&matroxfb_list);
1927 minfo = matroxfb_l(minfo->next_fb.next)) {
1928 int i;
1929
1930 for (i = 0; i < minfo->drivers_count; ) {
1931 if (minfo->drivers[i] == drv) {
1932 if (drv && drv->remove)
1933 drv->remove(minfo, minfo->drivers_data[i]);
1934 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1935 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1936 } else
1937 i++;
1938 }
1939 }
1940 }
1941
1942 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1943 struct matroxfb_driver* drv;
1944 int i = 0;
1945 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
1946 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1947 drv != matroxfb_driver_l(&matroxfb_driver_list);
1948 drv = matroxfb_driver_l(drv->node.next)) {
1949 if (drv && drv->probe) {
1950 void *p = drv->probe(minfo);
1951 if (p) {
1952 minfo->drivers_data[i] = p;
1953 minfo->drivers[i++] = drv;
1954 if (i == MATROXFB_MAX_FB_DRIVERS)
1955 break;
1956 }
1957 }
1958 }
1959 minfo->drivers_count = i;
1960 }
1961
1962 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1963 int i;
1964
1965 list_del(&ACCESS_FBINFO(next_fb));
1966 for (i = 0; i < minfo->drivers_count; i++) {
1967 struct matroxfb_driver* drv = minfo->drivers[i];
1968
1969 if (drv && drv->remove)
1970 drv->remove(minfo, minfo->drivers_data[i]);
1971 }
1972 }
1973
1974 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
1975 struct board* b;
1976 u_int8_t rev;
1977 u_int16_t svid;
1978 u_int16_t sid;
1979 struct matrox_fb_info* minfo;
1980 int err;
1981 u_int32_t cmd;
1982 #ifndef CONFIG_FB_MATROX_MULTIHEAD
1983 static int registered = 0;
1984 #endif
1985 DBG(__FUNCTION__)
1986
1987 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
1988 svid = pdev->subsystem_vendor;
1989 sid = pdev->subsystem_device;
1990 for (b = dev_list; b->vendor; b++) {
1991 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < rev)) continue;
1992 if (b->svid)
1993 if ((b->svid != svid) || (b->sid != sid)) continue;
1994 break;
1995 }
1996 /* not match... */
1997 if (!b->vendor)
1998 return -1;
1999 if (dev > 0) {
2000 /* not requested one... */
2001 dev--;
2002 return -1;
2003 }
2004 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2005 if (pci_enable_device(pdev)) {
2006 return -1;
2007 }
2008
2009 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2010 minfo = (struct matrox_fb_info*)kmalloc(sizeof(*minfo), GFP_KERNEL);
2011 if (!minfo)
2012 return -1;
2013 #else
2014 if (registered) /* singlehead driver... */
2015 return -1;
2016 minfo = &matroxfb_global_mxinfo;
2017 #endif
2018 memset(MINFO, 0, sizeof(*MINFO));
2019
2020 ACCESS_FBINFO(pcidev) = pdev;
2021 ACCESS_FBINFO(dead) = 0;
2022 ACCESS_FBINFO(usecount) = 0;
2023 ACCESS_FBINFO(userusecount) = 0;
2024
2025 pci_set_drvdata(pdev, MINFO);
2026 /* DEVFLAGS */
2027 ACCESS_FBINFO(devflags.memtype) = memtype;
2028 if (memtype != -1)
2029 noinit = 0;
2030 if (cmd & PCI_COMMAND_MEMORY) {
2031 ACCESS_FBINFO(devflags.novga) = novga;
2032 ACCESS_FBINFO(devflags.nobios) = nobios;
2033 ACCESS_FBINFO(devflags.noinit) = noinit;
2034 /* subsequent heads always needs initialization and must not enable BIOS */
2035 novga = 1;
2036 nobios = 1;
2037 noinit = 0;
2038 } else {
2039 ACCESS_FBINFO(devflags.novga) = 1;
2040 ACCESS_FBINFO(devflags.nobios) = 1;
2041 ACCESS_FBINFO(devflags.noinit) = 0;
2042 }
2043
2044 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
2045 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
2046 ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
2047 ACCESS_FBINFO(devflags.sgram) = sgram;
2048 ACCESS_FBINFO(capable.cross4MB) = cross4MB;
2049
2050 spin_lock_init(&ACCESS_FBINFO(lock.DAC));
2051 spin_lock_init(&ACCESS_FBINFO(lock.accel));
2052 init_rwsem(&ACCESS_FBINFO(crtc2.lock));
2053 init_rwsem(&ACCESS_FBINFO(altout.lock));
2054 ACCESS_FBINFO(irq_flags) = 0;
2055 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
2056 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
2057 ACCESS_FBINFO(crtc1.panpos) = -1;
2058
2059 err = initMatrox2(PMINFO b);
2060 if (!err) {
2061 #ifndef CONFIG_FB_MATROX_MULTIHEAD
2062 registered = 1;
2063 #endif
2064 matroxfb_register_device(MINFO);
2065 return 0;
2066 }
2067 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2068 kfree(minfo);
2069 #endif
2070 return -1;
2071 }
2072
2073 static void pci_remove_matrox(struct pci_dev* pdev) {
2074 struct matrox_fb_info* minfo;
2075
2076 minfo = pci_get_drvdata(pdev);
2077 matroxfb_remove(PMINFO 1);
2078 }
2079
2080 static struct pci_device_id matroxfb_devices[] = {
2081 #ifdef CONFIG_FB_MATROX_MILLENIUM
2082 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2083 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2084 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2085 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2086 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2087 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2088 #endif
2089 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2090 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2091 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2092 #endif
2093 #ifdef CONFIG_FB_MATROX_G100
2094 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2095 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2096 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2097 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2098 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2099 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2100 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2101 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2102 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2103 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2104 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2105 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2106 #endif
2107 {0, 0,
2108 0, 0, 0, 0, 0}
2109 };
2110
2111 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2112
2113
2114 static struct pci_driver matroxfb_driver = {
2115 .name = "matroxfb",
2116 .id_table = matroxfb_devices,
2117 .probe = matroxfb_probe,
2118 .remove = pci_remove_matrox,
2119 };
2120
2121 /* **************************** init-time only **************************** */
2122
2123 #define RSResolution(X) ((X) & 0x0F)
2124 #define RS640x400 1
2125 #define RS640x480 2
2126 #define RS800x600 3
2127 #define RS1024x768 4
2128 #define RS1280x1024 5
2129 #define RS1600x1200 6
2130 #define RS768x576 7
2131 #define RS960x720 8
2132 #define RS1152x864 9
2133 #define RS1408x1056 10
2134 #define RS640x350 11
2135 #define RS1056x344 12 /* 132 x 43 text */
2136 #define RS1056x400 13 /* 132 x 50 text */
2137 #define RS1056x480 14 /* 132 x 60 text */
2138 #define RSNoxNo 15
2139 /* 10-FF */
2140 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2141 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2142 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2143 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2144 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2145 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2146 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2147 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2148 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2149 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2150 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2151 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2152 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2153 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2154 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2155 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2156 };
2157
2158 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2159 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2160 /* default must be first */
2161 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2162 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2163 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2164 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2165 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2166 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2167 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2168 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2169 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2170 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2171 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2172 { 0x110, RSCreate(RS640x480, RS15bpp) },
2173 { 0x181, RSCreate(RS768x576, RS15bpp) },
2174 { 0x113, RSCreate(RS800x600, RS15bpp) },
2175 { 0x189, RSCreate(RS960x720, RS15bpp) },
2176 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2177 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2178 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2179 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2180 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2181 { 0x111, RSCreate(RS640x480, RS16bpp) },
2182 { 0x182, RSCreate(RS768x576, RS16bpp) },
2183 { 0x114, RSCreate(RS800x600, RS16bpp) },
2184 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2185 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2186 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2187 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2188 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2189 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2190 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2191 { 0x184, RSCreate(RS768x576, RS24bpp) },
2192 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2193 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2194 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2195 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2196 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2197 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2198 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2199 { 0x112, RSCreate(RS640x480, RS32bpp) },
2200 { 0x183, RSCreate(RS768x576, RS32bpp) },
2201 { 0x115, RSCreate(RS800x600, RS32bpp) },
2202 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2203 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2204 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2205 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2206 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2207 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2208 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2209 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2210 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2211 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2212 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2213 { 0, 0 }};
2214
2215 static void __init matroxfb_init_params(void) {
2216 /* fh from kHz to Hz */
2217 if (fh < 1000)
2218 fh *= 1000; /* 1kHz minimum */
2219 /* maxclk */
2220 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2221 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2222 /* fix VESA number */
2223 if (vesa != ~0)
2224 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2225
2226 /* static settings */
2227 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2228 if (RSptr->vesa == vesa) break;
2229 }
2230 if (!RSptr->vesa) {
2231 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2232 RSptr = vesamap;
2233 }
2234 {
2235 int res = RSResolution(RSptr->info)-1;
2236 if (left == ~0)
2237 left = timmings[res].left;
2238 if (!xres)
2239 xres = timmings[res].xres;
2240 if (right == ~0)
2241 right = timmings[res].right;
2242 if (!hslen)
2243 hslen = timmings[res].hslen;
2244 if (upper == ~0)
2245 upper = timmings[res].upper;
2246 if (!yres)
2247 yres = timmings[res].yres;
2248 if (lower == ~0)
2249 lower = timmings[res].lower;
2250 if (!vslen)
2251 vslen = timmings[res].vslen;
2252 if (!(fv||fh||maxclk||pixclock))
2253 fv = timmings[res].vfreq;
2254 if (depth == -1)
2255 depth = RSDepth(RSptr->info);
2256 }
2257 }
2258
2259 static void __init matrox_init(void) {
2260 matroxfb_init_params();
2261 pci_register_driver(&matroxfb_driver);
2262 dev = -1; /* accept all new devices... */
2263 }
2264
2265 /* **************************** exit-time only **************************** */
2266
2267 static void __exit matrox_done(void) {
2268 pci_unregister_driver(&matroxfb_driver);
2269 }
2270
2271 #ifndef MODULE
2272
2273 /* ************************* init in-kernel code ************************** */
2274
2275 int __init matroxfb_setup(char *options) {
2276 char *this_opt;
2277
2278 DBG(__FUNCTION__)
2279
2280 if (!options || !*options)
2281 return 0;
2282
2283 while ((this_opt = strsep(&options, ",")) != NULL) {
2284 if (!*this_opt) continue;
2285
2286 dprintk("matroxfb_setup: option %s\n", this_opt);
2287
2288 if (!strncmp(this_opt, "dev:", 4))
2289 dev = simple_strtoul(this_opt+4, NULL, 0);
2290 else if (!strncmp(this_opt, "depth:", 6)) {
2291 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2292 case 0: depth = RSText; break;
2293 case 4: depth = RS4bpp; break;
2294 case 8: depth = RS8bpp; break;
2295 case 15:depth = RS15bpp; break;
2296 case 16:depth = RS16bpp; break;
2297 case 24:depth = RS24bpp; break;
2298 case 32:depth = RS32bpp; break;
2299 default:
2300 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2301 }
2302 } else if (!strncmp(this_opt, "xres:", 5))
2303 xres = simple_strtoul(this_opt+5, NULL, 0);
2304 else if (!strncmp(this_opt, "yres:", 5))
2305 yres = simple_strtoul(this_opt+5, NULL, 0);
2306 else if (!strncmp(this_opt, "vslen:", 6))
2307 vslen = simple_strtoul(this_opt+6, NULL, 0);
2308 else if (!strncmp(this_opt, "hslen:", 6))
2309 hslen = simple_strtoul(this_opt+6, NULL, 0);
2310 else if (!strncmp(this_opt, "left:", 5))
2311 left = simple_strtoul(this_opt+5, NULL, 0);
2312 else if (!strncmp(this_opt, "right:", 6))
2313 right = simple_strtoul(this_opt+6, NULL, 0);
2314 else if (!strncmp(this_opt, "upper:", 6))
2315 upper = simple_strtoul(this_opt+6, NULL, 0);
2316 else if (!strncmp(this_opt, "lower:", 6))
2317 lower = simple_strtoul(this_opt+6, NULL, 0);
2318 else if (!strncmp(this_opt, "pixclock:", 9))
2319 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2320 else if (!strncmp(this_opt, "sync:", 5))
2321 sync = simple_strtoul(this_opt+5, NULL, 0);
2322 else if (!strncmp(this_opt, "vesa:", 5))
2323 vesa = simple_strtoul(this_opt+5, NULL, 0);
2324 else if (!strncmp(this_opt, "maxclk:", 7))
2325 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2326 else if (!strncmp(this_opt, "fh:", 3))
2327 fh = simple_strtoul(this_opt+3, NULL, 0);
2328 else if (!strncmp(this_opt, "fv:", 3))
2329 fv = simple_strtoul(this_opt+3, NULL, 0);
2330 else if (!strncmp(this_opt, "mem:", 4))
2331 mem = simple_strtoul(this_opt+4, NULL, 0);
2332 else if (!strncmp(this_opt, "mode:", 5))
2333 strlcpy(videomode, this_opt+5, sizeof(videomode));
2334 else if (!strncmp(this_opt, "outputs:", 8))
2335 strlcpy(outputs, this_opt+8, sizeof(outputs));
2336 else if (!strncmp(this_opt, "dfp:", 4)) {
2337 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2338 dfp = 1;
2339 }
2340 #ifdef CONFIG_PPC_PMAC
2341 else if (!strncmp(this_opt, "vmode:", 6)) {
2342 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2343 if (vmode > 0 && vmode <= VMODE_MAX)
2344 default_vmode = vmode;
2345 } else if (!strncmp(this_opt, "cmode:", 6)) {
2346 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2347 switch (cmode) {
2348 case 0:
2349 case 8:
2350 default_cmode = CMODE_8;
2351 break;
2352 case 15:
2353 case 16:
2354 default_cmode = CMODE_16;
2355 break;
2356 case 24:
2357 case 32:
2358 default_cmode = CMODE_32;
2359 break;
2360 }
2361 }
2362 #endif
2363 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2364 disabled = 1;
2365 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2366 disabled = 0;
2367 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2368 sgram = 1;
2369 else if (!strcmp(this_opt, "sdram"))
2370 sgram = 0;
2371 else if (!strncmp(this_opt, "memtype:", 8))
2372 memtype = simple_strtoul(this_opt+8, NULL, 0);
2373 else {
2374 int value = 1;
2375
2376 if (!strncmp(this_opt, "no", 2)) {
2377 value = 0;
2378 this_opt += 2;
2379 }
2380 if (! strcmp(this_opt, "inverse"))
2381 inverse = value;
2382 else if (!strcmp(this_opt, "accel"))
2383 noaccel = !value;
2384 else if (!strcmp(this_opt, "pan"))
2385 nopan = !value;
2386 else if (!strcmp(this_opt, "pciretry"))
2387 no_pci_retry = !value;
2388 else if (!strcmp(this_opt, "vga"))
2389 novga = !value;
2390 else if (!strcmp(this_opt, "bios"))
2391 nobios = !value;
2392 else if (!strcmp(this_opt, "init"))
2393 noinit = !value;
2394 #ifdef CONFIG_MTRR
2395 else if (!strcmp(this_opt, "mtrr"))
2396 mtrr = value;
2397 #endif
2398 else if (!strcmp(this_opt, "inv24"))
2399 inv24 = value;
2400 else if (!strcmp(this_opt, "cross4MB"))
2401 cross4MB = value;
2402 else if (!strcmp(this_opt, "grayscale"))
2403 grayscale = value;
2404 else if (!strcmp(this_opt, "dfp"))
2405 dfp = value;
2406 else {
2407 strlcpy(videomode, this_opt, sizeof(videomode));
2408 }
2409 }
2410 }
2411 return 0;
2412 }
2413
2414 static int __initdata initialized = 0;
2415
2416 int __init matroxfb_init(void)
2417 {
2418 char *option = NULL;
2419
2420 DBG(__FUNCTION__)
2421
2422 if (fb_get_options("matroxfb", &option))
2423 return -ENODEV;
2424 matroxfb_setup(option);
2425
2426 if (disabled)
2427 return -ENXIO;
2428 if (!initialized) {
2429 initialized = 1;
2430 matrox_init();
2431 }
2432 hotplug = 1;
2433 /* never return failure, user can hotplug matrox later... */
2434 return 0;
2435 }
2436
2437 module_init(matroxfb_init);
2438
2439 #else
2440
2441 /* *************************** init module code **************************** */
2442
2443 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2444 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2445 MODULE_LICENSE("GPL");
2446
2447 MODULE_PARM(mem, "i");
2448 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2449 MODULE_PARM(disabled, "i");
2450 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2451 MODULE_PARM(noaccel, "i");
2452 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2453 MODULE_PARM(nopan, "i");
2454 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2455 MODULE_PARM(no_pci_retry, "i");
2456 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2457 MODULE_PARM(novga, "i");
2458 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2459 MODULE_PARM(nobios, "i");
2460 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2461 MODULE_PARM(noinit, "i");
2462 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2463 MODULE_PARM(memtype, "i");
2464 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2465 MODULE_PARM(mtrr, "i");
2466 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2467 MODULE_PARM(sgram, "i");
2468 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2469 MODULE_PARM(inv24, "i");
2470 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2471 MODULE_PARM(inverse, "i");
2472 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2473 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2474 MODULE_PARM(dev, "i");
2475 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2476 #else
2477 MODULE_PARM(dev, "i");
2478 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
2479 #endif
2480 MODULE_PARM(vesa, "i");
2481 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2482 MODULE_PARM(xres, "i");
2483 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2484 MODULE_PARM(yres, "i");
2485 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2486 MODULE_PARM(upper, "i");
2487 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2488 MODULE_PARM(lower, "i");
2489 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2490 MODULE_PARM(vslen, "i");
2491 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2492 MODULE_PARM(left, "i");
2493 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2494 MODULE_PARM(right, "i");
2495 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2496 MODULE_PARM(hslen, "i");
2497 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2498 MODULE_PARM(pixclock, "i");
2499 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2500 MODULE_PARM(sync, "i");
2501 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2502 MODULE_PARM(depth, "i");
2503 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2504 MODULE_PARM(maxclk, "i");
2505 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2506 MODULE_PARM(fh, "i");
2507 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2508 MODULE_PARM(fv, "i");
2509 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2510 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n");
2511 MODULE_PARM(grayscale, "i");
2512 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2513 MODULE_PARM(cross4MB, "i");
2514 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2515 MODULE_PARM(dfp, "i");
2516 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2517 MODULE_PARM(dfp_type, "i");
2518 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2519 MODULE_PARM(outputs, "c8");
2520 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2521 #ifdef CONFIG_PPC_PMAC
2522 MODULE_PARM(vmode, "i");
2523 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2524 MODULE_PARM(cmode, "i");
2525 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2526 #endif
2527
2528 int __init init_module(void){
2529
2530 DBG(__FUNCTION__)
2531
2532 if (disabled)
2533 return -ENXIO;
2534
2535 if (depth == 0)
2536 depth = RSText;
2537 else if (depth == 4)
2538 depth = RS4bpp;
2539 else if (depth == 8)
2540 depth = RS8bpp;
2541 else if (depth == 15)
2542 depth = RS15bpp;
2543 else if (depth == 16)
2544 depth = RS16bpp;
2545 else if (depth == 24)
2546 depth = RS24bpp;
2547 else if (depth == 32)
2548 depth = RS32bpp;
2549 else if (depth != -1) {
2550 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2551 depth = -1;
2552 }
2553 matrox_init();
2554 /* never return failure; user can hotplug matrox later... */
2555 return 0;
2556 }
2557 #endif /* MODULE */
2558
2559 module_exit(matrox_done);
2560 EXPORT_SYMBOL(matroxfb_register_driver);
2561 EXPORT_SYMBOL(matroxfb_unregister_driver);
2562 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2563 EXPORT_SYMBOL(matroxfb_enable_irq);
2564
2565 /*
2566 * Overrides for Emacs so that we follow Linus's tabbing style.
2567 * ---------------------------------------------------------------------------
2568 * Local variables:
2569 * c-basic-offset: 8
2570 * End:
2571 */
2572
MOXA 2.6.9 from sdlinux-moxaart.tgz