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MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / drivers / video / pm3fb.c
blobc8b16d86c3cfb01755a178b1cd77e1c28d42e8e7
1 /*
2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
3 *
4 * Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
5 * Based on code written by:
6 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
7 * Alan Hourihane, <alanh@fairlite.demon.co.uk>
8 * Russel King, <rmk@arm.linux.org.uk>
9 * Based on linux/drivers/video/skeletonfb.c:
10 * Copyright (C) 1997 Geert Uytterhoeven
11 * Based on linux/driver/video/pm2fb.c:
12 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
13 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 *
19 * $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $
20 *
21 * CHANGELOG:
22 * Mon Feb 11 10:35:48 MET 2002, v 1.4.11B: Cosmetic update.
23 * Wed Jan 23 14:16:59 MET 2002, v 1.4.11: Preliminary 2.5.x support, patch for 2.5.2.
24 * Wed Nov 28 11:08:29 MET 2001, v 1.4.10: potential bug fix for SDRAM-based board, patch for 2.4.16.
25 * Thu Sep 20 10:24:42 MET DST 2001, v 1.4.9: sync bug fix, preliminary flatpanel support, better timings.
26 * Tue Aug 28 10:13:01 MET DST 2001, v 1.4.8: memory timings check, minor bug fixes.
27 * Wed Jul 18 19:06:14 CEST 2001, v 1.4.7: Mode fix (800x600-100, 1024x768-100 changed), using HW panning + accel bug fix.
28 * Mon Jun 25 10:33:56 MET DST 2001, v 1.4.6: Depth 12 fix, chip reset ioctl, moved memory erase ioctl to DEBUG.
29 * Wed Jun 20 11:13:08 MET DST 2001, v 1.4.5: Fixed missing blinking cursor in 8bpp, code cleaning, memory erase IOCTL.
30 * Mon Jun 18 16:00:27 CEST 2001, v 1.4.4: Depth 12 (RGBA 4444) support, code cleaning.
31 * Fri Jun 15 13:53:01 CEST 2001, v 1.4.3: Removed warnings, depth 15 support, add 'depth' option.
32 * Thu Jun 14 10:13:52 MET DST 2001, v 1.4.2: Fixed depth switching bug, preliminary 15bpp (RGB5551) support.
33 * Thu Apr 12 11:16:45 MET DST 2001, v 1.4.1B: Doc updates.
34 * Fri Apr 6 11:12:53 MET DST 2001, v 1.4.1: Configure.help, minor cleanup
35 * Thu Mar 29 10:56:50 MET DST 2001, v 1.4.0: Module & module options support (note: linux patch changed, 2.2.19 added).
36 * Thu Mar 15 15:30:31 MET 2001, v 1.3.2: Fixed mirroring bug on little-endian.
37 * Wed Mar 14 21:25:54 CET 2001, v 1.3.1: Fixed bug in BlockMove (_bmov).
38 * Tue Mar 13 10:53:19 MET 2001, v 1.3.0: Character drawing hardware support (in all width between 1 and 16), fixes.
39 * Thu Mar 8 10:20:16 MET 2001, v 1.2.2: Better J2000 support, "font:" option.
40 * Tue Mar 6 21:25:04 CET 2001, v 1.2.1: Better acceleration support.
41 * Mon Mar 5 21:54:17 CET 2001, v 1.2.0: Partial acceleration support (clear & bmove)
42 * Mon Mar 5 12:52:15 CET 2001, v 1.1.3: Big pan_display fix.
43 * Sun Mar 4 22:21:50 CET 2001, v 1.1.2: (numerous) bug fixes.
44 * Fri Mar 2 15:54:07 CET 2001, v 1.1.1: Might have Appian J2000 support, resource mangement in 2.4
45 * Wed Feb 28 18:21:35 CET 2001, v 1.1.0: Might have multiple boards support (added, but not yest tested)
46 * Tue Feb 27 17:31:12 CET 2001, v 1.0.6: fixes boot-time mode select, add more default mode
47 * Tue Feb 27 14:01:36 CET 2001, v 1.0.5: fixes (1.0.4 was broken for 2.2), cleaning up
48 * Mon Feb 26 23:17:36 CET 2001, v 1.0.4: preliminary 2.4.x support, dropped (useless on pm3) partial product, more OF fix
49 * Mon Feb 26 20:59:05 CET 2001, v 1.0.3: No more shadow register (and wasted memory), endianess fix, use OF-preset resolution by default
50 * Wed Feb 21 22:09:30 CET 2001, v 1.0.2: Code cleaning for future multiboard support, better OF support, bugs fix
51 * Wed Feb 21 19:58:56 CET 2001, v 1.0.1: OpenFirmware support, fixed memory detection, better debug support, code cleaning
52 * Wed Feb 21 14:47:06 CET 2001, v 1.0.0: First working version
53 */
54
55 #include <linux/config.h>
56 #include <linux/module.h>
57 #include <linux/kernel.h>
58 #include <linux/errno.h>
59 #include <linux/string.h>
60 #include <linux/mm.h>
61 #include <linux/tty.h>
62 #include <linux/slab.h>
63 #include <linux/vmalloc.h>
64 #include <linux/delay.h>
65 #include <linux/interrupt.h>
66 #include <linux/fb.h>
67 #include <linux/init.h>
68 #include <linux/pci.h>
69 #include <linux/ioport.h>
70
71 #include <video/fbcon.h>
72 #include <video/fbcon-mfb.h>
73 #include <video/fbcon-cfb2.h>
74 #include <video/fbcon-cfb4.h>
75 #include <video/fbcon-cfb8.h>
76 #include <video/fbcon-cfb16.h>
77 #include <video/fbcon-cfb24.h>
78 #include <video/fbcon-cfb32.h>
79 #include <video/pm3fb.h>
80
81 #include <asm/io.h>
82 #include <asm/uaccess.h>
83
84 #ifdef CONFIG_FB_OF
85 #include <asm/prom.h>
86 #endif
87
88 /* ************************************* */
89 /* ***** The various "global" data ***** */
90 /* ************************************* */
91
92 /* those will need a rework for multiple board support */
93 /* Driver name */
94 static const char permedia3_name[16] = "Permedia3";
95
96 /* the fb_par struct, mandatory */
97 struct pm3fb_par {
98 u32 pixclock; /* pixclock in KHz */
99
100 u32 width; /* width of virtual screen */
101 u32 height; /* height of virtual screen */
102
103 u32 hsstart; /* horiz. sync start */
104 u32 hsend; /* horiz. sync end */
105 u32 hbend; /* horiz. blank end (also gate end) */
106 u32 htotal; /* total width (w/ sync & blank) */
107
108 u32 vsstart; /* vert. sync start */
109 u32 vsend; /* vert. sync end */
110 u32 vbend; /* vert. blank end */
111 u32 vtotal; /* total height (w/ sync & blank) */
112
113 u32 stride; /* screen stride */
114 u32 base; /* screen base (xoffset+yoffset) in 128 bits unit */
115 /* NOTE : unlike other pm3 stuff above, stored *after* shiftbpp. don't ask */
116 u32 depth; /* screen depth (8, 12, 15, 16 or 32) */
117 u32 video; /* video control (hsync,vsync) */
118 };
119
120 /* memory timings */
121 struct pm3fb_timings
122 {
123 unsigned long caps;
124 unsigned long timings;
125 unsigned long control;
126 unsigned long refresh;
127 unsigned long powerdown;
128 };
129 typedef enum pm3fb_timing_result { pm3fb_timing_ok, pm3fb_timing_problem, pm3fb_timing_retry } pm3fb_timing_result;
130 #define PM3FB_UNKNOWN_TIMING_VALUE ((unsigned long)-1)
131 #define PM3FB_UNKNOWN_TIMINGS { PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE }
132
133 /* the fb_info struct, mandatory */
134 struct pm3fb_info {
135 struct fb_info_gen gen;
136 unsigned long board_num; /* internal board number */
137 unsigned long use_current;
138 struct pm3fb_par *current_par;
139 struct pci_dev *dev; /* PCI device */
140 #ifdef SUPPORT_FB_OF
141 struct device_node *dn; /* OF node for the PCI device */
142 #endif /* SUPPORT_FB_OF */
143 unsigned long board_type; /* index in the cardbase */
144 unsigned char *fb_base; /* framebuffer memory base */
145 u32 fb_size; /* framebuffer memory size */
146 unsigned char *p_fb; /* physical address of frame buffer */
147 unsigned char *v_fb; /* virtual address of frame buffer */
148 unsigned char *pIOBase; /* physical address of registers region, must be rg_base or rg_base+PM2_REGS_SIZE depending on the host endianness */
149 unsigned char *vIOBase; /* address of registers after ioremap() */
150 struct {
151 u8 transp;
152 u8 red;
153 u8 green;
154 u8 blue;
155 } palette[256];
156 union {
157 #ifdef FBCON_HAS_CFB16
158 u16 cmap12[16]; /* RGBA 4444 */
159 u16 cmap15[16]; /* RGBA 5551 */
160 u16 cmap16[16]; /* RGBA 5650 */
161 #endif
162 #ifdef FBCON_HAS_CFB32
163 u32 cmap32[16];
164 #endif
165 } cmap;
166 struct pm3fb_timings memt;
167 };
168
169 /* regular resolution database*/
170 static struct {
171 char name[16];
172 struct pm3fb_par user_mode;
173 } mode_base[] __initdata = {
174 {
175 "default-800x600", {
176 49500, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
177 800, 0, 8,
178 PM3VideoControl_ENABLE |
179 PM3VideoControl_HSYNC_ACTIVE_HIGH
180 |
181 PM3VideoControl_VSYNC_ACTIVE_HIGH
182 | PM3VideoControl_PIXELSIZE_8BIT}}, {
183 "1024x768-74", {
184 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
185 806, 1024, 0, 8,
186 PM3VideoControl_ENABLE |
187 PM3VideoControl_HSYNC_ACTIVE_HIGH
188 |
189 PM3VideoControl_VSYNC_ACTIVE_HIGH
190 | PM3VideoControl_PIXELSIZE_8BIT}}, {
191 "1024x768-74-32", {
192 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
193 806, 1024, 0, 32,
194 PM3VideoControl_ENABLE |
195 PM3VideoControl_HSYNC_ACTIVE_HIGH
196 |
197 PM3VideoControl_VSYNC_ACTIVE_HIGH
198 | PM3VideoControl_PIXELSIZE_32BIT}},
199 /* Generated mode : "1600x1024", for the SGI 1600SW flat panel*/
200 {
201 "SGI1600SW", {
202 108000, 1600, 1024, 16, 56, 104, 1704, 3, 6, 32,
203 1056, 1600, 0, 8,
204 PM3VideoControl_ENABLE|
205 PM3VideoControl_HSYNC_ACTIVE_LOW|PM3VideoControl_VSYNC_ACTIVE_LOW|
206 PM3VideoControl_PIXELSIZE_32BIT}},
207 /* ##### auto-generated mode, by fbtimings2pm3 */
208 /* Generated mode : "640x480-60" */
209 {
210 "640x480-60", {
211 25174, 640, 480, 16, 112, 160, 800, 10, 12, 45,
212 525, 640, 0, 8,
213 PM3VideoControl_ENABLE |
214 PM3VideoControl_HSYNC_ACTIVE_LOW
215 |
216 PM3VideoControl_VSYNC_ACTIVE_LOW
217 | PM3VideoControl_PIXELSIZE_8BIT}},
218 /* Generated mode : "640x480-72" */
219 {
220 "640x480-72", {
221 31199, 640, 480, 24, 64, 192, 832, 9, 12, 40, 520,
222 640, 0, 8,
223 PM3VideoControl_ENABLE |
224 PM3VideoControl_HSYNC_ACTIVE_LOW
225 |
226 PM3VideoControl_VSYNC_ACTIVE_LOW
227 | PM3VideoControl_PIXELSIZE_8BIT}},
228 /* Generated mode : "640x480-75" */
229 {
230 "640x480-75", {
231 31499, 640, 480, 16, 80, 200, 840, 1, 4, 20, 500,
232 640, 0, 8,
233 PM3VideoControl_ENABLE |
234 PM3VideoControl_HSYNC_ACTIVE_LOW
235 |
236 PM3VideoControl_VSYNC_ACTIVE_LOW
237 | PM3VideoControl_PIXELSIZE_8BIT}},
238 /* Generated mode : "640x480-90" */
239 {
240 "640x480-90", {
241 39909, 640, 480, 32, 72, 192, 832, 25, 39, 53, 533,
242 640, 0, 8,
243 PM3VideoControl_ENABLE |
244 PM3VideoControl_HSYNC_ACTIVE_LOW
245 |
246 PM3VideoControl_VSYNC_ACTIVE_LOW
247 | PM3VideoControl_PIXELSIZE_8BIT}},
248 /* Generated mode : "640x480-100" */
249 {
250 "640x480-100", {
251 44899, 640, 480, 32, 160, 208, 848, 22, 34, 51,
252 531, 640, 0, 8,
253 PM3VideoControl_ENABLE |
254 PM3VideoControl_HSYNC_ACTIVE_LOW
255 |
256 PM3VideoControl_VSYNC_ACTIVE_LOW
257 | PM3VideoControl_PIXELSIZE_8BIT}},
258 /* Generated mode : "800x600-48-lace" */
259 /* INTERLACED NOT SUPPORTED
260 {"800x600-48-lace", {35999, 800, 600, 80, 208, 264, 1064, 11, 23, 102, 702, 800, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
261 INTERLACED NOT SUPPORTED */
262 /* Generated mode : "800x600-56" */
263 {
264 "800x600-56", {
265 35999, 800, 600, 24, 96, 224, 1024, 1, 3, 25, 625,
266 800, 0, 8,
267 PM3VideoControl_ENABLE |
268 PM3VideoControl_HSYNC_ACTIVE_HIGH
269 |
270 PM3VideoControl_VSYNC_ACTIVE_HIGH
271 | PM3VideoControl_PIXELSIZE_8BIT}},
272 /* Generated mode : "800x600-60" */
273 {
274 "800x600-60", {
275 40000, 800, 600, 40, 168, 256, 1056, 1, 5, 28, 628,
276 800, 0, 8,
277 PM3VideoControl_ENABLE |
278 PM3VideoControl_HSYNC_ACTIVE_HIGH
279 |
280 PM3VideoControl_VSYNC_ACTIVE_HIGH
281 | PM3VideoControl_PIXELSIZE_8BIT}},
282 /* Generated mode : "800x600-70" */
283 {
284 "800x600-70", {
285 44899, 800, 600, 24, 168, 208, 1008, 9, 21, 36,
286 636, 800, 0, 8,
287 PM3VideoControl_ENABLE |
288 PM3VideoControl_HSYNC_ACTIVE_HIGH
289 |
290 PM3VideoControl_VSYNC_ACTIVE_LOW
291 | PM3VideoControl_PIXELSIZE_8BIT}},
292 /* Generated mode : "800x600-72" */
293 {
294 "800x600-72", {
295 50000, 800, 600, 56, 176, 240, 1040, 37, 43, 66,
296 666, 800, 0, 8,
297 PM3VideoControl_ENABLE |
298 PM3VideoControl_HSYNC_ACTIVE_HIGH
299 |
300 PM3VideoControl_VSYNC_ACTIVE_HIGH
301 | PM3VideoControl_PIXELSIZE_8BIT}},
302 /* Generated mode : "800x600-75" */
303 {
304 "800x600-75", {
305 49497, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
306 800, 0, 8,
307 PM3VideoControl_ENABLE |
308 PM3VideoControl_HSYNC_ACTIVE_HIGH
309 |
310 PM3VideoControl_VSYNC_ACTIVE_HIGH
311 | PM3VideoControl_PIXELSIZE_8BIT}},
312 /* Generated mode : "800x600-90" */
313 {
314 "800x600-90", {
315 56637, 800, 600, 8, 72, 192, 992, 8, 19, 35, 635,
316 800, 0, 8,
317 PM3VideoControl_ENABLE |
318 PM3VideoControl_HSYNC_ACTIVE_HIGH
319 |
320 PM3VideoControl_VSYNC_ACTIVE_HIGH
321 | PM3VideoControl_PIXELSIZE_8BIT}},
322 /* Generated mode : "800x600-100", from /etc/fb.modes */
323 /* DISABLED, hsstart == 0
324 {
325 "800x600-100", {
326 67499, 800, 600, 0, 64, 280, 1080, 7, 11, 25, 625,
327 800, 0, 8,
328 PM3VideoControl_ENABLE |
329 PM3VideoControl_HSYNC_ACTIVE_HIGH
330 |
331 PM3VideoControl_VSYNC_ACTIVE_HIGH
332 | PM3VideoControl_PIXELSIZE_8BIT}},
333 */
334 /* Generated mode : "800x600-100", from ??? */
335 {
336 "800x600-100", {
337 69650, 800, 600, 64, 128, 288, 1088, 4, 10, 40, 640, 800, 0, 8,
338 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
339 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
340 /* Generated mode : "1024x768-43-lace" */
341 /* INTERLACED NOT SUPPORTED
342 {"1024x768-43-lace", {44899, 1024, 768, 8, 184, 240, 1264, 1, 9, 49, 817, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
343 INTERLACED NOT SUPPORTED */
344 /* Generated mode : "1024x768-60" */
345 {
346 "1024x768-60", {
347 64998, 1024, 768, 24, 160, 320, 1344, 3, 9, 38,
348 806, 1024, 0, 8,
349 PM3VideoControl_ENABLE |
350 PM3VideoControl_HSYNC_ACTIVE_LOW
351 |
352 PM3VideoControl_VSYNC_ACTIVE_LOW
353 | PM3VideoControl_PIXELSIZE_8BIT}},
354 /* Generated mode : "1024x768-70" */
355 {
356 "1024x768-70", {
357 74996, 1024, 768, 24, 160, 304, 1328, 3, 9, 38,
358 806, 1024, 0, 8,
359 PM3VideoControl_ENABLE |
360 PM3VideoControl_HSYNC_ACTIVE_LOW
361 |
362 PM3VideoControl_VSYNC_ACTIVE_LOW
363 | PM3VideoControl_PIXELSIZE_8BIT}},
364 /* Generated mode : "1024x768-72" */
365 {
366 "1024x768-72", {
367 74996, 10224, 768, 24, 160, 264, 10488, 3, 9, 38,
368 806, 10224, 0, 8,
369 PM3VideoControl_ENABLE |
370 PM3VideoControl_HSYNC_ACTIVE_LOW
371 |
372 PM3VideoControl_VSYNC_ACTIVE_LOW
373 | PM3VideoControl_PIXELSIZE_8BIT}},
374 /* Generated mode : "1024x768-75" */
375 {
376 "1024x768-75", {
377 78746, 1024, 768, 16, 112, 288, 1312, 1, 4, 32,
378 800, 1024, 0, 8,
379 PM3VideoControl_ENABLE |
380 PM3VideoControl_HSYNC_ACTIVE_HIGH
381 |
382 PM3VideoControl_VSYNC_ACTIVE_HIGH
383 | PM3VideoControl_PIXELSIZE_8BIT}},
384 /* Generated mode : "1024x768-90" */
385 {
386 "1024x768-90", {
387 100000, 1024, 768, 0, 96, 288, 1312, 21, 36, 77,
388 845, 1024, 0, 8,
389 PM3VideoControl_ENABLE |
390 PM3VideoControl_HSYNC_ACTIVE_LOW
391 |
392 PM3VideoControl_VSYNC_ACTIVE_LOW
393 | PM3VideoControl_PIXELSIZE_8BIT}},
394 /* Generated mode : "1024x768-100", from /etc/fb.modes */
395 /* DISABLED, vsstart == 0
396 {
397 "1024x768-100", {
398 109998, 1024, 768, 0, 88, 368, 1392, 0, 8, 24, 792,
399 1024, 0, 8,
400 PM3VideoControl_ENABLE |
401 PM3VideoControl_HSYNC_ACTIVE_LOW
402 |
403 PM3VideoControl_VSYNC_ACTIVE_LOW
404 | PM3VideoControl_PIXELSIZE_8BIT}},
405 */
406 /* Generated mode : "1024x768-100", from ??? */
407 {
408 "1024x768-100", {
409 115500, 1024, 768, 32, 224, 416, 1440, 3, 13, 34, 802, 1024, 0, 8,
410 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
411 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
412 /* Generated mode : "1152x864-43-lace" */
413 /* INTERLACED NOT SUPPORTED
414 {"1152x864-43-lace", {64998, 1152, 864, 72, 200, 264, 1416, 78, 87, 191, 1055, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
415 INTERLACED NOT SUPPORTED */
416 /* Generated mode : "1152x864-47-lace" */
417 /* INTERLACED NOT SUPPORTED
418 {"1152x864-47-lace", {64998, 1152, 864, 88, 216, 296, 1448, 30, 39, 83, 947, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
419 INTERLACED NOT SUPPORTED */
420 /* Generated mode : "1152x864-60" */
421 {
422 "1152x864-60", {
423 80000, 1152, 864, 64, 176, 304, 1456, 6, 11, 52,
424 916, 1152, 0, 8,
425 PM3VideoControl_ENABLE |
426 PM3VideoControl_HSYNC_ACTIVE_HIGH
427 |
428 PM3VideoControl_VSYNC_ACTIVE_HIGH
429 | PM3VideoControl_PIXELSIZE_8BIT}},
430 /* Generated mode : "1152x864-70" */
431 {
432 "1152x864-70", {
433 100000, 1152, 864, 40, 192, 360, 1512, 13, 24, 81,
434 945, 1152, 0, 8,
435 PM3VideoControl_ENABLE |
436 PM3VideoControl_HSYNC_ACTIVE_HIGH
437 |
438 PM3VideoControl_VSYNC_ACTIVE_HIGH
439 | PM3VideoControl_PIXELSIZE_8BIT}},
440 /* Generated mode : "1152x864-75" */
441 {
442 "1152x864-75", {
443 109998, 1152, 864, 24, 168, 312, 1464, 45, 53, 138,
444 1002, 1152, 0, 8,
445 PM3VideoControl_ENABLE |
446 PM3VideoControl_HSYNC_ACTIVE_HIGH
447 |
448 PM3VideoControl_VSYNC_ACTIVE_HIGH
449 | PM3VideoControl_PIXELSIZE_8BIT}},
450 /* Generated mode : "1152x864-80" */
451 {
452 "1152x864-80", {
453 109998, 1152, 864, 16, 128, 288, 1440, 30, 37, 94,
454 958, 1152, 0, 8,
455 PM3VideoControl_ENABLE |
456 PM3VideoControl_HSYNC_ACTIVE_HIGH
457 |
458 PM3VideoControl_VSYNC_ACTIVE_HIGH
459 | PM3VideoControl_PIXELSIZE_8BIT}},
460 /* Generated mode : "1280x1024-43-lace" */
461 /* INTERLACED NOT SUPPORTED
462 {"1280x1024-43-lace", {80000, 1024, 1024, 80, 160, 320, 1344, 50, 60, 125, 1149, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
463 INTERLACED NOT SUPPORTED */
464 /* Generated mode : "1280x1024-47-lace" */
465 /* INTERLACED NOT SUPPORTED
466 {"1280x1024-47-lace", {80000, 1280, 1024, 80, 160, 320, 1600, 1, 11, 29, 1053, 1280, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
467 INTERLACED NOT SUPPORTED */
468 /* Generated mode : "1280x1024-60" */
469 {
470 "1280x1024-60", {
471 107991, 1280, 1024, 48, 160, 408, 1688, 1, 4, 42,
472 1066, 1280, 0, 8,
473 PM3VideoControl_ENABLE |
474 PM3VideoControl_HSYNC_ACTIVE_HIGH
475 |
476 PM3VideoControl_VSYNC_ACTIVE_HIGH
477 | PM3VideoControl_PIXELSIZE_8BIT}},
478 /* Generated mode : "1280x1024-70" */
479 {
480 "1280x1024-70", {
481 125992, 1280, 1024, 80, 192, 408, 1688, 1, 6, 42,
482 1066, 1280, 0, 8,
483 PM3VideoControl_ENABLE |
484 PM3VideoControl_HSYNC_ACTIVE_HIGH
485 |
486 PM3VideoControl_VSYNC_ACTIVE_HIGH
487 | PM3VideoControl_PIXELSIZE_8BIT}},
488 /* Generated mode : "1280x1024-74" */
489 {
490 "1280x1024-74", {
491 134989, 1280, 1024, 32, 176, 432, 1712, 0, 30, 40,
492 1064, 1280, 0, 8,
493 PM3VideoControl_ENABLE |
494 PM3VideoControl_HSYNC_ACTIVE_HIGH
495 |
496 PM3VideoControl_VSYNC_ACTIVE_HIGH
497 | PM3VideoControl_PIXELSIZE_8BIT}},
498 /* Generated mode : "1280x1024-75" */
499 {
500 "1280x1024-75", {
501 134989, 1280, 1024, 16, 160, 408, 1688, 1, 4, 42,
502 1066, 1280, 0, 8,
503 PM3VideoControl_ENABLE |
504 PM3VideoControl_HSYNC_ACTIVE_HIGH
505 |
506 PM3VideoControl_VSYNC_ACTIVE_HIGH
507 | PM3VideoControl_PIXELSIZE_8BIT}},
508 /* Generated mode : "1600x1200-60" */
509 {
510 "1600x1200-60", {
511 155981, 1600, 1200, 32, 192, 448, 2048, 10, 18, 70,
512 1270, 1600, 0, 8,
513 PM3VideoControl_ENABLE |
514 PM3VideoControl_HSYNC_ACTIVE_LOW
515 |
516 PM3VideoControl_VSYNC_ACTIVE_LOW
517 | PM3VideoControl_PIXELSIZE_8BIT}},
518 /* Generated mode : "1600x1200-66" */
519 {
520 "1600x1200-66", {
521 171998, 1600, 1200, 40, 176, 480, 2080, 3, 6, 53,
522 1253, 1600, 0, 8,
523 PM3VideoControl_ENABLE |
524 PM3VideoControl_HSYNC_ACTIVE_LOW
525 |
526 PM3VideoControl_VSYNC_ACTIVE_LOW
527 | PM3VideoControl_PIXELSIZE_8BIT}},
528 /* Generated mode : "1600x1200-76" */
529 {
530 "1600x1200-76", {
531 197980, 1600, 1200, 40, 176, 480, 2080, 3, 8, 50,
532 1250, 1600, 0, 8,
533 PM3VideoControl_ENABLE |
534 PM3VideoControl_HSYNC_ACTIVE_LOW
535 |
536 PM3VideoControl_VSYNC_ACTIVE_LOW
537 | PM3VideoControl_PIXELSIZE_8BIT}},
538 /* ##### end of auto-generated mode */
539 {
540 "\0",}
541 };
542
543 /* more mandatory stuff (see skeletonfb.c + framebuffer driver HOWTO */
544 static struct pm3fb_info fb_info[PM3_MAX_BOARD];
545 static struct pm3fb_par current_par[PM3_MAX_BOARD];
546 static int current_par_valid[PM3_MAX_BOARD];
547 /* to allow explicit filtering of board */
548 short bus[PM3_MAX_BOARD];
549 short slot[PM3_MAX_BOARD];
550 short func[PM3_MAX_BOARD];
551 short disable[PM3_MAX_BOARD];
552 short noaccel[PM3_MAX_BOARD];
553 char fontn[PM3_MAX_BOARD][PM3_FONTNAME_SIZE];
554 short depth[PM3_MAX_BOARD];
555 short flatpanel[PM3_MAX_BOARD];
556 static struct display disp[PM3_MAX_BOARD];
557 static char g_options[PM3_OPTIONS_SIZE] __initdata = "pm3fb,dummy";
558 short printtimings = 0;
559 short forcesize[PM3_MAX_BOARD];
560
561 /* ********************* */
562 /* ***** prototype ***** */
563 /* ********************* */
564 /* card-specific */
565 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info);
566 /* permedia3-specific */
567 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info);
568 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info);
569 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info);
570 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
571 unsigned long r);
572 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
573 unsigned long refclock, /* In kHz units */
574 unsigned char *prescale, /* ClkPreScale */
575 unsigned char *feedback, /* ClkFeedBackScale */
576 unsigned char *postscale
577 /* ClkPostScale */ );
578 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc);
579 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b);
580 static void pm3fb_common_init(struct pm3fb_info *l_fb_info);
581 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
582 unsigned long depth, int v);
583 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
584 unsigned long depth, int v);
585 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info);
586 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info);
587 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
588 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info);
589 #endif
590 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info);
591 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info);
592 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
593 struct pm3fb_par *curpar);
594 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info);
595 /* accelerated permedia3-specific */
596 #ifdef PM3FB_USE_ACCEL
597 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info);
598 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info);
599 #ifdef FBCON_HAS_CFB32
600 static void pm3fb_cfb32_clear(struct vc_data *conp,
601 struct display *p,
602 int sy, int sx, int height, int width);
603 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
604 struct display *p, int bottom_only);
605 #endif /* FBCON_HAS_CFB32 */
606 #ifdef FBCON_HAS_CFB16
607 static void pm3fb_cfb16_clear(struct vc_data *conp,
608 struct display *p,
609 int sy, int sx, int height, int width);
610 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
611 struct display *p, int bottom_only);
612 #endif /* FBCON_HAS_CFB16 */
613 #ifdef FBCON_HAS_CFB8
614 static void pm3fb_cfb8_clear(struct vc_data *conp,
615 struct display *p,
616 int sy, int sx, int height, int width);
617 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
618 struct display *p, int bottom_only);
619 #endif /* FBCON_HAS_CFB8 */
620 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
621 static void pm3fb_cfbX_bmove(struct display *p,
622 int sy, int sx,
623 int dy, int dx, int height, int width);
624 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
625 int c, int yy, int xx);
626 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
627 const unsigned short *s, int count, int yy,
628 int xx);
629 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy);
630 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
631 #endif /* PM3FB_USE_ACCEL */
632 /* pre-init */
633 static void pm3fb_mode_setup(char *mode, unsigned long board_num);
634 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num);
635 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn);
636 static void pm3fb_real_setup(char *options);
637 /* fbdev */
638 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
639 const void *par, struct fb_info_gen *info);
640 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
641 void *par, struct fb_info_gen *info);
642 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d);
643 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
644 const void *par, struct fb_info_gen *info);
645 static void pm3fb_get_par(void *par, struct fb_info_gen *info);
646 static void pm3fb_set_par(const void *par, struct fb_info_gen *info);
647 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
648 unsigned char regno, unsigned char r,
649 unsigned char g, unsigned char b);
650 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
651 unsigned *blue, unsigned *transp,
652 struct fb_info *info);
653 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
654 unsigned blue, unsigned transp,
655 struct fb_info *info);
656 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info);
657 static void pm3fb_set_disp(const void *par, struct display *disp,
658 struct fb_info_gen *info);
659 static void pm3fb_detect(void);
660 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
661 struct fb_info_gen *info);
662 static int pm3fb_ioctl(struct inode *inode, struct file *file,
663 u_int cmd, u_long arg, int con,
664 struct fb_info *info);
665
666
667 /* the struct that hold them together */
668 #ifdef KERNEL_2_2
669 struct fbgen_hwswitch pm3fb_switch = {
670 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
671 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg, pm3fb_setcolreg,
672 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
673 };
674
675 static struct fb_ops pm3fb_ops = {
676 fbgen_get_fix, fbgen_get_var, fbgen_set_var,
677 fbgen_get_cmap, fbgen_set_cmap, fbgen_pan_display, pm3fb_ioctl,
678 NULL, NULL
679 };
680 #endif /* KERNEL_2_2 */
681 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
682 struct fbgen_hwswitch pm3fb_switch = {
683 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
684 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg,
685 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
686 };
687
688 static struct fb_ops pm3fb_ops = {
689 .owner = THIS_MODULE,
690 .fb_get_fix = fbgen_get_fix,
691 .fb_get_var = fbgen_get_var,
692 .fb_set_var = fbgen_set_var,
693 .fb_get_cmap = fbgen_get_cmap,
694 .fb_set_cmap = fbgen_set_cmap,
695 .fb_setcolreg = pm3fb_setcolreg,
696 .fb_pan_display =fbgen_pan_display,
697 .fb_blank = fbgen_blank,
698 .fb_ioctl = pm3fb_ioctl,
699 };
700 #endif /* KERNEL_2_4 or KERNEL_2_5 */
701 #ifdef PM3FB_USE_ACCEL
702 #ifdef FBCON_HAS_CFB32
703 static struct display_switch pm3fb_cfb32 = {
704 fbcon_cfb32_setup, pm3fb_cfbX_bmove, pm3fb_cfb32_clear,
705 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
706 NULL /* cursor() */ , NULL /* set_font() */ ,
707 pm3fb_cfb32_clear_margins,
708 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
709 };
710 #endif /* FBCON_HAS_CFB32 */
711 #ifdef FBCON_HAS_CFB16
712 static struct display_switch pm3fb_cfb16 = {
713 fbcon_cfb16_setup, pm3fb_cfbX_bmove, pm3fb_cfb16_clear,
714 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
715 NULL /* cursor() */ , NULL /* set_font() */ ,
716 pm3fb_cfb16_clear_margins,
717 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
718 };
719 #endif /* FBCON_HAS_CFB16 */
720 #ifdef FBCON_HAS_CFB8
721 static struct display_switch pm3fb_cfb8 = {
722 fbcon_cfb8_setup, pm3fb_cfbX_bmove, pm3fb_cfb8_clear,
723 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
724 NULL /* cursor() */ , NULL /* set_font() */ ,
725 pm3fb_cfb8_clear_margins,
726 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
727 };
728 #endif /* FBCON_HAS_CFB8 */
729 #endif /* PM3FB_USE_ACCEL */
730
731 /* ****************************** */
732 /* ***** card-specific data ***** */
733 /* ****************************** */
734 struct pm3fb_card_timings {
735 unsigned long memsize; /* 0 for last value (i.e. default) */
736 struct pm3fb_timings memt;
737 };
738
739 static struct pm3fb_card_timings t_FormacProFormance3[] = {
740 { 16, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} },
741 { 0, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} } /* from 16 MB PF3 */
742 };
743
744 static struct pm3fb_card_timings t_AppianJeronimo2000[] = {
745 { 32, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} },
746 { 0, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} } /* from 32MB J2000 */
747 };
748
749 static struct pm3fb_card_timings t_3DLabsOxygenVX1[] = {
750 { 32, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} },
751 { 0, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} } /* from 32MB VX1 */
752 };
753
754 static struct {
755 char cardname[32]; /* recognized card name */
756 u16 subvendor; /* subvendor of the card */
757 u16 subdevice; /* subdevice of the card */
758 u8 func; /* function of the card to which the extra init apply */
759 void (*specific_setup)(struct pm3fb_info *l_fb_info); /* card/func specific setup, done before _any_ FB access */
760 struct pm3fb_card_timings *c_memt; /* defauls timings for the boards */
761 } cardbase[] = {
762 { "Unknown Permedia3 board", 0xFFFF, 0xFFFF, 0xFF, NULL, NULL },
763 { "Appian Jeronimo 2000 head 1", 0x1097, 0x3d32, 1, NULL,
764 t_AppianJeronimo2000
765 },
766 { "Appian Jeronimo 2000 head 2", 0x1097, 0x3d32, 2, pm3fb_j2000_setup,
767 t_AppianJeronimo2000
768 },
769 { "Formac ProFormance 3", PCI_VENDOR_ID_3DLABS, 0x000a, 0, NULL, /* Formac use 3DLabs ID ?!? */
770 t_FormacProFormance3
771 },
772 { "3DLabs Permedia3 Create!", PCI_VENDOR_ID_3DLABS, 0x0127, 0, NULL, NULL },
773 { "3DLabs Oxygen VX1 PCI", PCI_VENDOR_ID_3DLABS, 0x0121, 0, NULL,
774 t_3DLabsOxygenVX1
775 },
776 { "3DLabs Oxygen VX1 AGP", PCI_VENDOR_ID_3DLABS, 0x0125, 0, NULL, NULL },
777 { "3DLabs Oxygen VX1-16 AGP", PCI_VENDOR_ID_3DLABS, 0x0140, 0, NULL, NULL },
778 { "3DLabs Oxygen VX1-1600SW PCI", PCI_VENDOR_ID_3DLABS, 0x0800, 0, NULL, NULL },
779 { "\0", 0x0, 0x0, 0, NULL, NULL }
780 };
781
782 /* ********************************** */
783 /* ***** card-specific function ***** */
784 /* ********************************** */
785 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info)
786 { /* the appian j2000 require more initialization of the second head */
787 /* l_fb_info must point to the _second_ head of the J2000 */
788
789 DTRACE;
790
791 l_fb_info->memt = t_AppianJeronimo2000[0].memt; /* 32 MB, first and only j2000 ? */
792
793 pm3fb_write_memory_timings(l_fb_info);
794 }
795
796 /* *************************************** */
797 /* ***** permedia3-specific function ***** */
798 /* *************************************** */
799 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info)
800 {
801 l_fb_info->memt.caps = PM3_READ_REG(PM3LocalMemCaps);
802 l_fb_info->memt.timings = PM3_READ_REG(PM3LocalMemTimings);
803 l_fb_info->memt.control = PM3_READ_REG(PM3LocalMemControl);
804 l_fb_info->memt.refresh = PM3_READ_REG(PM3LocalMemRefresh);
805 l_fb_info->memt.powerdown = PM3_READ_REG(PM3LocalMemPowerDown);
806
807 if ((l_fb_info->memt.caps == PM3FB_UNKNOWN_TIMING_VALUE) ||
808 (l_fb_info->memt.timings == PM3FB_UNKNOWN_TIMING_VALUE) ||
809 (l_fb_info->memt.control == PM3FB_UNKNOWN_TIMING_VALUE) ||
810 (l_fb_info->memt.refresh == PM3FB_UNKNOWN_TIMING_VALUE) ||
811 (l_fb_info->memt.powerdown == PM3FB_UNKNOWN_TIMING_VALUE))
812 {
813 printk(KERN_ERR "pm3fb: invalid memory timings in permedia3 board #%ld\n", l_fb_info->board_num);
814 return(pm3fb_try_memory_timings(l_fb_info));
815 }
816 return(pm3fb_timing_ok);
817 }
818
819 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info)
820 {
821 if (cardbase[l_fb_info->board_type].c_memt)
822 {
823 int i = 0, done = 0;
824 while (!done)
825 {
826 if ((cardbase[l_fb_info->board_type].c_memt[i].memsize == l_fb_info->fb_size)
827 || !(cardbase[l_fb_info->board_type].c_memt[i].memsize))
828 { /* will use the 0-sized timings by default */
829 done = 1;
830 l_fb_info->memt = cardbase[l_fb_info->board_type].c_memt[i].memt;
831 printk(KERN_WARNING "pm3fb: trying to use predefined memory timings for permedia3 board #%ld (%s, %ld MB)\n",
832 l_fb_info->board_num,
833 cardbase[l_fb_info->board_type].cardname,
834 cardbase[l_fb_info->board_type].c_memt[i].memsize);
835 pm3fb_write_memory_timings(l_fb_info);
836 return(pm3fb_timing_retry);
837 }
838 i++;
839 }
840 } else
841 return(pm3fb_timing_problem);
842 return(pm3fb_timing_ok);
843 }
844
845 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info)
846 {
847 unsigned char m, n, p;
848 unsigned long clockused;
849
850 PM3_SLOW_WRITE_REG(PM3LocalMemCaps, l_fb_info->memt.caps);
851 PM3_SLOW_WRITE_REG(PM3LocalMemTimings, l_fb_info->memt.timings);
852 PM3_SLOW_WRITE_REG(PM3LocalMemControl, l_fb_info->memt.control);
853 PM3_SLOW_WRITE_REG(PM3LocalMemRefresh, l_fb_info->memt.refresh);
854 PM3_SLOW_WRITE_REG(PM3LocalMemPowerDown, l_fb_info->memt.powerdown);
855
856 clockused =
857 pm3fb_CalculateClock(l_fb_info, 2 * 105000, PM3_REF_CLOCK, &m,
858 &n, &p);
859
860 PM3_WRITE_DAC_REG(PM3RD_KClkPreScale, m);
861 PM3_WRITE_DAC_REG(PM3RD_KClkFeedbackScale, n);
862 PM3_WRITE_DAC_REG(PM3RD_KClkPostScale, p);
863 PM3_WRITE_DAC_REG(PM3RD_KClkControl,
864 PM3RD_KClkControl_STATE_RUN |
865 PM3RD_KClkControl_SOURCE_PLL |
866 PM3RD_KClkControl_ENABLE);
867 PM3_WRITE_DAC_REG(PM3RD_MClkControl,
868 PM3RD_MClkControl_STATE_RUN |
869 PM3RD_MClkControl_SOURCE_KCLK |
870 PM3RD_MClkControl_ENABLE);
871 PM3_WRITE_DAC_REG(PM3RD_SClkControl,
872 PM3RD_SClkControl_STATE_RUN |
873 PM3RD_SClkControl_SOURCE_PCLK |
874 PM3RD_SClkControl_ENABLE);
875 }
876
877 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
878 unsigned long r)
879 {
880 DASSERT((l_fb_info->vIOBase != (unsigned char *) (-1)),
881 "l_fb_info->vIOBase mapped in read dac reg\n");
882 PM3_SET_INDEX(r);
883 mb();
884 return (PM3_READ_REG(PM3RD_IndexedData));
885 }
886
887 /* Calculating various clock parameter */
888 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
889 unsigned long refclock, /* In kHz units */
890 unsigned char *prescale, /* ClkPreScale */
891 unsigned char *feedback, /* ClkFeedBackScale */
892 unsigned char *postscale
893 /* ClkPostScale */ )
894 {
895 int f, pre, post;
896 unsigned long freq;
897 long freqerr = 1000;
898 unsigned long actualclock = 0;
899
900 DTRACE;
901
902 for (f = 1; f < 256; f++) {
903 for (pre = 1; pre < 256; pre++) {
904 for (post = 0; post < 5; post++) {
905 freq =
906 ((2 * refclock * f) /
907 (pre * (1 << post)));
908 if ((reqclock > freq - freqerr)
909 && (reqclock < freq + freqerr)) {
910 freqerr =
911 (reqclock >
912 freq) ? reqclock -
913 freq : freq - reqclock;
914 *feedback = f;
915 *prescale = pre;
916 *postscale = post;
917 actualclock = freq;
918 }
919 }
920 }
921 }
922
923 return (actualclock);
924 }
925
926 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
927 unsigned long depth, int v)
928 {
929 DTRACE;
930
931 switch (depth) {
932 case 8:
933 return (v >> 4);
934 case 12:
935 case 15:
936 case 16:
937 return (v >> 3);
938 case 32:
939 return (v >> 2);
940 }
941 DPRINTK(1, "Unsupported depth %ld\n", depth);
942 return (0);
943 }
944
945 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
946 unsigned long depth, int v)
947 {
948 DTRACE;
949
950 switch (depth) {
951 case 8:
952 return (v << 4);
953 case 12:
954 case 15:
955 case 16:
956 return (v << 3);
957 case 32:
958 return (v << 2);
959 }
960 DPRINTK(1, "Unsupported depth %ld\n", depth);
961 return (0);
962 }
963
964 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info)
965 {
966 DTRACE;
967
968 l_fb_info->vIOBase =
969 ioremap((unsigned long) l_fb_info->pIOBase, PM3_REGS_SIZE);
970 l_fb_info->v_fb =
971 ioremap((unsigned long) l_fb_info->p_fb, l_fb_info->fb_size);
972 DPRINTK(2, "IO mapping : IOBase %lx / %lx, fb %lx / %lx\n",
973 (unsigned long) l_fb_info->pIOBase,
974 (unsigned long) l_fb_info->vIOBase,
975 (unsigned long) l_fb_info->p_fb,
976 (unsigned long) l_fb_info->v_fb);
977 }
978
979 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info)
980 {
981 DTRACE;
982
983 iounmap(l_fb_info->vIOBase);
984 iounmap(l_fb_info->v_fb);
985 l_fb_info->vIOBase = (unsigned char *) -1;
986 l_fb_info->v_fb = (unsigned char *) -1;
987 }
988
989 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
990 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info)
991 {
992 DPRINTK(2, "PM3Aperture0: 0x%08x\n", PM3_READ_REG(PM3Aperture0));
993 DPRINTK(2, "PM3Aperture1: 0x%08x\n", PM3_READ_REG(PM3Aperture1));
994 DPRINTK(2, "PM3ByAperture1Mode: 0x%08x\n",
995 PM3_READ_REG(PM3ByAperture1Mode));
996 DPRINTK(2, "PM3ByAperture2Mode: 0x%08x\n",
997 PM3_READ_REG(PM3ByAperture2Mode));
998 DPRINTK(2, "PM3ChipConfig: 0x%08x\n", PM3_READ_REG(PM3ChipConfig));
999 DPRINTK(2, "PM3FIFODis: 0x%08x\n", PM3_READ_REG(PM3FIFODis));
1000 DPRINTK(2, "PM3HTotal: 0x%08x\n", PM3_READ_REG(PM3HTotal));
1001 DPRINTK(2, "PM3HbEnd: 0x%08x\n", PM3_READ_REG(PM3HbEnd));
1002 DPRINTK(2, "PM3HgEnd: 0x%08x\n", PM3_READ_REG(PM3HgEnd));
1003 DPRINTK(2, "PM3HsEnd: 0x%08x\n", PM3_READ_REG(PM3HsEnd));
1004 DPRINTK(2, "PM3HsStart: 0x%08x\n", PM3_READ_REG(PM3HsStart));
1005 DPRINTK(2, "PM3MemBypassWriteMask: 0x%08x\n",
1006 PM3_READ_REG(PM3MemBypassWriteMask));
1007 DPRINTK(2, "PM3RD_IndexControl: 0x%08x\n",
1008 PM3_READ_REG(PM3RD_IndexControl));
1009 DPRINTK(2, "PM3ScreenBase: 0x%08x\n", PM3_READ_REG(PM3ScreenBase));
1010 DPRINTK(2, "PM3ScreenStride: 0x%08x\n",
1011 PM3_READ_REG(PM3ScreenStride));
1012 DPRINTK(2, "PM3VClkCtl: 0x%08x\n", PM3_READ_REG(PM3VClkCtl));
1013 DPRINTK(2, "PM3VTotal: 0x%08x\n", PM3_READ_REG(PM3VTotal));
1014 DPRINTK(2, "PM3VbEnd: 0x%08x\n", PM3_READ_REG(PM3VbEnd));
1015 DPRINTK(2, "PM3VideoControl: 0x%08x\n",
1016 PM3_READ_REG(PM3VideoControl));
1017 DPRINTK(2, "PM3VsEnd: 0x%08x\n", PM3_READ_REG(PM3VsEnd));
1018 DPRINTK(2, "PM3VsStart: 0x%08x\n", PM3_READ_REG(PM3VsStart));
1019
1020 DPRINTK(2, "PM3RD_ColorFormat: %ld\n",
1021 PM3_READ_DAC_REG(PM3RD_ColorFormat));
1022 DPRINTK(2, "PM3RD_DACControl: %ld\n",
1023 PM3_READ_DAC_REG(PM3RD_DACControl));
1024 DPRINTK(2, "PM3RD_DClk0FeedbackScale: %ld\n",
1025 PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale));
1026 DPRINTK(2, "PM3RD_DClk0PostScale: %ld\n",
1027 PM3_READ_DAC_REG(PM3RD_DClk0PostScale));
1028 DPRINTK(2, "PM3RD_DClk0PreScale: %ld\n",
1029 PM3_READ_DAC_REG(PM3RD_DClk0PreScale));
1030 DPRINTK(2, "[not set] PM3RD_IndexControl: %ld\n",
1031 PM3_READ_DAC_REG(PM3RD_IndexControl));
1032 DPRINTK(2, "PM3RD_MiscControl: %ld\n",
1033 PM3_READ_DAC_REG(PM3RD_MiscControl));
1034 DPRINTK(2, "PM3RD_PixelSize: %ld\n",
1035 PM3_READ_DAC_REG(PM3RD_PixelSize));
1036 DPRINTK(2, "PM3RD_SyncControl: %ld\n",
1037 PM3_READ_DAC_REG(PM3RD_SyncControl));
1038 }
1039
1040 #endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2) */
1041 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info)
1042 {
1043 u16 subvendor, subdevice;
1044
1045 if ((!pci_read_config_word
1046 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1047 &&
1048 (!pci_read_config_word
1049 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1050 /* well, nothing... */
1051 } else {
1052 subvendor = subdevice = (u16)-1;
1053 }
1054
1055 printk(KERN_INFO "pm3fb: memory timings for board #%ld (subvendor: 0x%hx, subdevice: 0x%hx)\n", l_fb_info->board_num, subvendor, subdevice);
1056 printk(KERN_INFO " PM3LocalMemCaps: 0x%08x\n",
1057 PM3_READ_REG(PM3LocalMemCaps));
1058 printk(KERN_INFO " PM3LocalMemTimings: 0x%08x\n",
1059 PM3_READ_REG(PM3LocalMemTimings));
1060 printk(KERN_INFO " PM3LocalMemControl: 0x%08x\n",
1061 PM3_READ_REG(PM3LocalMemControl));
1062 printk(KERN_INFO " PM3LocalMemRefresh: 0x%08x\n",
1063 PM3_READ_REG(PM3LocalMemRefresh));
1064 printk(KERN_INFO " PM3LocalMemPowerDown: 0x%08x\n",
1065 PM3_READ_REG(PM3LocalMemPowerDown));
1066 }
1067
1068 /* write the mode to registers */
1069 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info)
1070 {
1071 char tempsync = 0x00, tempmisc = 0x00;
1072 DTRACE;
1073
1074 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xffffffff);
1075 PM3_SLOW_WRITE_REG(PM3Aperture0, 0x00000000);
1076 PM3_SLOW_WRITE_REG(PM3Aperture1, 0x00000000);
1077 PM3_SLOW_WRITE_REG(PM3FIFODis, 0x00000007);
1078
1079 PM3_SLOW_WRITE_REG(PM3HTotal,
1080 pm3fb_Shiftbpp(l_fb_info,
1081 l_fb_info->current_par->depth,
1082 l_fb_info->current_par->htotal -
1083 1));
1084 PM3_SLOW_WRITE_REG(PM3HsEnd,
1085 pm3fb_Shiftbpp(l_fb_info,
1086 l_fb_info->current_par->depth,
1087 l_fb_info->current_par->hsend));
1088 PM3_SLOW_WRITE_REG(PM3HsStart,
1089 pm3fb_Shiftbpp(l_fb_info,
1090 l_fb_info->current_par->depth,
1091 l_fb_info->current_par->
1092 hsstart));
1093 PM3_SLOW_WRITE_REG(PM3HbEnd,
1094 pm3fb_Shiftbpp(l_fb_info,
1095 l_fb_info->current_par->depth,
1096 l_fb_info->current_par->hbend));
1097 PM3_SLOW_WRITE_REG(PM3HgEnd,
1098 pm3fb_Shiftbpp(l_fb_info,
1099 l_fb_info->current_par->depth,
1100 l_fb_info->current_par->hbend));
1101 PM3_SLOW_WRITE_REG(PM3ScreenStride,
1102 pm3fb_Shiftbpp(l_fb_info,
1103 l_fb_info->current_par->depth,
1104 l_fb_info->current_par->stride));
1105 PM3_SLOW_WRITE_REG(PM3VTotal, l_fb_info->current_par->vtotal - 1);
1106 PM3_SLOW_WRITE_REG(PM3VsEnd, l_fb_info->current_par->vsend - 1);
1107 PM3_SLOW_WRITE_REG(PM3VsStart,
1108 l_fb_info->current_par->vsstart - 1);
1109 PM3_SLOW_WRITE_REG(PM3VbEnd, l_fb_info->current_par->vbend);
1110
1111 switch (l_fb_info->current_par->depth) {
1112 case 8:
1113 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1114 PM3ByApertureMode_PIXELSIZE_8BIT);
1115 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1116 PM3ByApertureMode_PIXELSIZE_8BIT);
1117 break;
1118
1119 case 12:
1120 case 15:
1121 case 16:
1122 #ifndef __BIG_ENDIAN
1123 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1124 PM3ByApertureMode_PIXELSIZE_16BIT);
1125 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1126 PM3ByApertureMode_PIXELSIZE_16BIT);
1127 #else
1128 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1129 PM3ByApertureMode_PIXELSIZE_16BIT |
1130 PM3ByApertureMode_BYTESWAP_BADC);
1131 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1132 PM3ByApertureMode_PIXELSIZE_16BIT |
1133 PM3ByApertureMode_BYTESWAP_BADC);
1134 #endif /* ! __BIG_ENDIAN */
1135 break;
1136
1137 case 32:
1138 #ifndef __BIG_ENDIAN
1139 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1140 PM3ByApertureMode_PIXELSIZE_32BIT);
1141 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1142 PM3ByApertureMode_PIXELSIZE_32BIT);
1143 #else
1144 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1145 PM3ByApertureMode_PIXELSIZE_32BIT |
1146 PM3ByApertureMode_BYTESWAP_DCBA);
1147 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1148 PM3ByApertureMode_PIXELSIZE_32BIT |
1149 PM3ByApertureMode_BYTESWAP_DCBA);
1150 #endif /* ! __BIG_ENDIAN */
1151 break;
1152
1153 default:
1154 DPRINTK(1, "Unsupported depth %d\n",
1155 l_fb_info->current_par->depth);
1156 break;
1157 }
1158
1159 /*
1160 * Oxygen VX1 - it appears that setting PM3VideoControl and
1161 * then PM3RD_SyncControl to the same SYNC settings undoes
1162 * any net change - they seem to xor together. Only set the
1163 * sync options in PM3RD_SyncControl. --rmk
1164 */
1165 {
1166 unsigned int video = l_fb_info->current_par->video;
1167
1168 video &= ~(PM3VideoControl_HSYNC_MASK |
1169 PM3VideoControl_VSYNC_MASK);
1170 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
1171 PM3VideoControl_VSYNC_ACTIVE_HIGH;
1172 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
1173 }
1174 PM3_SLOW_WRITE_REG(PM3VClkCtl,
1175 (PM3_READ_REG(PM3VClkCtl) & 0xFFFFFFFC));
1176 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
1177 PM3_SLOW_WRITE_REG(PM3ChipConfig,
1178 (PM3_READ_REG(PM3ChipConfig) & 0xFFFFFFFD));
1179
1180 {
1181 unsigned char m; /* ClkPreScale */
1182 unsigned char n; /* ClkFeedBackScale */
1183 unsigned char p; /* ClkPostScale */
1184 (void)pm3fb_CalculateClock(l_fb_info, l_fb_info->current_par->pixclock, PM3_REF_CLOCK, &m, &n, &p);
1185
1186 DPRINTK(2,
1187 "Pixclock: %d, Pre: %d, Feedback: %d, Post: %d\n",
1188 l_fb_info->current_par->pixclock, (int) m, (int) n,
1189 (int) p);
1190
1191 PM3_WRITE_DAC_REG(PM3RD_DClk0PreScale, m);
1192 PM3_WRITE_DAC_REG(PM3RD_DClk0FeedbackScale, n);
1193 PM3_WRITE_DAC_REG(PM3RD_DClk0PostScale, p);
1194 }
1195 /*
1196 PM3_WRITE_DAC_REG(PM3RD_IndexControl, 0x00);
1197 */
1198 /*
1199 PM3_SLOW_WRITE_REG(PM3RD_IndexControl, 0x00);
1200 */
1201 if ((l_fb_info->current_par->video & PM3VideoControl_HSYNC_MASK) ==
1202 PM3VideoControl_HSYNC_ACTIVE_HIGH)
1203 tempsync |= PM3RD_SyncControl_HSYNC_ACTIVE_HIGH;
1204 if ((l_fb_info->current_par->video & PM3VideoControl_VSYNC_MASK) ==
1205 PM3VideoControl_VSYNC_ACTIVE_HIGH)
1206 tempsync |= PM3RD_SyncControl_VSYNC_ACTIVE_HIGH;
1207
1208 PM3_WRITE_DAC_REG(PM3RD_SyncControl, tempsync);
1209 DPRINTK(2, "PM3RD_SyncControl: %d\n", tempsync);
1210
1211 if (flatpanel[l_fb_info->board_num])
1212 {
1213 PM3_WRITE_DAC_REG(PM3RD_DACControl, PM3RD_DACControl_BLANK_PEDESTAL_ENABLE);
1214 PM3_WAIT(2);
1215 PM3_WRITE_REG(PM3VSConfiguration, 0x06);
1216 PM3_WRITE_REG(0x5a00, 1 << 14); /* black magic... */
1217 tempmisc = PM3RD_MiscControl_VSB_OUTPUT_ENABLE;
1218 }
1219 else
1220 PM3_WRITE_DAC_REG(PM3RD_DACControl, 0x00);
1221
1222 switch (l_fb_info->current_par->depth) {
1223 case 8:
1224 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1225 PM3RD_PixelSize_8_BIT_PIXELS);
1226 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1227 PM3RD_ColorFormat_CI8_COLOR |
1228 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1229 tempmisc |= PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1230 break;
1231 case 12:
1232 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1233 PM3RD_PixelSize_16_BIT_PIXELS);
1234 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1235 PM3RD_ColorFormat_4444_COLOR |
1236 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1237 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1238 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1239 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1240 break;
1241 case 15:
1242 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1243 PM3RD_PixelSize_16_BIT_PIXELS);
1244 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1245 PM3RD_ColorFormat_5551_FRONT_COLOR |
1246 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1247 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1248 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1249 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1250 break;
1251 case 16:
1252 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1253 PM3RD_PixelSize_16_BIT_PIXELS);
1254 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1255 PM3RD_ColorFormat_565_FRONT_COLOR |
1256 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1257 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1258 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1259 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1260 break;
1261 case 32:
1262 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1263 PM3RD_PixelSize_32_BIT_PIXELS);
1264 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1265 PM3RD_ColorFormat_8888_COLOR |
1266 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1267 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1268 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1269 break;
1270 }
1271 PM3_WRITE_DAC_REG(PM3RD_MiscControl, tempmisc);
1272
1273 PM3_SHOW_CUR_MODE;
1274 }
1275
1276 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
1277 struct pm3fb_par *curpar)
1278 {
1279 unsigned long pixsize1, pixsize2, clockused;
1280 unsigned long pre, feedback, post;
1281
1282 DTRACE;
1283
1284 clockused = PM3_READ_REG(PM3VClkCtl);
1285
1286 switch (clockused) {
1287 case 3:
1288 pre = PM3_READ_DAC_REG(PM3RD_DClk3PreScale);
1289 feedback = PM3_READ_DAC_REG(PM3RD_DClk3FeedbackScale);
1290 post = PM3_READ_DAC_REG(PM3RD_DClk3PostScale);
1291
1292 DPRINTK(2,
1293 "DClk3 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1294 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1295 feedback,
1296 post));
1297 break;
1298 case 2:
1299 pre = PM3_READ_DAC_REG(PM3RD_DClk2PreScale);
1300 feedback = PM3_READ_DAC_REG(PM3RD_DClk2FeedbackScale);
1301 post = PM3_READ_DAC_REG(PM3RD_DClk2PostScale);
1302
1303 DPRINTK(2,
1304 "DClk2 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1305 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1306 feedback,
1307 post));
1308 break;
1309 case 1:
1310 pre = PM3_READ_DAC_REG(PM3RD_DClk1PreScale);
1311 feedback = PM3_READ_DAC_REG(PM3RD_DClk1FeedbackScale);
1312 post = PM3_READ_DAC_REG(PM3RD_DClk1PostScale);
1313
1314 DPRINTK(2,
1315 "DClk1 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1316 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1317 feedback,
1318 post));
1319 break;
1320 case 0:
1321 pre = PM3_READ_DAC_REG(PM3RD_DClk0PreScale);
1322 feedback = PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale);
1323 post = PM3_READ_DAC_REG(PM3RD_DClk0PostScale);
1324
1325 DPRINTK(2,
1326 "DClk0 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1327 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1328 feedback,
1329 post));
1330 break;
1331 default:
1332 pre = feedback = post = 0;
1333 DPRINTK(1, "Unknowk D clock used : %ld\n", clockused);
1334 break;
1335 }
1336
1337 curpar->pixclock = PM3_SCALE_TO_CLOCK(pre, feedback, post);
1338
1339 pixsize1 =
1340 PM3ByApertureMode_PIXELSIZE_MASK &
1341 (PM3_READ_REG(PM3ByAperture1Mode));
1342 pixsize2 =
1343 PM3ByApertureMode_PIXELSIZE_MASK &
1344 (PM3_READ_REG(PM3ByAperture2Mode));
1345
1346 DASSERT((pixsize1 == pixsize2),
1347 "pixsize the same in both aperture\n");
1348
1349 if (pixsize1 & PM3ByApertureMode_PIXELSIZE_32BIT)
1350 curpar->depth = 32;
1351 else if (pixsize1 & PM3ByApertureMode_PIXELSIZE_16BIT)
1352 {
1353 curpar->depth = 16;
1354 }
1355 else
1356 curpar->depth = 8;
1357
1358 /* not sure if I need to add one on the next ; it give better result with */
1359 curpar->htotal =
1360 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1361 1 + PM3_READ_REG(PM3HTotal));
1362 curpar->hsend =
1363 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1364 PM3_READ_REG(PM3HsEnd));
1365 curpar->hsstart =
1366 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1367 PM3_READ_REG(PM3HsStart));
1368 curpar->hbend =
1369 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1370 PM3_READ_REG(PM3HbEnd));
1371
1372 curpar->stride =
1373 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1374 PM3_READ_REG(PM3ScreenStride));
1375
1376 curpar->vtotal = 1 + PM3_READ_REG(PM3VTotal);
1377 curpar->vsend = 1 + PM3_READ_REG(PM3VsEnd);
1378 curpar->vsstart = 1 + PM3_READ_REG(PM3VsStart);
1379 curpar->vbend = PM3_READ_REG(PM3VbEnd);
1380
1381 curpar->video = PM3_READ_REG(PM3VideoControl);
1382
1383 curpar->base = PM3_READ_REG(PM3ScreenBase);
1384 curpar->width = curpar->htotal - curpar->hbend; /* make virtual == displayed resolution */
1385 curpar->height = curpar->vtotal - curpar->vbend;
1386
1387 DPRINTK(2, "Found : %d * %d, %d Khz, stride is %08x\n",
1388 curpar->width, curpar->height, curpar->pixclock,
1389 curpar->stride);
1390 }
1391
1392 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info)
1393 {
1394 unsigned long memsize = 0, tempBypass, i, temp1, temp2;
1395 u16 subvendor, subdevice;
1396 pm3fb_timing_result ptr;
1397
1398 DTRACE;
1399
1400 l_fb_info->fb_size = 64 * 1024 * 1024; /* pm3 aperture always 64 MB */
1401 pm3fb_mapIO(l_fb_info); /* temporary map IO */
1402
1403 DASSERT((l_fb_info->vIOBase != NULL),
1404 "IO successfully mapped before mem detect\n");
1405 DASSERT((l_fb_info->v_fb != NULL),
1406 "FB successfully mapped before mem detect\n");
1407
1408 /* card-specific stuff, *before* accessing *any* FB memory */
1409 if ((!pci_read_config_word
1410 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1411 &&
1412 (!pci_read_config_word
1413 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1414 i = 0; l_fb_info->board_type = 0;
1415 while ((cardbase[i].cardname[0]) && !(l_fb_info->board_type)) {
1416 if ((cardbase[i].subvendor == subvendor) &&
1417 (cardbase[i].subdevice == subdevice) &&
1418 (cardbase[i].func == PCI_FUNC(l_fb_info->dev->devfn))) {
1419 DPRINTK(2, "Card #%ld is an %s\n",
1420 l_fb_info->board_num,
1421 cardbase[i].cardname);
1422 if (cardbase[i].specific_setup)
1423 cardbase[i].specific_setup(l_fb_info);
1424 l_fb_info->board_type = i;
1425 }
1426 i++;
1427 }
1428 if (!l_fb_info->board_type) {
1429 DPRINTK(1, "Card #%ld is an unknown 0x%04x / 0x%04x\n",
1430 l_fb_info->board_num, subvendor, subdevice);
1431 }
1432 } else {
1433 printk(KERN_ERR "pm3fb: Error: pci_read_config_word failed, board #%ld\n",
1434 l_fb_info->board_num);
1435 }
1436
1437 if (printtimings)
1438 pm3fb_show_cur_timing(l_fb_info);
1439
1440 /* card-specific setup is done, we preserve the final
1441 memory timing for future reference */
1442 if ((ptr = pm3fb_preserve_memory_timings(l_fb_info)) == pm3fb_timing_problem) { /* memory timings were wrong ! oops.... */
1443 return(0);
1444 }
1445
1446 tempBypass = PM3_READ_REG(PM3MemBypassWriteMask);
1447
1448 DPRINTK(2, "PM3MemBypassWriteMask was: 0x%08lx\n", tempBypass);
1449
1450 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xFFFFFFFF);
1451
1452 /* pm3 split up memory, replicates, and do a lot of nasty stuff IMHO ;-) */
1453 for (i = 0; i < 32; i++) {
1454 #ifdef KERNEL_2_2
1455 #ifdef MUST_BYTESWAP
1456 writel(__swab32(i * 0x00345678),
1457 (l_fb_info->v_fb + (i * 1048576)));
1458 #else
1459 writel(i * 0x00345678, (l_fb_info->v_fb + (i * 1048576)));
1460 #endif
1461 mb();
1462 #ifdef MUST_BYTESWAP
1463 temp1 = __swab32(readl((l_fb_info->v_fb + (i * 1048576))));
1464 #else
1465 temp1 = readl((l_fb_info->v_fb + (i * 1048576)));
1466 #endif
1467 #endif /* KERNEL_2_2 */
1468 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1469 fb_writel(i * 0x00345678,
1470 (l_fb_info->v_fb + (i * 1048576)));
1471 mb();
1472 temp1 = fb_readl((l_fb_info->v_fb + (i * 1048576)));
1473 #endif /* KERNEL_2_4 or KERNEL_2_5 */
1474 /* Let's check for wrapover, write will fail at 16MB boundary */
1475 if (temp1 == (i * 0x00345678))
1476 memsize = i;
1477 else
1478 break;
1479 }
1480
1481 DPRINTK(2, "First detect pass already got %ld MB\n", memsize + 1);
1482
1483 if (memsize == i) {
1484 for (i = 0; i < 32; i++) {
1485 /* Clear first 32MB ; 0 is 0, no need to byteswap */
1486 writel(0x0000000,
1487 (l_fb_info->v_fb + (i * 1048576)));
1488 mb();
1489 }
1490
1491 for (i = 32; i < 64; i++) {
1492 #ifdef KERNEL_2_2
1493 #ifdef MUST_BYTESWAP
1494 writel(__swab32(i * 0x00345678),
1495 (l_fb_info->v_fb + (i * 1048576)));
1496 #else
1497 writel(i * 0x00345678,
1498 (l_fb_info->v_fb + (i * 1048576)));
1499 #endif
1500 mb();
1501 #ifdef MUST_BYTESWAP
1502 temp1 =
1503 __swab32(readl
1504 ((l_fb_info->v_fb + (i * 1048576))));
1505 temp2 =
1506 __swab32(readl
1507 ((l_fb_info->v_fb +
1508 ((i - 32) * 1048576))));
1509 #else
1510 temp1 = readl((l_fb_info->v_fb + (i * 1048576)));
1511 temp2 =
1512 readl((l_fb_info->v_fb +
1513 ((i - 32) * 1048576)));
1514 #endif
1515 #endif /* KERNEL_2_2 */
1516 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1517 fb_writel(i * 0x00345678,
1518 (l_fb_info->v_fb + (i * 1048576)));
1519 mb();
1520 temp1 =
1521 fb_readl((l_fb_info->v_fb + (i * 1048576)));
1522 temp2 =
1523 fb_readl((l_fb_info->v_fb +
1524 ((i - 32) * 1048576)));
1525 #endif /* KERNEL_2_4 or KERNEL_2_5 */
1526 if ((temp1 == (i * 0x00345678)) && (temp2 == 0)) /* different value, different RAM... */
1527 memsize = i;
1528 else
1529 break;
1530 }
1531 }
1532
1533 DPRINTK(2, "Second detect pass got %ld MB\n", memsize + 1);
1534
1535 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, tempBypass);
1536
1537 pm3fb_unmapIO(l_fb_info);
1538 memsize = 1048576 * (memsize + 1);
1539
1540 DPRINTK(2, "Returning 0x%08lx bytes\n", memsize);
1541
1542 if (forcesize[l_fb_info->board_num] && ((forcesize[l_fb_info->board_num] * 1048576) != memsize))
1543 {
1544 printk(KERN_WARNING "pm3fb: mismatch between probed (%ld MB) and specified (%hd MB) memory size, using SPECIFIED !\n", memsize, forcesize[l_fb_info->board_num]);
1545 memsize = 1048576 * forcesize[l_fb_info->board_num];
1546 }
1547
1548 l_fb_info->fb_size = memsize;
1549
1550 if (ptr == pm3fb_timing_retry)
1551 {
1552 printk(KERN_WARNING "pm3fb: retrying memory timings check");
1553 if (pm3fb_try_memory_timings(l_fb_info) == pm3fb_timing_problem)
1554 return(0);
1555 }
1556
1557 return (memsize);
1558 }
1559
1560 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc)
1561 {
1562 int i;
1563
1564 DTRACE;
1565
1566 for (i = 0; i < (l_fb_info->fb_size / sizeof(u32)) ; i++) /* clear entire FB memory to black */
1567 {
1568 #ifdef KERNEL_2_2
1569 #ifdef MUST_BYTESWAP
1570 writel(__swab32(cc), (l_fb_info->v_fb + (i * sizeof(u32))));
1571 #else
1572 writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1573 #endif
1574 #endif
1575 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1576 fb_writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1577 #endif
1578 }
1579 }
1580
1581 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b)
1582 {
1583 int i;
1584
1585 DTRACE;
1586
1587 for (i = 0; i < 256 ; i++) /* fill color map with white */
1588 pm3fb_set_color(l_fb_info, i, r, g, b);
1589
1590 }
1591
1592 /* common initialisation */
1593 static void pm3fb_common_init(struct pm3fb_info *l_fb_info)
1594 {
1595 DTRACE;
1596
1597 DPRINTK(2, "Initializing board #%ld @ %lx\n", l_fb_info->board_num,
1598 (unsigned long) l_fb_info);
1599
1600 strcpy(l_fb_info->gen.info.modename, permedia3_name);
1601 disp[l_fb_info->board_num].scrollmode = 0; /* SCROLL_YNOMOVE; *//* 0 means "let fbcon choose" */
1602 l_fb_info->gen.parsize = sizeof(struct pm3fb_par);
1603 l_fb_info->gen.info.changevar = NULL;
1604 l_fb_info->gen.info.fbops = &pm3fb_ops;
1605 l_fb_info->gen.info.disp = &(disp[l_fb_info->board_num]);
1606 if (fontn[l_fb_info->board_num][0])
1607 strcpy(l_fb_info->gen.info.fontname,
1608 fontn[l_fb_info->board_num]);
1609 l_fb_info->gen.info.switch_con = &fbgen_switch;
1610 l_fb_info->gen.info.updatevar = &fbgen_update_var; /* */
1611 l_fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
1612
1613 pm3fb_mapIO(l_fb_info);
1614
1615 pm3fb_clear_memory(l_fb_info, 0);
1616 pm3fb_clear_colormap(l_fb_info, 0, 0, 0);
1617
1618 (void) fbgen_get_var(&(disp[l_fb_info->board_num]).var, -1,
1619 &l_fb_info->gen.info);
1620
1621 if (depth[l_fb_info->board_num]) /* override mode-defined depth */
1622 {
1623 pm3fb_encode_depth(&(disp[l_fb_info->board_num]).var, depth[l_fb_info->board_num]);
1624 (disp[l_fb_info->board_num]).var.bits_per_pixel = depth2bpp(depth[l_fb_info->board_num]);
1625 }
1626
1627 (void) fbgen_do_set_var(&(disp[l_fb_info->board_num]).var, 1,
1628 &l_fb_info->gen);
1629
1630 fbgen_set_disp(-1, &l_fb_info->gen);
1631
1632 do_install_cmap(0, &l_fb_info->gen.info);
1633
1634 if (register_framebuffer(&l_fb_info->gen.info) < 0) {
1635 DPRINTK(1, "Couldn't register framebuffer\n");
1636 return;
1637 }
1638
1639 PM3_WRITE_DAC_REG(PM3RD_CursorMode,
1640 PM3RD_CursorMode_CURSOR_DISABLE);
1641
1642 PM3_SHOW_CUR_MODE;
1643
1644 pm3fb_write_mode(l_fb_info);
1645
1646 printk("fb%d: %s, using %uK of video memory (%s)\n",
1647 l_fb_info->gen.info.node,
1648 permedia3_name, (u32) (l_fb_info->fb_size >> 10),
1649 cardbase[l_fb_info->board_type].cardname);
1650 }
1651
1652 /* **************************************************** */
1653 /* ***** accelerated permedia3-specific functions ***** */
1654 /* **************************************************** */
1655 #ifdef PM3FB_USE_ACCEL
1656 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info)
1657 {
1658 DTRACE;
1659
1660 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1661 PM3_SLOW_WRITE_REG(PM3Sync, 0);
1662 mb();
1663 do {
1664 while ((PM3_READ_REG(PM3OutFIFOWords)) == 0);
1665 rmb();
1666 } while ((PM3_READ_REG(PM3OutputFifo)) != PM3Sync_Tag);
1667 }
1668
1669 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info)
1670 {
1671 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1672 PM3_SLOW_WRITE_REG(PM3StatisticMode, 0x0);
1673 PM3_SLOW_WRITE_REG(PM3DeltaMode, 0x0);
1674 PM3_SLOW_WRITE_REG(PM3RasterizerMode, 0x0);
1675 PM3_SLOW_WRITE_REG(PM3ScissorMode, 0x0);
1676 PM3_SLOW_WRITE_REG(PM3LineStippleMode, 0x0);
1677 PM3_SLOW_WRITE_REG(PM3AreaStippleMode, 0x0);
1678 PM3_SLOW_WRITE_REG(PM3GIDMode, 0x0);
1679 PM3_SLOW_WRITE_REG(PM3DepthMode, 0x0);
1680 PM3_SLOW_WRITE_REG(PM3StencilMode, 0x0);
1681 PM3_SLOW_WRITE_REG(PM3StencilData, 0x0);
1682 PM3_SLOW_WRITE_REG(PM3ColorDDAMode, 0x0);
1683 PM3_SLOW_WRITE_REG(PM3TextureCoordMode, 0x0);
1684 PM3_SLOW_WRITE_REG(PM3TextureIndexMode0, 0x0);
1685 PM3_SLOW_WRITE_REG(PM3TextureIndexMode1, 0x0);
1686 PM3_SLOW_WRITE_REG(PM3TextureReadMode, 0x0);
1687 PM3_SLOW_WRITE_REG(PM3LUTMode, 0x0);
1688 PM3_SLOW_WRITE_REG(PM3TextureFilterMode, 0x0);
1689 PM3_SLOW_WRITE_REG(PM3TextureCompositeMode, 0x0);
1690 PM3_SLOW_WRITE_REG(PM3TextureApplicationMode, 0x0);
1691 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode1, 0x0);
1692 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode1, 0x0);
1693 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode0, 0x0);
1694 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode0, 0x0);
1695 PM3_SLOW_WRITE_REG(PM3FogMode, 0x0);
1696 PM3_SLOW_WRITE_REG(PM3ChromaTestMode, 0x0);
1697 PM3_SLOW_WRITE_REG(PM3AlphaTestMode, 0x0);
1698 PM3_SLOW_WRITE_REG(PM3AntialiasMode, 0x0);
1699 PM3_SLOW_WRITE_REG(PM3YUVMode, 0x0);
1700 PM3_SLOW_WRITE_REG(PM3AlphaBlendColorMode, 0x0);
1701 PM3_SLOW_WRITE_REG(PM3AlphaBlendAlphaMode, 0x0);
1702 PM3_SLOW_WRITE_REG(PM3DitherMode, 0x0);
1703 PM3_SLOW_WRITE_REG(PM3LogicalOpMode, 0x0);
1704 PM3_SLOW_WRITE_REG(PM3RouterMode, 0x0);
1705 PM3_SLOW_WRITE_REG(PM3Window, 0x0);
1706
1707 PM3_SLOW_WRITE_REG(PM3Config2D, 0x0);
1708
1709 PM3_SLOW_WRITE_REG(PM3SpanColorMask, 0xffffffff);
1710
1711 PM3_SLOW_WRITE_REG(PM3XBias, 0x0);
1712 PM3_SLOW_WRITE_REG(PM3YBias, 0x0);
1713 PM3_SLOW_WRITE_REG(PM3DeltaControl, 0x0);
1714
1715 PM3_SLOW_WRITE_REG(PM3BitMaskPattern, 0xffffffff);
1716
1717 PM3_SLOW_WRITE_REG(PM3FBDestReadEnables,
1718 PM3FBDestReadEnables_E(0xff) |
1719 PM3FBDestReadEnables_R(0xff) |
1720 PM3FBDestReadEnables_ReferenceAlpha(0xff));
1721 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferAddr0, 0x0);
1722 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferOffset0, 0x0);
1723 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferWidth0,
1724 PM3FBDestReadBufferWidth_Width(l_fb_info->
1725 current_par->
1726 width));
1727
1728 PM3_SLOW_WRITE_REG(PM3FBDestReadMode,
1729 PM3FBDestReadMode_ReadEnable |
1730 PM3FBDestReadMode_Enable0);
1731 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferAddr, 0x0);
1732 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferOffset, 0x0);
1733 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferWidth,
1734 PM3FBSourceReadBufferWidth_Width(l_fb_info->
1735 current_par->
1736 width));
1737 PM3_SLOW_WRITE_REG(PM3FBSourceReadMode,
1738 PM3FBSourceReadMode_Blocking |
1739 PM3FBSourceReadMode_ReadEnable);
1740
1741 {
1742 unsigned long rm = 1;
1743 switch (l_fb_info->current_par->depth) {
1744 case 8:
1745 PM3_SLOW_WRITE_REG(PM3PixelSize,
1746 PM3PixelSize_GLOBAL_8BIT);
1747 break;
1748 case 12:
1749 case 15:
1750 case 16:
1751 PM3_SLOW_WRITE_REG(PM3PixelSize,
1752 PM3PixelSize_GLOBAL_16BIT);
1753 break;
1754 case 32:
1755 PM3_SLOW_WRITE_REG(PM3PixelSize,
1756 PM3PixelSize_GLOBAL_32BIT);
1757 break;
1758 default:
1759 DPRINTK(1, "Unsupported depth %d\n",
1760 l_fb_info->current_par->depth);
1761 break;
1762 }
1763 PM3_SLOW_WRITE_REG(PM3RasterizerMode, rm);
1764 }
1765
1766 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xffffffff);
1767 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xffffffff);
1768 PM3_SLOW_WRITE_REG(PM3FBWriteMode,
1769 PM3FBWriteMode_WriteEnable |
1770 PM3FBWriteMode_OpaqueSpan |
1771 PM3FBWriteMode_Enable0);
1772 PM3_SLOW_WRITE_REG(PM3FBWriteBufferAddr0, 0x0);
1773 PM3_SLOW_WRITE_REG(PM3FBWriteBufferOffset0, 0x0);
1774 PM3_SLOW_WRITE_REG(PM3FBWriteBufferWidth0,
1775 PM3FBWriteBufferWidth_Width(l_fb_info->
1776 current_par->
1777 width));
1778
1779 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 0x0);
1780 {
1781 unsigned long sofb = (8UL * l_fb_info->fb_size) /
1782 ((depth2bpp(l_fb_info->current_par->depth))
1783 * l_fb_info->current_par->width); /* size in lines of FB */
1784 if (sofb > 4095)
1785 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 4095);
1786 else
1787 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, sofb);
1788
1789 switch (l_fb_info->current_par->depth) {
1790 case 8:
1791 PM3_SLOW_WRITE_REG(PM3DitherMode,
1792 (1 << 10) | (2 << 3));
1793 break;
1794 case 12:
1795 case 15:
1796 case 16:
1797 PM3_SLOW_WRITE_REG(PM3DitherMode,
1798 (1 << 10) | (1 << 3));
1799 break;
1800 case 32:
1801 PM3_SLOW_WRITE_REG(PM3DitherMode,
1802 (1 << 10) | (0 << 3));
1803 break;
1804 default:
1805 DPRINTK(1, "Unsupported depth %d\n",
1806 l_fb_info->current_par->depth);
1807 break;
1808 }
1809 }
1810
1811 PM3_SLOW_WRITE_REG(PM3dXDom, 0x0);
1812 PM3_SLOW_WRITE_REG(PM3dXSub, 0x0);
1813 PM3_SLOW_WRITE_REG(PM3dY, (1 << 16));
1814 PM3_SLOW_WRITE_REG(PM3StartXDom, 0x0);
1815 PM3_SLOW_WRITE_REG(PM3StartXSub, 0x0);
1816 PM3_SLOW_WRITE_REG(PM3StartY, 0x0);
1817 PM3_SLOW_WRITE_REG(PM3Count, 0x0);
1818
1819 /* Disable LocalBuffer. better safe than sorry */
1820 PM3_SLOW_WRITE_REG(PM3LBDestReadMode, 0x0);
1821 PM3_SLOW_WRITE_REG(PM3LBDestReadEnables, 0x0);
1822 PM3_SLOW_WRITE_REG(PM3LBSourceReadMode, 0x0);
1823 PM3_SLOW_WRITE_REG(PM3LBWriteMode, 0x0);
1824
1825 pm3fb_wait_pm3(l_fb_info);
1826 }
1827
1828 #ifdef FBCON_HAS_CFB32
1829 static void pm3fb_cfb32_clear(struct vc_data *conp,
1830 struct display *p,
1831 int sy, int sx, int height, int width)
1832 {
1833 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1834 u32 c;
1835
1836 DTRACE;
1837
1838 sx = sx * fontwidth(p);
1839 width = width * fontwidth(p);
1840 sy = sy * fontheight(p);
1841 height = height * fontheight(p);
1842 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1843
1844 /* block fills in 32bpp are hard, but in low res (width <= 1600 :-)
1845 we can use 16bpp operations, but not if NoWriteMask is on (SDRAM) */
1846 if ((l_fb_info->current_par->width > 1600) ||
1847 (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)) {
1848 PM3_WAIT(4);
1849
1850 PM3_WRITE_REG(PM3Config2D,
1851 PM3Config2D_UseConstantSource |
1852 PM3Config2D_ForegroundROPEnable |
1853 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1854 PM3Config2D_FBWriteEnable);
1855
1856 PM3_WRITE_REG(PM3ForegroundColor, c);
1857
1858 PM3_WRITE_REG(PM3RectanglePosition,
1859 (PM3RectanglePosition_XOffset(sx)) |
1860 (PM3RectanglePosition_YOffset(sy)));
1861
1862 PM3_WRITE_REG(PM3Render2D,
1863 PM3Render2D_XPositive |
1864 PM3Render2D_YPositive |
1865 PM3Render2D_Operation_Normal |
1866 PM3Render2D_SpanOperation |
1867 (PM3Render2D_Width(width)) |
1868 (PM3Render2D_Height(height)));
1869 } else {
1870 PM3_WAIT(8);
1871
1872 PM3_WRITE_REG(PM3FBBlockColor, c);
1873
1874 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_16BIT);
1875
1876 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1877 PM3FBWriteBufferWidth_Width(l_fb_info->
1878 current_par->
1879 width << 1));
1880
1881 PM3_WRITE_REG(PM3Config2D,
1882 PM3Config2D_UseConstantSource |
1883 PM3Config2D_ForegroundROPEnable |
1884 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1885 PM3Config2D_FBWriteEnable);
1886
1887 PM3_WRITE_REG(PM3RectanglePosition,
1888 (PM3RectanglePosition_XOffset(sx << 1)) |
1889 (PM3RectanglePosition_YOffset(sy)));
1890
1891 PM3_WRITE_REG(PM3Render2D,
1892 PM3Render2D_XPositive |
1893 PM3Render2D_YPositive |
1894 PM3Render2D_Operation_Normal |
1895 (PM3Render2D_Width(width << 1)) |
1896 (PM3Render2D_Height(height)));
1897
1898 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1899 PM3FBWriteBufferWidth_Width(l_fb_info->
1900 current_par->
1901 width));
1902
1903 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_32BIT);
1904 }
1905
1906 pm3fb_wait_pm3(l_fb_info);
1907 }
1908
1909 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
1910 struct display *p, int bottom_only)
1911 {
1912 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1913 int sx, sy;
1914 u32 c;
1915
1916 DTRACE;
1917
1918 sx = conp->vc_cols * fontwidth(p); /* right margin */
1919 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1920 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1921
1922 if (!bottom_only) { /* right margin top->bottom */
1923 PM3_WAIT(4);
1924
1925 PM3_WRITE_REG(PM3Config2D,
1926 PM3Config2D_UseConstantSource |
1927 PM3Config2D_ForegroundROPEnable |
1928 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1929 PM3Config2D_FBWriteEnable);
1930
1931 PM3_WRITE_REG(PM3ForegroundColor, c);
1932
1933 PM3_WRITE_REG(PM3RectanglePosition,
1934 (PM3RectanglePosition_XOffset
1935 (p->var.xoffset +
1936 sx)) | (PM3RectanglePosition_YOffset(p->
1937 var.
1938 yoffset)));
1939
1940 PM3_WRITE_REG(PM3Render2D,
1941 PM3Render2D_XPositive |
1942 PM3Render2D_YPositive |
1943 PM3Render2D_Operation_Normal |
1944 PM3Render2D_SpanOperation |
1945 (PM3Render2D_Width(p->var.xres - sx)) |
1946 (PM3Render2D_Height(p->var.yres)));
1947 }
1948
1949 /* bottom margin left -> right */
1950 PM3_WAIT(4);
1951
1952 PM3_WRITE_REG(PM3Config2D,
1953 PM3Config2D_UseConstantSource |
1954 PM3Config2D_ForegroundROPEnable |
1955 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1956 PM3Config2D_FBWriteEnable);
1957
1958 PM3_WRITE_REG(PM3ForegroundColor, c);
1959
1960 PM3_WRITE_REG(PM3RectanglePosition,
1961 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
1962 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
1963
1964 PM3_WRITE_REG(PM3Render2D,
1965 PM3Render2D_XPositive |
1966 PM3Render2D_YPositive |
1967 PM3Render2D_Operation_Normal |
1968 PM3Render2D_SpanOperation |
1969 (PM3Render2D_Width(p->var.xres)) |
1970 (PM3Render2D_Height(p->var.yres - sy)));
1971
1972 pm3fb_wait_pm3(l_fb_info);
1973 }
1974 #endif /* FBCON_HAS_CFB32 */
1975 #ifdef FBCON_HAS_CFB16
1976 static void pm3fb_cfb16_clear(struct vc_data *conp,
1977 struct display *p,
1978 int sy, int sx, int height, int width)
1979 {
1980 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1981 u32 c;
1982
1983 DTRACE;
1984
1985 sx = sx * fontwidth(p);
1986 width = width * fontwidth(p);
1987 sy = sy * fontheight(p);
1988 height = height * fontheight(p);
1989 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1990 c = c | (c << 16);
1991
1992 PM3_WAIT(4);
1993
1994 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1995 PM3_WRITE_REG(PM3ForegroundColor, c);
1996 else
1997 PM3_WRITE_REG(PM3FBBlockColor, c);
1998
1999 PM3_WRITE_REG(PM3Config2D,
2000 PM3Config2D_UseConstantSource |
2001 PM3Config2D_ForegroundROPEnable |
2002 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2003 PM3Config2D_FBWriteEnable);
2004
2005 PM3_WRITE_REG(PM3RectanglePosition,
2006 (PM3RectanglePosition_XOffset(sx)) |
2007 (PM3RectanglePosition_YOffset(sy)));
2008
2009 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2010 PM3_WRITE_REG(PM3Render2D,
2011 PM3Render2D_XPositive |
2012 PM3Render2D_YPositive |
2013 PM3Render2D_Operation_Normal |
2014 PM3Render2D_SpanOperation |
2015 (PM3Render2D_Width(width)) |
2016 (PM3Render2D_Height(height)));
2017 else
2018 PM3_WRITE_REG(PM3Render2D,
2019 PM3Render2D_XPositive |
2020 PM3Render2D_YPositive |
2021 PM3Render2D_Operation_Normal |
2022 (PM3Render2D_Width(width)) |
2023 (PM3Render2D_Height(height)));
2024
2025 pm3fb_wait_pm3(l_fb_info);
2026 }
2027
2028 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
2029 struct display *p, int bottom_only)
2030 {
2031 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2032 int sx, sy;
2033 u32 c;
2034
2035 DTRACE;
2036
2037 sx = conp->vc_cols * fontwidth(p); /* right margin */
2038 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2039 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
2040 c = c | (c << 16);
2041
2042 if (!bottom_only) { /* right margin top->bottom */
2043 PM3_WAIT(4);
2044
2045 PM3_WRITE_REG(PM3Config2D,
2046 PM3Config2D_UseConstantSource |
2047 PM3Config2D_ForegroundROPEnable |
2048 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2049 PM3Config2D_FBWriteEnable);
2050
2051 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2052 PM3_WRITE_REG(PM3ForegroundColor, c);
2053 else
2054 PM3_WRITE_REG(PM3FBBlockColor, c);
2055
2056 PM3_WRITE_REG(PM3RectanglePosition,
2057 (PM3RectanglePosition_XOffset
2058 (p->var.xoffset +
2059 sx)) | (PM3RectanglePosition_YOffset(p->
2060 var.
2061 yoffset)));
2062 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2063 PM3_WRITE_REG(PM3Render2D,
2064 PM3Render2D_XPositive |
2065 PM3Render2D_YPositive |
2066 PM3Render2D_Operation_Normal |
2067 PM3Render2D_SpanOperation |
2068 (PM3Render2D_Width(p->var.xres - sx)) |
2069 (PM3Render2D_Height(p->var.yres)));
2070 else
2071 PM3_WRITE_REG(PM3Render2D,
2072 PM3Render2D_XPositive |
2073 PM3Render2D_YPositive |
2074 PM3Render2D_Operation_Normal |
2075 (PM3Render2D_Width(p->var.xres - sx)) |
2076 (PM3Render2D_Height(p->var.yres)));
2077 }
2078
2079 /* bottom margin left -> right */
2080 PM3_WAIT(4);
2081
2082 PM3_WRITE_REG(PM3Config2D,
2083 PM3Config2D_UseConstantSource |
2084 PM3Config2D_ForegroundROPEnable |
2085 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2086 PM3Config2D_FBWriteEnable);
2087
2088 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2089 PM3_WRITE_REG(PM3ForegroundColor, c);
2090 else
2091 PM3_WRITE_REG(PM3FBBlockColor, c);
2092
2093
2094 PM3_WRITE_REG(PM3RectanglePosition,
2095 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2096 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2097
2098 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2099 PM3_WRITE_REG(PM3Render2D,
2100 PM3Render2D_XPositive |
2101 PM3Render2D_YPositive |
2102 PM3Render2D_Operation_Normal |
2103 PM3Render2D_SpanOperation |
2104 (PM3Render2D_Width(p->var.xres)) |
2105 (PM3Render2D_Height(p->var.yres - sy)));
2106 else
2107 PM3_WRITE_REG(PM3Render2D,
2108 PM3Render2D_XPositive |
2109 PM3Render2D_YPositive |
2110 PM3Render2D_Operation_Normal |
2111 (PM3Render2D_Width(p->var.xres)) |
2112 (PM3Render2D_Height(p->var.yres - sy)));
2113
2114 pm3fb_wait_pm3(l_fb_info);
2115 }
2116 #endif /* FBCON_HAS_CFB16 */
2117 #ifdef FBCON_HAS_CFB8
2118 static void pm3fb_cfb8_clear(struct vc_data *conp,
2119 struct display *p,
2120 int sy, int sx, int height, int width)
2121 {
2122 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2123 u32 c;
2124
2125 DTRACE;
2126
2127 sx = sx * fontwidth(p);
2128 width = width * fontwidth(p);
2129 sy = sy * fontheight(p);
2130 height = height * fontheight(p);
2131
2132 c = attr_bgcol_ec(p, conp);
2133 c |= c << 8;
2134 c |= c << 16;
2135
2136 PM3_WAIT(4);
2137
2138 PM3_WRITE_REG(PM3Config2D,
2139 PM3Config2D_UseConstantSource |
2140 PM3Config2D_ForegroundROPEnable |
2141 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2142 PM3Config2D_FBWriteEnable);
2143
2144 PM3_WRITE_REG(PM3ForegroundColor, c);
2145
2146 PM3_WRITE_REG(PM3RectanglePosition,
2147 (PM3RectanglePosition_XOffset(sx)) |
2148 (PM3RectanglePosition_YOffset(sy)));
2149
2150 PM3_WRITE_REG(PM3Render2D,
2151 PM3Render2D_XPositive |
2152 PM3Render2D_YPositive |
2153 PM3Render2D_Operation_Normal |
2154 PM3Render2D_SpanOperation |
2155 (PM3Render2D_Width(width)) |
2156 (PM3Render2D_Height(height)));
2157
2158 pm3fb_wait_pm3(l_fb_info);
2159 }
2160
2161 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
2162 struct display *p, int bottom_only)
2163 {
2164 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2165 int sx, sy;
2166 u32 c;
2167
2168 DTRACE;
2169
2170 sx = conp->vc_cols * fontwidth(p); /* right margin */
2171 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2172 c = attr_bgcol_ec(p, conp);
2173 c |= c << 8;
2174 c |= c << 16;
2175
2176 if (!bottom_only) { /* right margin top->bottom */
2177 PM3_WAIT(4);
2178
2179 PM3_WRITE_REG(PM3Config2D,
2180 PM3Config2D_UseConstantSource |
2181 PM3Config2D_ForegroundROPEnable |
2182 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2183 PM3Config2D_FBWriteEnable);
2184
2185 PM3_WRITE_REG(PM3ForegroundColor, c);
2186
2187 PM3_WRITE_REG(PM3RectanglePosition,
2188 (PM3RectanglePosition_XOffset
2189 (p->var.xoffset +
2190 sx)) | (PM3RectanglePosition_YOffset(p->
2191 var.
2192 yoffset)));
2193
2194 PM3_WRITE_REG(PM3Render2D,
2195 PM3Render2D_XPositive |
2196 PM3Render2D_YPositive |
2197 PM3Render2D_Operation_Normal |
2198 PM3Render2D_SpanOperation |
2199 (PM3Render2D_Width(p->var.xres - sx)) |
2200 (PM3Render2D_Height(p->var.yres)));
2201 }
2202
2203 /* bottom margin left -> right */
2204 PM3_WAIT(4);
2205
2206 PM3_WRITE_REG(PM3Config2D,
2207 PM3Config2D_UseConstantSource |
2208 PM3Config2D_ForegroundROPEnable |
2209 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2210 PM3Config2D_FBWriteEnable);
2211
2212 PM3_WRITE_REG(PM3ForegroundColor, c);
2213
2214 PM3_WRITE_REG(PM3RectanglePosition,
2215 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2216 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2217
2218 PM3_WRITE_REG(PM3Render2D,
2219 PM3Render2D_XPositive |
2220 PM3Render2D_YPositive |
2221 PM3Render2D_Operation_Normal |
2222 PM3Render2D_SpanOperation |
2223 (PM3Render2D_Width(p->var.xres)) |
2224 (PM3Render2D_Height(p->var.yres - sy)));
2225
2226 pm3fb_wait_pm3(l_fb_info);
2227 }
2228 #endif /* FBCON_HAS_CFB8 */
2229 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
2230 static void pm3fb_cfbX_bmove(struct display *p,
2231 int sy, int sx,
2232 int dy, int dx, int height, int width)
2233 {
2234 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2235 int x_align, o_x, o_y;
2236
2237 DTRACE;
2238
2239 sx = sx * fontwidth(p);
2240 dx = dx * fontwidth(p);
2241 width = width * fontwidth(p);
2242 sy = sy * fontheight(p);
2243 dy = dy * fontheight(p);
2244 height = height * fontheight(p);
2245
2246 o_x = sx - dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
2247 o_y = sy - dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
2248
2249 x_align = (sx & 0x1f);
2250
2251 PM3_WAIT(6);
2252
2253 PM3_WRITE_REG(PM3Config2D,
2254 PM3Config2D_UserScissorEnable |
2255 PM3Config2D_ForegroundROPEnable |
2256 PM3Config2D_Blocking |
2257 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2258 PM3Config2D_FBWriteEnable);
2259
2260 PM3_WRITE_REG(PM3ScissorMinXY,
2261 ((dy & 0x0fff) << 16) | (dx & 0x0fff));
2262 PM3_WRITE_REG(PM3ScissorMaxXY,
2263 (((dy + height) & 0x0fff) << 16) |
2264 ((dx + width) & 0x0fff));
2265
2266 PM3_WRITE_REG(PM3FBSourceReadBufferOffset,
2267 PM3FBSourceReadBufferOffset_XOffset(o_x) |
2268 PM3FBSourceReadBufferOffset_YOffset(o_y));
2269
2270 PM3_WRITE_REG(PM3RectanglePosition,
2271 (PM3RectanglePosition_XOffset(dx - x_align)) |
2272 (PM3RectanglePosition_YOffset(dy)));
2273
2274 PM3_WRITE_REG(PM3Render2D,
2275 ((sx > dx) ? PM3Render2D_XPositive : 0) |
2276 ((sy > dy) ? PM3Render2D_YPositive : 0) |
2277 PM3Render2D_Operation_Normal |
2278 PM3Render2D_SpanOperation |
2279 PM3Render2D_FBSourceReadEnable |
2280 (PM3Render2D_Width(width + x_align)) |
2281 (PM3Render2D_Height(height)));
2282
2283 pm3fb_wait_pm3(l_fb_info);
2284 }
2285
2286 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
2287 int c, int yy, int xx)
2288 {
2289 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2290 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2291 u32 fgx, bgx, ldat;
2292 int sx, sy, i;
2293
2294 DTRACE;
2295
2296 if (l_fb_info->current_par->depth == 8)
2297 fgx = attr_fgcol(p, c);
2298 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2299 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, c)];
2300 else
2301 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, c)];
2302
2303 PM3_COLOR(fgx);
2304
2305 if (l_fb_info->current_par->depth == 8)
2306 bgx = attr_bgcol(p, c);
2307 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2308 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, c)];
2309 else
2310 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, c)];
2311
2312 PM3_COLOR(bgx);
2313
2314 PM3_WAIT(4);
2315
2316 PM3_WRITE_REG(PM3Config2D,
2317 PM3Config2D_UseConstantSource |
2318 PM3Config2D_ForegroundROPEnable |
2319 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2320 PM3Config2D_FBWriteEnable | PM3Config2D_OpaqueSpan);
2321
2322 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2323 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2324
2325 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2326 /* and 16 bits for fontwidth <= 16 */
2327 /* same in _putcs, same for Y and fontheight */
2328 if (fontwidth(p) <= 8)
2329 asx = 2;
2330 else if (fontwidth(p) <= 16)
2331 asx = 3; /* look OK */
2332 if (fontheight(p) <= 8)
2333 asy = 2;
2334 else if (fontheight(p) <= 16)
2335 asy = 3; /* look OK */
2336 else if (fontheight(p) <= 32)
2337 asy = 4; /* look OK */
2338
2339 sx = xx * fontwidth(p);
2340 sy = yy * fontheight(p);
2341
2342 if (fontwidth(p) <= 8)
2343 o_x = (8 - (sx & 0x7)) & 0x7;
2344 else if (fontwidth(p) <= 16)
2345 o_x = (16 - (sx & 0xF)) & 0xF;
2346 if (fontheight(p) <= 8)
2347 o_y = (8 - (sy & 0x7)) & 0x7;
2348 else if (fontheight(p) <= 16)
2349 o_y = (16 - (sy & 0xF)) & 0xF;
2350 else if (fontheight(p) <= 32)
2351 o_y = (32 - (sy & 0x1F)) & 0x1F;
2352
2353 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2354 (1 << 18) | /* BE */
2355 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2356 (1 << 20)); /* OpaqueSpan */
2357
2358 if (fontwidth(p) <= 8) {
2359 cdat = p->fontdata + (c & p->charmask) * fontheight(p);
2360 } else {
2361 cdat =
2362 p->fontdata +
2363 ((c & p->charmask) * (fontheight(p) << 1));
2364 }
2365
2366 PM3_WAIT(2 + fontheight(p));
2367
2368 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2369 if (fontwidth(p) <= 8) {
2370 ldat = *cdat++;
2371 } else { /* assume fontwidth <= 16 ATM */
2372
2373 ldat = ((*cdat++) << 8);
2374 ldat |= *cdat++;
2375 }
2376 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2377 }
2378
2379 PM3_WRITE_REG(PM3RectanglePosition,
2380 (PM3RectanglePosition_XOffset(sx)) |
2381 (PM3RectanglePosition_YOffset(sy)));
2382
2383 PM3_WRITE_REG(PM3Render2D,
2384 PM3Render2D_AreaStippleEnable |
2385 PM3Render2D_XPositive |
2386 PM3Render2D_YPositive |
2387 PM3Render2D_Operation_Normal |
2388 PM3Render2D_SpanOperation |
2389 (PM3Render2D_Width(fontwidth(p))) |
2390 (PM3Render2D_Height(fontheight(p))));
2391
2392 pm3fb_wait_pm3(l_fb_info);
2393 }
2394
2395 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
2396 const unsigned short *s, int count, int yy,
2397 int xx)
2398 {
2399 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2400 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2401 u32 fgx, bgx, ldat;
2402 int sx, sy, i, j;
2403 u16 sc;
2404
2405 DTRACE;
2406
2407 sc = scr_readw(s);
2408 if (l_fb_info->current_par->depth == 8)
2409 fgx = attr_fgcol(p, sc);
2410 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2411 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, sc)];
2412 else
2413 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, sc)];
2414
2415 PM3_COLOR(fgx);
2416
2417 if (l_fb_info->current_par->depth == 8)
2418 bgx = attr_bgcol(p, sc);
2419 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2420 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, sc)];
2421 else
2422 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, sc)];
2423
2424 PM3_COLOR(bgx);
2425
2426 PM3_WAIT(4);
2427
2428 PM3_WRITE_REG(PM3Config2D,
2429 PM3Config2D_UseConstantSource |
2430 PM3Config2D_ForegroundROPEnable |
2431 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2432 PM3Config2D_FBWriteEnable |
2433 PM3Config2D_OpaqueSpan);
2434
2435 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2436 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2437
2438 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2439 /* and 16 bits for fontwidth <= 16 */
2440 /* same in _putc, same for Y and fontheight */
2441 if (fontwidth(p) <= 8)
2442 asx = 2;
2443 else if (fontwidth(p) <= 16)
2444 asx = 3; /* look OK */
2445 if (fontheight(p) <= 8)
2446 asy = 2;
2447 else if (fontheight(p) <= 16)
2448 asy = 3; /* look OK */
2449 else if (fontheight(p) <= 32)
2450 asy = 4; /* look OK */
2451
2452 sy = yy * fontheight(p);
2453
2454 if (fontheight(p) <= 8)
2455 o_y = (8 - (sy & 0x7)) & 0x7;
2456 else if (fontheight(p) <= 16)
2457 o_y = (16 - (sy & 0xF)) & 0xF;
2458 else if (fontheight(p) <= 32)
2459 o_y = (32 - (sy & 0x1F)) & 0x1F;
2460
2461 for (j = 0; j < count; j++) {
2462 sc = scr_readw(s + j);
2463 if (fontwidth(p) <= 8)
2464 cdat = p->fontdata +
2465 (sc & p->charmask) * fontheight(p);
2466 else
2467 cdat = p->fontdata +
2468 ((sc & p->charmask) * fontheight(p) << 1);
2469
2470 sx = (xx + j) * fontwidth(p);
2471
2472 if (fontwidth(p) <= 8)
2473 o_x = (8 - (sx & 0x7)) & 0x7;
2474 else if (fontwidth(p) <= 16)
2475 o_x = (16 - (sx & 0xF)) & 0xF;
2476
2477 PM3_WAIT(3 + fontheight(p));
2478
2479 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2480 (1 << 18) | /* BE */
2481 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2482 (1 << 20)); /* OpaqueSpan */
2483
2484 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2485 if (fontwidth(p) <= 8) {
2486 ldat = *cdat++;
2487 } else { /* assume fontwidth <= 16 ATM */
2488 ldat = ((*cdat++) << 8);
2489 ldat |= *cdat++;
2490 }
2491 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2492 }
2493
2494 PM3_WRITE_REG(PM3RectanglePosition,
2495 (PM3RectanglePosition_XOffset(sx)) |
2496 (PM3RectanglePosition_YOffset(sy)));
2497
2498 PM3_WRITE_REG(PM3Render2D,
2499 PM3Render2D_AreaStippleEnable |
2500 PM3Render2D_XPositive |
2501 PM3Render2D_YPositive |
2502 PM3Render2D_Operation_Normal |
2503 PM3Render2D_SpanOperation |
2504 (PM3Render2D_Width(fontwidth(p))) |
2505 (PM3Render2D_Height(fontheight(p))));
2506 }
2507 pm3fb_wait_pm3(l_fb_info);
2508 }
2509
2510 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy)
2511 {
2512 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2513
2514 xx = xx * fontwidth(p);
2515 yy = yy * fontheight(p);
2516
2517 if (l_fb_info->current_par->depth == 8)
2518 {
2519 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2520 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0x0F0F0F0F);
2521 else
2522 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0x0F0F0F0F);
2523 }
2524
2525 PM3_WAIT(3);
2526
2527 PM3_WRITE_REG(PM3Config2D,
2528 PM3Config2D_UseConstantSource |
2529 PM3Config2D_ForegroundROPEnable |
2530 (PM3Config2D_ForegroundROP(0xa)) | /* Oxa is GXinvert */
2531 PM3Config2D_FBDestReadEnable |
2532 PM3Config2D_FBWriteEnable);
2533
2534 PM3_WRITE_REG(PM3RectanglePosition,
2535 (PM3RectanglePosition_XOffset(xx)) |
2536 (PM3RectanglePosition_YOffset(yy)));
2537
2538 PM3_WRITE_REG(PM3Render2D,
2539 PM3Render2D_XPositive |
2540 PM3Render2D_YPositive |
2541 PM3Render2D_Operation_Normal |
2542 PM3Render2D_SpanOperation |
2543 (PM3Render2D_Width(fontwidth(p))) |
2544 (PM3Render2D_Height(fontheight(p))));
2545
2546 pm3fb_wait_pm3(l_fb_info);
2547
2548 if (l_fb_info->current_par->depth == 8)
2549 {
2550 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2551 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xFFFFFFFF);
2552 else
2553 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xFFFFFFFF);
2554 }
2555 }
2556
2557 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
2558 #endif /* PM3FB_USE_ACCEL */
2559 /* *********************************** */
2560 /* ***** pre-init board(s) setup ***** */
2561 /* *********************************** */
2562
2563 static void pm3fb_mode_setup(char *mode, unsigned long board_num)
2564 {
2565 struct pm3fb_info *l_fb_info = &(fb_info[board_num]);
2566 struct pm3fb_par *l_fb_par = &(current_par[board_num]);
2567 unsigned long i = 0;
2568
2569 current_par_valid[board_num] = 0;
2570
2571 if (!strncmp(mode, "current", 7)) {
2572 l_fb_info->use_current = 1; /* default w/ OpenFirmware */
2573 } else {
2574 while ((mode_base[i].name[0])
2575 && (!current_par_valid[board_num])) {
2576 if (!
2577 (strncmp
2578 (mode, mode_base[i].name,
2579 strlen(mode_base[i].name)))) {
2580 memcpy(l_fb_par, &(mode_base[i].user_mode),
2581 sizeof(struct pm3fb_par));
2582 current_par_valid[board_num] = 1;
2583 DPRINTK(2, "Mode set to %s\n",
2584 mode_base[i].name);
2585 }
2586 i++;
2587 }
2588 DASSERT(current_par_valid[board_num],
2589 "Valid mode on command line\n");
2590 }
2591 }
2592
2593 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num)
2594 {
2595 short l_bus = -1, l_slot = -1, l_func = -1;
2596 char *next;
2597
2598 if (pciid) {
2599 l_bus = simple_strtoul(pciid, &next, 10);
2600 if (next && (next[0] == ':')) {
2601 pciid = next + 1;
2602 l_slot = simple_strtoul(pciid, &next, 10);
2603 if (next && (next[0] == ':')) {
2604 pciid = next + 1;
2605 l_func =
2606 simple_strtoul(pciid, (char **) NULL,
2607 10);
2608 }
2609 }
2610 } else
2611 return;
2612
2613 if ((l_bus >= 0) && (l_slot >= 0) && (l_func >= 0)) {
2614 bus[board_num] = l_bus;
2615 slot[board_num] = l_slot;
2616 func[board_num] = l_func;
2617 DPRINTK(2, "Board #%ld will be PciId: %hd:%hd:%hd\n",
2618 board_num, l_bus, l_slot, l_func);
2619 } else {
2620 DPRINTK(1, "Invalid PciId: %hd:%hd:%hd for board #%ld\n",
2621 l_bus, l_slot, l_func, board_num);
2622 }
2623 }
2624
2625 static void pm3fb_font_setup(char *lf, unsigned long board_num)
2626 {
2627 unsigned long lfs = strlen(lf);
2628
2629 if (lfs > (PM3_FONTNAME_SIZE - 1)) {
2630 DPRINTK(1, "Fontname %s too long\n", lf);
2631 return;
2632 }
2633 strlcpy(fontn[board_num], lf, lfs + 1);
2634 }
2635
2636 static void pm3fb_bootdepth_setup(char *bds, unsigned long board_num)
2637 {
2638 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2639
2640 if (!(depth_supported(bd))) {
2641 printk(KERN_WARNING "pm3fb: ignoring invalid depth %s for board #%ld\n",
2642 bds, board_num);
2643 return;
2644 }
2645 depth[board_num] = bd;
2646 }
2647
2648 static void pm3fb_forcesize_setup(char *bds, unsigned long board_num)
2649 {
2650 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2651
2652 if (bd > 64) {
2653 printk(KERN_WARNING "pm3fb: ignoring invalid memory size %s for board #%ld\n",
2654 bds, board_num);
2655 return;
2656 }
2657 forcesize[board_num] = bd;
2658 }
2659
2660 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn)
2661 {
2662 char *next;
2663
2664 if (!(CHAR_IS_NUM(options[0]))) {
2665 (*bn) = 0;
2666 return (options);
2667 }
2668
2669 (*bn) = simple_strtoul(options, &next, 10);
2670
2671 if (next && (next[0] == ':') && ((*bn) >= 0)
2672 && ((*bn) <= PM3_MAX_BOARD)) {
2673 DPRINTK(2, "Board_num seen as %ld\n", (*bn));
2674 return (next + 1);
2675 } else {
2676 (*bn) = 0;
2677 DPRINTK(2, "Board_num default to %ld\n", (*bn));
2678 return (options);
2679 }
2680 }
2681
2682 static void pm3fb_real_setup(char *options)
2683 {
2684 char *next;
2685 unsigned long i, bn;
2686 struct pm3fb_info *l_fb_info;
2687
2688 DTRACE;
2689
2690 DPRINTK(2, "Options : %s\n", options);
2691
2692 for (i = 0; i < PM3_MAX_BOARD; i++) {
2693 l_fb_info = &(fb_info[i]);
2694 memset(l_fb_info, 0, sizeof(struct pm3fb_info));
2695 l_fb_info->gen.fbhw = &pm3fb_switch;
2696 l_fb_info->board_num = i;
2697 current_par_valid[i] = 0;
2698 slot[i] = -1;
2699 func[i] = -1;
2700 bus[i] = -1;
2701 disable[i] = 0;
2702 noaccel[i] = 0;
2703 fontn[i][0] = '\0';
2704 depth[i] = 0;
2705 l_fb_info->current_par = &(current_par[i]);
2706 }
2707
2708 /* eat up prefix pm3fb and whatever is used as separator i.e. :,= */
2709 if (!strncmp(options, "pm3fb", 5)) {
2710 options += 5;
2711 while (((*options) == ',') || ((*options) == ':')
2712 || ((*options) == '='))
2713 options++;
2714 }
2715
2716 while (options) {
2717 bn = 0;
2718 if ((next = strchr(options, ','))) {
2719 (*next) = '\0';
2720 next++;
2721 }
2722
2723 if (!strncmp(options, "mode:", 5)) {
2724 options = pm3fb_boardnum_setup(options + 5, &bn);
2725 DPRINTK(2, "Setting mode for board #%ld\n", bn);
2726 pm3fb_mode_setup(options, bn);
2727 } else if (!strncmp(options, "off:", 4)) {
2728 options = pm3fb_boardnum_setup(options + 4, &bn);
2729 DPRINTK(2, "Disabling board #%ld\n", bn);
2730 disable[bn] = 1;
2731 } else if (!strncmp(options, "off", 3)) { /* disable everything */
2732 for (i = 0; i < PM3_MAX_BOARD; i++)
2733 disable[i] = 1;
2734 } else if (!strncmp(options, "disable:", 8)) {
2735 options = pm3fb_boardnum_setup(options + 8, &bn);
2736 DPRINTK(2, "Disabling board #%ld\n", bn);
2737 disable[bn] = 1;
2738 } else if (!strncmp(options, "pciid:", 6)) {
2739 options = pm3fb_boardnum_setup(options + 6, &bn);
2740 DPRINTK(2, "Setting PciID for board #%ld\n", bn);
2741 pm3fb_pciid_setup(options, bn);
2742 } else if (!strncmp(options, "noaccel:", 8)) {
2743 options = pm3fb_boardnum_setup(options + 8, &bn);
2744 noaccel[bn] = 1;
2745 } else if (!strncmp(options, "font:", 5)) {
2746 options = pm3fb_boardnum_setup(options + 5, &bn);
2747 pm3fb_font_setup(options, bn);
2748 } else if (!strncmp(options, "depth:", 6)) {
2749 options = pm3fb_boardnum_setup(options + 6, &bn);
2750 pm3fb_bootdepth_setup(options, bn);
2751 } else if (!strncmp(options, "printtimings", 12)) {
2752 printtimings = 1;
2753 } else if (!strncmp(options, "flatpanel:", 10)) {
2754 options = pm3fb_boardnum_setup(options + 10, &bn);
2755 flatpanel[bn] = 1;
2756 } else if (!strncmp(options, "forcesize:", 10)) {
2757 options = pm3fb_boardnum_setup(options + 10, &bn);
2758 pm3fb_forcesize_setup(options, bn);
2759 }
2760 options = next;
2761 }
2762 }
2763
2764 /* ********************************************** */
2765 /* ***** framebuffer API standard functions ***** */
2766 /* ********************************************** */
2767
2768 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
2769 const void *par, struct fb_info_gen *info)
2770 {
2771 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2772 struct pm3fb_par *p = (struct pm3fb_par *) par;
2773
2774 DTRACE;
2775
2776 strcpy(fix->id, permedia3_name);
2777 fix->smem_start = (unsigned long)l_fb_info->p_fb;
2778 fix->smem_len = l_fb_info->fb_size;
2779 fix->mmio_start = (unsigned long)l_fb_info->pIOBase;
2780 fix->mmio_len = PM3_REGS_SIZE;
2781 #ifdef PM3FB_USE_ACCEL
2782 if (!(noaccel[l_fb_info->board_num]))
2783 fix->accel = FB_ACCEL_3DLABS_PERMEDIA3;
2784 else
2785 #endif /* PM3FB_USE_ACCEL */
2786 fix->accel = FB_ACCEL_NONE;
2787 fix->type = FB_TYPE_PACKED_PIXELS;
2788 fix->visual =
2789 (p->depth == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
2790 if (current_par_valid[l_fb_info->board_num])
2791 fix->line_length =
2792 l_fb_info->current_par->width *
2793 depth2ByPP(l_fb_info->current_par->depth);
2794 else
2795 fix->line_length = 0;
2796 fix->xpanstep = 64 / depth2bpp(p->depth);
2797 fix->ypanstep = 1;
2798 fix->ywrapstep = 0;
2799 return (0);
2800 }
2801
2802 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
2803 void *par, struct fb_info_gen *info)
2804 {
2805 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2806 struct pm3fb_par *p = (struct pm3fb_par *) par;
2807 struct pm3fb_par temp_p;
2808 u32 xres;
2809
2810 DTRACE;
2811
2812 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2813 DASSERT((p != NULL), "pm3fb_par* not NULL");
2814 DASSERT((l_fb_info != NULL), "pm3fb_info* not NULL");
2815
2816 memset(&temp_p, 0, sizeof(struct pm3fb_par));
2817 temp_p.width = (var->xres_virtual + 7) & ~7;
2818 temp_p.height = var->yres_virtual;
2819
2820 if (!(depth_supported(var->bits_per_pixel))) /* round unsupported up to a multiple of 8 */
2821 temp_p.depth = depth2bpp(var->bits_per_pixel);
2822 else
2823 temp_p.depth = var->bits_per_pixel;
2824
2825 temp_p.depth = (temp_p.depth > 32) ? 32 : temp_p.depth; /* max 32 */
2826 temp_p.depth = (temp_p.depth == 24) ? 32 : temp_p.depth; /* 24 unsupported, round-up to 32 */
2827
2828 if ((temp_p.depth == 16) && (var->red.length == 5) && (var->green.length == 5) && (var->blue.length == 5))
2829 temp_p.depth = 15; /* RGBA 5551 is stored as depth 15 */
2830
2831 if ((temp_p.depth == 16) && (var->red.length == 4) && (var->green.length == 4) && (var->blue.length == 4))
2832 temp_p.depth = 12; /* RGBA 4444 is stored as depth 12 */
2833
2834
2835 DPRINTK(2,
2836 "xres: %d, yres: %d, vxres: %d, vyres: %d ; xoffset:%d, yoffset: %d\n",
2837 var->xres, var->yres, var->xres_virtual, var->yres_virtual,
2838 var->xoffset, var->yoffset);
2839
2840 xres = (var->xres + 31) & ~31;
2841 if (temp_p.width < xres + var->xoffset)
2842 temp_p.width = xres + var->xoffset;
2843 if (temp_p.height < var->yres + var->yoffset)
2844 temp_p.height = var->yres + var->yoffset;
2845
2846 if (temp_p.width > 2048) {
2847 DPRINTK(1, "virtual width not supported: %u\n",
2848 temp_p.width);
2849 return (-EINVAL);
2850 }
2851 if (var->yres < 200) {
2852 DPRINTK(1, "height not supported: %u\n", (u32) var->yres);
2853 return (-EINVAL);
2854 }
2855 if (temp_p.height < 200 || temp_p.height > 4095) {
2856 DPRINTK(1, "virtual height not supported: %u\n",
2857 temp_p.height);
2858 return (-EINVAL);
2859 }
2860 if (!(depth_supported(temp_p.depth))) {
2861 DPRINTK(1, "depth not supported: %u\n", temp_p.depth);
2862 return (-EINVAL);
2863 }
2864 if ((temp_p.width * temp_p.height * depth2ByPP(temp_p.depth)) >
2865 l_fb_info->fb_size) {
2866 DPRINTK(1, "no memory for screen (%ux%ux%u)\n",
2867 temp_p.width, temp_p.height, temp_p.depth);
2868 return (-EINVAL);
2869 }
2870
2871 if ((!var->pixclock) ||
2872 (!var->right_margin) ||
2873 (!var->hsync_len) ||
2874 (!var->left_margin) ||
2875 (!var->lower_margin) ||
2876 (!var->vsync_len) || (!var->upper_margin)
2877 ) {
2878 unsigned long i = 0, done = 0;
2879 printk(KERN_WARNING "pm3fb: refusing to use a likely wrong timing\n");
2880
2881 while ((mode_base[i].user_mode.width) && !done) {
2882 if ((mode_base[i].user_mode.width == temp_p.width)
2883 && (mode_base[i].user_mode.height ==
2884 temp_p.height)) {
2885 printk(KERN_NOTICE "pm3fb: using close match %s\n",
2886 mode_base[i].name);
2887 temp_p = mode_base[i].user_mode;
2888 done = 1;
2889 }
2890 i++;
2891 }
2892 if (!done)
2893 return (-EINVAL);
2894 } else {
2895 temp_p.pixclock = PICOS2KHZ(var->pixclock);
2896 if (temp_p.pixclock > PM3_MAX_PIXCLOCK) {
2897 DPRINTK(1, "pixclock too high (%uKHz)\n",
2898 temp_p.pixclock);
2899 return (-EINVAL);
2900 }
2901
2902 temp_p.hsstart = var->right_margin;
2903 temp_p.hsend = var->right_margin + var->hsync_len;
2904 temp_p.hbend =
2905 var->right_margin + var->hsync_len + var->left_margin;
2906 temp_p.htotal = xres + temp_p.hbend;
2907
2908 temp_p.vsstart = var->lower_margin;
2909 temp_p.vsend = var->lower_margin + var->vsync_len;
2910 temp_p.vbend =
2911 var->lower_margin + var->vsync_len + var->upper_margin;
2912 temp_p.vtotal = var->yres + temp_p.vbend;
2913
2914 temp_p.stride = temp_p.width;
2915
2916 DPRINTK(2, "Using %d * %d, %d Khz, stride is %08x\n",
2917 temp_p.width, temp_p.height, temp_p.pixclock,
2918 temp_p.stride);
2919
2920 temp_p.base =
2921 pm3fb_Shiftbpp(l_fb_info, temp_p.depth,
2922 (var->yoffset * xres) + var->xoffset);
2923
2924 temp_p.video = 0;
2925
2926 if (var->sync & FB_SYNC_HOR_HIGH_ACT)
2927 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_HIGH;
2928 else
2929 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_LOW;
2930
2931 if (var->sync & FB_SYNC_VERT_HIGH_ACT)
2932 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_HIGH;
2933 else
2934 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_LOW;
2935
2936 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
2937 DPRINTK(1, "Interlaced mode not supported\n\n");
2938 return (-EINVAL);
2939 }
2940
2941 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
2942 temp_p.video |= PM3VideoControl_LINE_DOUBLE_ON;
2943 else
2944 temp_p.video |= PM3VideoControl_LINE_DOUBLE_OFF;
2945
2946 if (var->activate == FB_ACTIVATE_NOW)
2947 temp_p.video |= PM3VideoControl_ENABLE;
2948 else {
2949 temp_p.video |= PM3VideoControl_DISABLE;
2950 DPRINTK(2, "PM3Video disabled\n");
2951 }
2952
2953 switch (temp_p.depth) {
2954 case 8:
2955 temp_p.video |= PM3VideoControl_PIXELSIZE_8BIT;
2956 break;
2957 case 12:
2958 case 15:
2959 case 16:
2960 temp_p.video |= PM3VideoControl_PIXELSIZE_16BIT;
2961 break;
2962 case 32:
2963 temp_p.video |= PM3VideoControl_PIXELSIZE_32BIT;
2964 break;
2965 default:
2966 DPRINTK(1, "Unsupported depth\n");
2967 break;
2968 }
2969 }
2970 (*p) = temp_p;
2971
2972 #ifdef PM3FB_USE_ACCEL
2973 if (var->accel_flags & FB_ACCELF_TEXT)
2974 noaccel[l_fb_info->board_num] = 0;
2975 else
2976 noaccel[l_fb_info->board_num] = 1;
2977 #endif /* PM3FB_USE_ACCEL */
2978
2979 return (0);
2980 }
2981
2982 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d)
2983 {
2984 switch (d) {
2985 case 8:
2986 var->red.length = var->green.length = var->blue.length = 8;
2987 var->red.offset = var->green.offset = var->blue.offset = 0;
2988 var->transp.offset = var->transp.length = 0;
2989 break;
2990
2991 case 12:
2992 var->red.offset = 8;
2993 var->red.length = 4;
2994 var->green.offset = 4;
2995 var->green.length = 4;
2996 var->blue.offset = 0;
2997 var->blue.length = 4;
2998 var->transp.offset = 12;
2999 var->transp.length = 4;
3000 break;
3001
3002 case 15:
3003 var->red.offset = 10;
3004 var->red.length = 5;
3005 var->green.offset = 5;
3006 var->green.length = 5;
3007 var->blue.offset = 0;
3008 var->blue.length = 5;
3009 var->transp.offset = 15;
3010 var->transp.length = 1;
3011 break;
3012
3013 case 16:
3014 var->red.offset = 11;
3015 var->red.length = 5;
3016 var->green.offset = 5;
3017 var->green.length = 6;
3018 var->blue.offset = 0;
3019 var->blue.length = 5;
3020 var->transp.offset = var->transp.length = 0;
3021 break;
3022
3023 case 32:
3024 var->transp.offset = 24;
3025 var->red.offset = 16;
3026 var->green.offset = 8;
3027 var->blue.offset = 0;
3028 var->red.length = var->green.length =
3029 var->blue.length = var->transp.length = 8;
3030 break;
3031
3032 default:
3033 DPRINTK(1, "Unsupported depth %ld\n", d);
3034 break;
3035 }
3036 }
3037
3038 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
3039 const void *par, struct fb_info_gen *info)
3040 {
3041 struct pm3fb_par *p = (struct pm3fb_par *) par;
3042 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3043
3044 u32 base;
3045
3046 DTRACE;
3047
3048 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
3049 DASSERT((p != NULL), "pm3fb_par* not NULL");
3050 DASSERT((info != NULL), "fb_info_gen* not NULL");
3051
3052 memset(var, 0, sizeof(struct fb_var_screeninfo));
3053
3054 #ifdef PM3FB_USE_ACCEL
3055 if (!(noaccel[l_fb_info->board_num]))
3056 var->accel_flags |= FB_ACCELF_TEXT;
3057 #endif /* PM3FB_USE_ACCEL */
3058
3059 var->xres_virtual = p->width;
3060 var->yres_virtual = p->height;
3061 var->xres = p->htotal - p->hbend;
3062 var->yres = p->vtotal - p->vbend;
3063
3064 DPRINTK(2, "xres = %d, yres : %d\n", var->xres, var->yres);
3065
3066 var->right_margin = p->hsstart;
3067 var->hsync_len = p->hsend - p->hsstart;
3068 var->left_margin = p->hbend - p->hsend;
3069 var->lower_margin = p->vsstart;
3070 var->vsync_len = p->vsend - p->vsstart;
3071 var->upper_margin = p->vbend - p->vsend;
3072 var->bits_per_pixel = depth2bpp(p->depth);
3073
3074 pm3fb_encode_depth(var, p->depth);
3075
3076 base = pm3fb_Unshiftbpp(l_fb_info, p->depth, p->base);
3077
3078 var->xoffset = base % var->xres;
3079 var->yoffset = base / var->xres;
3080
3081 var->height = var->width = -1;
3082
3083 var->pixclock = KHZ2PICOS(p->pixclock);
3084
3085 if ((p->video & PM3VideoControl_HSYNC_MASK) ==
3086 PM3VideoControl_HSYNC_ACTIVE_HIGH)
3087 var->sync |= FB_SYNC_HOR_HIGH_ACT;
3088 if ((p->video & PM3VideoControl_VSYNC_MASK) ==
3089 PM3VideoControl_VSYNC_ACTIVE_HIGH)
3090 var->sync |= FB_SYNC_VERT_HIGH_ACT;
3091 if (p->video & PM3VideoControl_LINE_DOUBLE_ON)
3092 var->vmode = FB_VMODE_DOUBLE;
3093
3094 return (0);
3095 }
3096
3097 static void pm3fb_get_par(void *par, struct fb_info_gen *info)
3098 {
3099 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3100
3101 DTRACE;
3102
3103 if (!current_par_valid[l_fb_info->board_num]) {
3104 if (l_fb_info->use_current)
3105 pm3fb_read_mode(l_fb_info, l_fb_info->current_par);
3106 else
3107 memcpy(l_fb_info->current_par,
3108 &(mode_base[0].user_mode),
3109 sizeof(struct pm3fb_par));
3110 current_par_valid[l_fb_info->board_num] = 1;
3111 }
3112 *((struct pm3fb_par *) par) = *(l_fb_info->current_par);
3113 }
3114
3115 static void pm3fb_set_par(const void *par, struct fb_info_gen *info)
3116 {
3117 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3118
3119 DTRACE;
3120
3121 *(l_fb_info->current_par) = *((struct pm3fb_par *) par);
3122 current_par_valid[l_fb_info->board_num] = 1;
3123
3124 pm3fb_write_mode(l_fb_info);
3125
3126 #ifdef PM3FB_USE_ACCEL
3127 pm3fb_init_engine(l_fb_info);
3128 #endif /* PM3FB_USE_ACCEL */
3129 }
3130
3131 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
3132 unsigned char regno, unsigned char r,
3133 unsigned char g, unsigned char b)
3134 {
3135 DTRACE;
3136
3137 PM3_SLOW_WRITE_REG(PM3RD_PaletteWriteAddress, regno);
3138 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, r);
3139 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, g);
3140 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, b);
3141 }
3142
3143 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
3144 unsigned *blue, unsigned *transp,
3145 struct fb_info *info)
3146 {
3147 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3148
3149 DTRACE;
3150
3151 if (regno < 256) {
3152 *red =
3153 l_fb_info->palette[regno].red << 8 | l_fb_info->
3154 palette[regno].red;
3155 *green =
3156 l_fb_info->palette[regno].green << 8 | l_fb_info->
3157 palette[regno].green;
3158 *blue =
3159 l_fb_info->palette[regno].blue << 8 | l_fb_info->
3160 palette[regno].blue;
3161 *transp =
3162 l_fb_info->palette[regno].transp << 8 | l_fb_info->
3163 palette[regno].transp;
3164 }
3165 return (regno > 255);
3166 }
3167
3168 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
3169 unsigned blue, unsigned transp,
3170 struct fb_info *info)
3171 {
3172 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3173
3174 DTRACE;
3175
3176 if (regno < 16) {
3177 switch (l_fb_info->current_par->depth) {
3178 #ifdef FBCON_HAS_CFB8
3179 case 8:
3180 break;
3181 #endif
3182 #ifdef FBCON_HAS_CFB16
3183 case 12:
3184 l_fb_info->cmap.cmap12[regno] =
3185 (((u32) red & 0xf000) >> 4) |
3186 (((u32) green & 0xf000) >> 8) |
3187 (((u32) blue & 0xf000) >> 12);
3188 break;
3189
3190 case 15:
3191 l_fb_info->cmap.cmap15[regno] =
3192 (((u32) red & 0xf800) >> 1) |
3193 (((u32) green & 0xf800) >> 6) |
3194 (((u32) blue & 0xf800) >> 11);
3195 break;
3196
3197 case 16:
3198 l_fb_info->cmap.cmap16[regno] =
3199 ((u32) red & 0xf800) |
3200 (((u32) green & 0xfc00) >> 5) |
3201 (((u32) blue & 0xf800) >> 11);
3202 break;
3203 #endif
3204 #ifdef FBCON_HAS_CFB32
3205 case 32:
3206 l_fb_info->cmap.cmap32[regno] =
3207 (((u32) transp & 0xff00) << 16) |
3208 (((u32) red & 0xff00) << 8) |
3209 (((u32) green & 0xff00)) |
3210 (((u32) blue & 0xff00) >> 8);
3211 break;
3212 #endif
3213 default:
3214 DPRINTK(1, "bad depth %u\n",
3215 l_fb_info->current_par->depth);
3216 break;
3217 }
3218 }
3219 if (regno < 256) {
3220 l_fb_info->palette[regno].red = red >> 8;
3221 l_fb_info->palette[regno].green = green >> 8;
3222 l_fb_info->palette[regno].blue = blue >> 8;
3223 l_fb_info->palette[regno].transp = transp >> 8;
3224 if (l_fb_info->current_par->depth == 8)
3225 pm3fb_set_color(l_fb_info, regno, red >> 8,
3226 green >> 8, blue >> 8);
3227 }
3228 return (regno > 255);
3229 }
3230
3231 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info)
3232 {
3233 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3234 u32 video;
3235
3236 DTRACE;
3237
3238 if (!current_par_valid[l_fb_info->board_num])
3239 return (1);
3240
3241 video = l_fb_info->current_par->video;
3242
3243 /*
3244 * Oxygen VX1 - it appears that setting PM3VideoControl and
3245 * then PM3RD_SyncControl to the same SYNC settings undoes
3246 * any net change - they seem to xor together. Only set the
3247 * sync options in PM3RD_SyncControl. --rmk
3248 */
3249 video &= ~(PM3VideoControl_HSYNC_MASK |
3250 PM3VideoControl_VSYNC_MASK);
3251 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
3252 PM3VideoControl_VSYNC_ACTIVE_HIGH;
3253
3254 if (blank_mode > 0) {
3255 switch (blank_mode - 1) {
3256
3257 case VESA_NO_BLANKING: /* FIXME */
3258 video = video & ~(PM3VideoControl_ENABLE);
3259 break;
3260
3261 case VESA_HSYNC_SUSPEND:
3262 video = video & ~(PM3VideoControl_HSYNC_MASK |
3263 PM3VideoControl_BLANK_ACTIVE_LOW);
3264 break;
3265 case VESA_VSYNC_SUSPEND:
3266 video = video & ~(PM3VideoControl_VSYNC_MASK |
3267 PM3VideoControl_BLANK_ACTIVE_LOW);
3268 break;
3269 case VESA_POWERDOWN:
3270 video = video & ~(PM3VideoControl_HSYNC_MASK |
3271 PM3VideoControl_VSYNC_MASK |
3272 PM3VideoControl_BLANK_ACTIVE_LOW);
3273 break;
3274 default:
3275 DPRINTK(1, "Unsupported blanking %d\n",
3276 blank_mode);
3277 return (1);
3278 break;
3279 }
3280 }
3281
3282 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
3283
3284 return (0);
3285 }
3286
3287 static void pm3fb_set_disp(const void *par, struct display *disp,
3288 struct fb_info_gen *info)
3289 {
3290 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3291 struct pm3fb_par *p = (struct pm3fb_par *) par;
3292 u32 flags;
3293
3294 DTRACE;
3295
3296 local_irq_save(flags);
3297 info->info.screen_base = l_fb_info->v_fb;
3298 switch (p->depth) {
3299 #ifdef FBCON_HAS_CFB8
3300 case 8:
3301 #ifdef PM3FB_USE_ACCEL
3302 if (!(noaccel[l_fb_info->board_num]))
3303 disp->dispsw = &pm3fb_cfb8;
3304 else
3305 #endif /* PM3FB_USE_ACCEL */
3306 disp->dispsw = &fbcon_cfb8;
3307 break;
3308 #endif
3309 #ifdef FBCON_HAS_CFB16
3310 case 12:
3311 #ifdef PM3FB_USE_ACCEL
3312 if (!(noaccel[l_fb_info->board_num]))
3313 disp->dispsw = &pm3fb_cfb16;
3314 else
3315 #endif /* PM3FB_USE_ACCEL */
3316 disp->dispsw = &fbcon_cfb16;
3317 disp->dispsw_data = l_fb_info->cmap.cmap12;
3318 break;
3319 case 15:
3320 #ifdef PM3FB_USE_ACCEL
3321 if (!(noaccel[l_fb_info->board_num]))
3322 disp->dispsw = &pm3fb_cfb16;
3323 else
3324 #endif /* PM3FB_USE_ACCEL */
3325 disp->dispsw = &fbcon_cfb16;
3326 disp->dispsw_data = l_fb_info->cmap.cmap15;
3327 break;
3328 case 16:
3329 #ifdef PM3FB_USE_ACCEL
3330 if (!(noaccel[l_fb_info->board_num]))
3331 disp->dispsw = &pm3fb_cfb16;
3332 else
3333 #endif /* PM3FB_USE_ACCEL */
3334 disp->dispsw = &fbcon_cfb16;
3335 disp->dispsw_data = l_fb_info->cmap.cmap16;
3336 break;
3337 #endif
3338 #ifdef FBCON_HAS_CFB32
3339 case 32:
3340 #ifdef PM3FB_USE_ACCEL
3341 if (!(noaccel[l_fb_info->board_num]))
3342 disp->dispsw = &pm3fb_cfb32;
3343 else
3344 #endif /* PM3FB_USE_ACCEL */
3345 disp->dispsw = &fbcon_cfb32;
3346 disp->dispsw_data = l_fb_info->cmap.cmap32;
3347 break;
3348 #endif /* FBCON_HAS_CFB32 */
3349 default:
3350 disp->dispsw = &fbcon_dummy;
3351 DPRINTK(1, "Invalid depth, using fbcon_dummy\n");
3352 break;
3353 }
3354 local_irq_restore(flags);
3355 }
3356
3357 /* */
3358 static void pm3fb_detect(void)
3359 {
3360 struct pci_dev *dev_array[PM3_MAX_BOARD];
3361 struct pci_dev *dev = NULL;
3362 struct pm3fb_info *l_fb_info = &(fb_info[0]);
3363 unsigned long i, j, done;
3364
3365 DTRACE;
3366
3367 for (i = 0; i < PM3_MAX_BOARD; i++) {
3368 dev_array[i] = NULL;
3369 fb_info[i].dev = NULL;
3370 }
3371
3372 dev =
3373 pci_find_device(PCI_VENDOR_ID_3DLABS,
3374 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3375
3376 for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) {
3377 dev_array[i] = dev;
3378 dev =
3379 pci_find_device(PCI_VENDOR_ID_3DLABS,
3380 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3381 }
3382
3383 if (dev) { /* more than PM3_MAX_BOARD */
3384 printk(KERN_WARNING "pm3fb: Warning: more than %d boards found\n",
3385 PM3_MAX_BOARD);
3386 }
3387
3388 if (!dev_array[0]) { /* not a single board, abort */
3389 return;
3390 }
3391
3392 /* allocate user-defined boards */
3393 for (i = 0; i < PM3_MAX_BOARD; i++) {
3394 if ((bus[i] >= 0) && (slot[i] >= 0) && (func[i] >= 0)) {
3395 for (j = 0; j < PM3_MAX_BOARD; j++) {
3396 if ((dev_array[j] != NULL) &&
3397 (dev_array[j]->bus->number == bus[i])
3398 && (PCI_SLOT(dev_array[j]->devfn) ==
3399 slot[i])
3400 && (PCI_FUNC(dev_array[j]->devfn) ==
3401 func[i])) {
3402 fb_info[i].dev = dev_array[j];
3403 dev_array[j] = NULL;
3404 }
3405 }
3406 }
3407 }
3408 /* allocate remaining boards */
3409 for (i = 0; i < PM3_MAX_BOARD; i++) {
3410 if (fb_info[i].dev == NULL) {
3411 done = 0;
3412 for (j = 0; ((j < PM3_MAX_BOARD) && (!done)); j++) {
3413 if (dev_array[j] != NULL) {
3414 fb_info[i].dev = dev_array[j];
3415 dev_array[j] = NULL;
3416 done = 1;
3417 }
3418 }
3419 }
3420 }
3421
3422 /* at that point, all PCI Permedia3 are detected and allocated */
3423 /* now, initialize... or not */
3424 for (i = 0; i < PM3_MAX_BOARD; i++) {
3425 l_fb_info = &(fb_info[i]);
3426 if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */
3427 #ifdef SUPPORT_FB_OF
3428 struct device_node *dp =
3429 find_pci_device_OFnode(l_fb_info->dev->bus->
3430 number,
3431 l_fb_info->dev->devfn);
3432
3433 if ((dp) && (!strncmp(dp->name, "formacGA12", 10))) {
3434 /* do nothing, init of board is done in pm3fb_of_init */
3435 } else {
3436 #endif
3437 DPRINTK(2,
3438 "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n",
3439 (unsigned long) l_fb_info->dev,
3440 (unsigned long) l_fb_info->dev->
3441 vendor,
3442 (unsigned long) l_fb_info->dev->
3443 device,
3444 (unsigned long)
3445 pci_resource_start(l_fb_info->dev,
3446 0),
3447 (unsigned long)
3448 pci_resource_start(l_fb_info->dev,
3449 1),
3450 (unsigned long)
3451 pci_resource_start(l_fb_info->dev,
3452 2),
3453 (unsigned long)
3454 pci_resource_start(l_fb_info->dev,
3455 3),
3456 (unsigned long)
3457 pci_resource_start(l_fb_info->dev,
3458 4),
3459 (unsigned long)
3460 pci_resource_start(l_fb_info->dev,
3461 5),
3462 (unsigned long) l_fb_info->dev->
3463 irq);
3464
3465 l_fb_info->pIOBase =
3466 (unsigned char *)
3467 pci_resource_start(l_fb_info->dev, 0);
3468 #ifdef __BIG_ENDIAN
3469 l_fb_info->pIOBase += PM3_REGS_SIZE;
3470 #endif
3471 l_fb_info->vIOBase = (unsigned char *) -1;
3472 l_fb_info->p_fb =
3473 (unsigned char *)
3474 pci_resource_start(l_fb_info->dev, 1);
3475 l_fb_info->v_fb = (unsigned char *) -1;
3476
3477 #if (defined KERNEL_2_4) || (defined KERNEL_2_5) /* full resource management, new in linux-2.4.x */
3478 if (!request_mem_region
3479 ((unsigned long)l_fb_info->p_fb, 64 * 1024 * 1024, /* request full aperture size */
3480 "pm3fb")) {
3481 printk
3482 (KERN_ERR "pm3fb: Error: couldn't request framebuffer memory, board #%ld\n",
3483 l_fb_info->board_num);
3484 continue;
3485 }
3486 if (!request_mem_region
3487 ((unsigned long)l_fb_info->pIOBase, PM3_REGS_SIZE,
3488 "pm3fb I/O regs")) {
3489 printk
3490 (KERN_ERR "pm3fb: Error: couldn't request IObase memory, board #%ld\n",
3491 l_fb_info->board_num);
3492 continue;
3493 }
3494 #endif /* KERNEL_2_4 or KERNEL_2_5 */
3495 if (forcesize[l_fb_info->board_num])
3496 l_fb_info->fb_size = forcesize[l_fb_info->board_num];
3497
3498 l_fb_info->fb_size =
3499 pm3fb_size_memory(l_fb_info);
3500
3501 if (l_fb_info->fb_size) {
3502 (void) pci_enable_device(l_fb_info->dev);
3503 pm3fb_common_init(l_fb_info);
3504 } else
3505 printk(KERN_ERR "pm3fb: memory problem, not enabling board #%ld\n", l_fb_info->board_num);
3506
3507 #ifdef SUPPORT_FB_OF
3508 }
3509 #endif /* SUPPORT_FB_OF */
3510 }
3511 }
3512 }
3513
3514 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
3515 struct fb_info_gen *info)
3516 {
3517 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3518
3519 DTRACE;
3520
3521 if (!current_par_valid[l_fb_info->board_num])
3522 return -EINVAL;
3523
3524 l_fb_info->current_par->base = /* in 128 bits chunk - i.e. AFTER Shiftbpp */
3525 pm3fb_Shiftbpp(l_fb_info,
3526 l_fb_info->current_par->depth,
3527 (var->yoffset * l_fb_info->current_par->width) +
3528 var->xoffset);
3529 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
3530 return 0;
3531 }
3532
3533 static int pm3fb_ioctl(struct inode *inode, struct file *file,
3534 u_int cmd, u_long arg, int con,
3535 struct fb_info *info)
3536 {
3537 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3538 u32 cm, i;
3539 #ifdef PM3FB_MASTER_DEBUG
3540 char cc[3];
3541 #endif /* PM3FB_MASTER_DEBUG */
3542
3543 switch(cmd)
3544 {
3545 #ifdef PM3FB_MASTER_DEBUG
3546 case PM3FBIO_CLEARMEMORY:
3547 if (copy_from_user(&cm, (void *)arg, sizeof(u32)))
3548 return(-EFAULT);
3549 pm3fb_clear_memory(l_fb_info, cm);
3550 return(0);
3551 break;
3552
3553 case PM3FBIO_CLEARCMAP:
3554 if (copy_from_user(cc, (void*)arg, 3 * sizeof(char)))
3555 return(-EFAULT);
3556 pm3fb_clear_colormap(l_fb_info, cc[0], cc[1], cc[2]);
3557 return(0);
3558 break;
3559 #endif /* PM3FB_MASTER_DEBUG */
3560
3561 case PM3FBIO_RESETCHIP:
3562 cm = 1;
3563 PM3_SLOW_WRITE_REG(PM3ResetStatus, 1);
3564 for (i = 0 ; (i < 10000) && cm ; i++)
3565 {
3566 PM3_DELAY(10);
3567 cm = PM3_READ_REG(PM3ResetStatus);
3568 }
3569 if (cm)
3570 {
3571 printk(KERN_ERR "pm3fb: chip reset failed with status 0x%x\n", cm);
3572 return(-EIO);
3573 }
3574 /* first thing first, reload memory timings */
3575 pm3fb_write_memory_timings(l_fb_info);
3576 #ifdef PM3FB_USE_ACCEL
3577 pm3fb_init_engine(l_fb_info);
3578 #endif /* PM3FB_USE_ACCEL */
3579 pm3fb_write_mode(l_fb_info);
3580 return(0);
3581 break;
3582
3583 default:
3584 DPRINTK(2, "unknown ioctl: %d (%x)\n", cmd, cmd);
3585 return(-EINVAL);
3586 }
3587 }
3588
3589 /* ****************************************** */
3590 /* ***** standard FB API init functions ***** */
3591 /* ****************************************** */
3592
3593 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3594 int __init pm3fb_setup(char *options)
3595 #endif
3596 #ifdef KERNEL_2_2
3597 __initfunc(void pm3fb_setup(char *options, int *ints))
3598 #endif
3599 {
3600 long opsi = strlen(options);
3601
3602 DTRACE;
3603
3604 memcpy(g_options, options,
3605 ((opsi + 1) >
3606 PM3_OPTIONS_SIZE) ? PM3_OPTIONS_SIZE : (opsi + 1));
3607 g_options[PM3_OPTIONS_SIZE - 1] = 0;
3608
3609 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3610 return (0);
3611 #endif
3612 }
3613
3614 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3615 int __init pm3fb_init(void)
3616 #endif
3617 #ifdef KERNEL_2_2
3618 __initfunc(void pm3fb_init(void))
3619 #endif
3620 {
3621 DTRACE;
3622
3623 DPRINTK(2, "This is pm3fb.c, CVS version: $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $");
3624
3625 pm3fb_real_setup(g_options);
3626
3627 pm3fb_detect();
3628
3629 if (!fb_info[0].dev) { /* not even one board ??? */
3630 DPRINTK(1, "No PCI Permedia3 board detected\n");
3631 }
3632 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3633 return (0);
3634 #endif
3635 }
3636
3637 #ifdef SUPPORT_FB_OF /* linux-2.2.x only */
3638 __initfunc(void pm3fb_of_init(struct device_node *dp))
3639 {
3640 struct pm3fb_info *l_fb_info = NULL;
3641 unsigned long i;
3642 long bn = -1;
3643 struct device_node *dn;
3644
3645 DTRACE;
3646
3647 DPRINTK(2, "OpenFirmware board : %s\n", dp->full_name);
3648
3649 for (i = 0; i < dp->n_addrs; i++) {
3650 DPRINTK(2, "MemRange : 0x%08x - 0x%x\n",
3651 dp->addrs[i].address, dp->addrs[i].size);
3652 }
3653
3654 for (i = 0; i < PM3_MAX_BOARD; i++) { /* find which PCI board is the OF device */
3655 if (fb_info[i].dev) {
3656 dn = find_pci_device_OFnode(fb_info[i].dev->bus->
3657 number,
3658 fb_info[i].dev->devfn);
3659 if (dn == dp) {
3660 if (bn == -1)
3661 bn = i;
3662 else {
3663 DPRINTK(1,
3664 "Error: Multiple PCI device for a single OpenFirmware node\n");
3665 }
3666 }
3667 }
3668 }
3669
3670 if (bn == -1) {
3671 DPRINTK(1, "Warning: non-PCI Permedia3 found\n");
3672 i = 0;
3673 while (fb_info[i].dev && (i < PM3_MAX_BOARD))
3674 i++;
3675 if (i < PM3_MAX_BOARD)
3676 bn = i;
3677 else {
3678 printk
3679 (KERN_ERR "pm3fb: Error: Couldn't find room for OpenFirmware device");
3680 return;
3681 }
3682 }
3683
3684 l_fb_info = &(fb_info[bn]);
3685
3686 l_fb_info->dn = dp;
3687
3688 l_fb_info->pIOBase = (unsigned char *) dp->addrs[3].address;
3689 #ifdef __BIG_ENDIAN
3690 l_fb_info->pIOBase += PM3_REGS_SIZE;
3691 #endif
3692 l_fb_info->vIOBase = (unsigned char *) -1;
3693 l_fb_info->p_fb = (unsigned char *) dp->addrs[1].address;
3694 l_fb_info->v_fb = (unsigned char *) -1;
3695
3696 l_fb_info->fb_size = pm3fb_size_memory(l_fb_info); /* (unsigned long)dp->addrs[1].size; *//* OF is a liar ! it claims 256 Mb */
3697
3698 DPRINTK(2,
3699 "OpenFirmware board (#%ld) : IOBase 0x%08lx, p_fb 0x%08lx, fb_size %d KB\n",
3700 bn, (unsigned long) l_fb_info->pIOBase,
3701 (unsigned long) l_fb_info->p_fb, l_fb_info->fb_size >> 10);
3702
3703 l_fb_info->use_current = 1; /* will use current mode by default */
3704
3705 pm3fb_common_init(l_fb_info);
3706 }
3707 #endif /* SUPPORT_FB_OF */
3708
3709 /* ************************* */
3710 /* **** Module support ***** */
3711 /* ************************* */
3712
3713 #ifdef MODULE
3714 MODULE_AUTHOR("Romain Dolbeau");
3715 MODULE_DESCRIPTION("Permedia3 framebuffer device driver");
3716 static char *mode[PM3_MAX_BOARD];
3717 MODULE_PARM(mode,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3718 MODULE_PARM_DESC(mode,"video mode");
3719 MODULE_PARM(disable,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3720 MODULE_PARM_DESC(disable,"disable board");
3721 static short off[PM3_MAX_BOARD];
3722 MODULE_PARM(off,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3723 MODULE_PARM_DESC(off,"disable board");
3724 static char *pciid[PM3_MAX_BOARD];
3725 MODULE_PARM(pciid,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3726 MODULE_PARM_DESC(pciid,"board PCI Id");
3727 MODULE_PARM(noaccel,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3728 MODULE_PARM_DESC(noaccel,"disable accel");
3729 static char *font[PM3_MAX_BOARD];
3730 MODULE_PARM(font,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3731 MODULE_PARM_DESC(font,"choose font");
3732 MODULE_PARM(depth,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3733 MODULE_PARM_DESC(depth,"boot-time depth");
3734 MODULE_PARM(printtimings, "h");
3735 MODULE_PARM_DESC(printtimings, "print the memory timings of the card(s)");
3736 MODULE_PARM(forcesize, PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3737 MODULE_PARM_DESC(forcesize, "force specified memory size");
3738 /*
3739 MODULE_SUPPORTED_DEVICE("Permedia3 PCI boards")
3740 MODULE_GENERIC_TABLE(gtype,name)
3741 MODULE_DEVICE_TABLE(type,name)
3742 */
3743
3744 void pm3fb_build_options(void)
3745 {
3746 int i;
3747 char ts[128];
3748
3749 strcpy(g_options, "pm3fb");
3750 for (i = 0; i < PM3_MAX_BOARD ; i++)
3751 {
3752 if (mode[i])
3753 {
3754 sprintf(ts, ",mode:%d:%s", i, mode[i]);
3755 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3756 }
3757 if (disable[i] || off[i])
3758 {
3759 sprintf(ts, ",disable:%d:", i);
3760 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3761 }
3762 if (pciid[i])
3763 {
3764 sprintf(ts, ",pciid:%d:%s", i, pciid[i]);
3765 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3766 }
3767 if (noaccel[i])
3768 {
3769 sprintf(ts, ",noaccel:%d:", i);
3770 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3771 }
3772 if (font[i])
3773 {
3774 sprintf(ts, ",font:%d:%s", i, font[i]);
3775 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3776 }
3777 if (depth[i])
3778 {
3779 sprintf(ts, ",depth:%d:%d", i, depth[i]);
3780 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3781 }
3782 }
3783 g_options[PM3_OPTIONS_SIZE - 1] = '\0';
3784 DPRINTK(1, "pm3fb use options: %s\n", g_options);
3785 }
3786
3787 int init_module(void)
3788 {
3789 DTRACE;
3790
3791 pm3fb_build_options();
3792
3793 pm3fb_init();
3794
3795 return (0);
3796 }
3797
3798 void cleanup_module(void)
3799 {
3800 DTRACE;
3801 {
3802 unsigned long i;
3803 struct pm3fb_info *l_fb_info;
3804 for (i = 0; i < PM3_MAX_BOARD; i++) {
3805 l_fb_info = &(fb_info[i]);
3806 if ((l_fb_info->dev != NULL)
3807 && (!(disable[l_fb_info->board_num]))) {
3808 if (l_fb_info->vIOBase !=
3809 (unsigned char *) -1) {
3810 pm3fb_unmapIO(l_fb_info);
3811 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3812 release_mem_region(l_fb_info->p_fb,
3813 l_fb_info->
3814 fb_size);
3815 release_mem_region(l_fb_info->
3816 pIOBase,
3817 PM3_REGS_SIZE);
3818 #endif /* KERNEL_2_4 or KERNEL_2_5 */
3819 }
3820 unregister_framebuffer(&l_fb_info->gen.
3821 info);
3822 }
3823 }
3824 }
3825 return;
3826 }
3827 #endif /* MODULE */
MOXA 2.6.9 from sdlinux-moxaart.tgz