1 /***************************************************************************\
3 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
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8 |* use this code in individual and commercial software. *|
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11 |* tion and internal comments to the code, notices to the end user *|
14 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
16 |* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
17 |* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
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20 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
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28 |* U.S. Government End Users. This source code is a "commercial *|
29 |* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
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31 |* computer software documentation," as such terms are used in *|
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33 |* ment only as a commercial end item. Consistent with 48 C.F.R. *|
34 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
35 |* all U.S. Government End Users acquire the source code with only *|
36 |* those rights set forth herein. *|
38 \***************************************************************************/
41 * GPL licensing note -- nVidia is allowing a liberal interpretation of
42 * the documentation restriction above, to merely say that this nVidia's
43 * copyright and disclaimer should be included with all code derived
44 * from this source. -- Jeff Garzik <jgarzik@pobox.com>, 01/Nov/99
47 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.21 2002/10/14 18:22:46 mvojkovi Exp $ */
50 #define RIVA_SW_VERSION 0x00010003
67 * Typedefs to force certain sized values.
69 typedef unsigned char U008
;
70 typedef unsigned short U016
;
71 typedef unsigned int U032
;
76 #if defined(__powerpc__)
78 #define NV_WR08(p,i,d) out_8(p+i, d)
79 #define NV_RD08(p,i) in_8(p+i)
81 #define NV_WR08(p,i,d) (((U008 *)(p))[i]=(d))
82 #define NV_RD08(p,i) (((U008 *)(p))[i])
84 #define NV_WR16(p,i,d) (((U016 *)(p))[(i)/2]=(d))
85 #define NV_RD16(p,i) (((U016 *)(p))[(i)/2])
86 #define NV_WR32(p,i,d) (((U032 *)(p))[(i)/4]=(d))
87 #define NV_RD32(p,i) (((U032 *)(p))[(i)/4])
88 #define VGA_WR08(p,i,d) NV_WR08(p,i,d)
89 #define VGA_RD08(p,i) NV_RD08(p,i)
92 * Define different architectures.
94 #define NV_ARCH_03 0x03
95 #define NV_ARCH_04 0x04
96 #define NV_ARCH_10 0x10
97 #define NV_ARCH_20 0x20
98 #define NV_ARCH_30 0x30
99 #define NV_ARCH_40 0x40
101 /***************************************************************************\
105 \***************************************************************************/
108 * Raster OPeration. Windows style ROP3.
110 typedef volatile struct
119 U032 reserved01
[0x0BB];
123 * 8X8 Monochrome pattern.
125 typedef volatile struct
134 U032 reserved01
[0x0BD];
136 U032 reserved03
[0x001];
142 * Scissor clip rectangle.
144 typedef volatile struct
153 U032 reserved01
[0x0BB];
158 * 2D filled rectangle.
160 typedef volatile struct
169 U032 reserved01
[0x0BC];
171 U032 reserved03
[0x03E];
176 * 2D screen-screen BLT.
178 typedef volatile struct
187 U032 reserved01
[0x0BB];
195 typedef volatile struct
204 U032 reserved01
[0x0BC];
208 U032 reserved02
[0x03C];
212 * Filled rectangle combined with monochrome expand. Useful for glyphs.
214 typedef volatile struct
223 U032 reserved01
[0x0BB];
224 U032 reserved03
[(0x040)-1];
230 } UnclippedRectangle
[64];
231 U032 reserved04
[(0x080)-3];
242 } ClippedRectangle
[64];
243 U032 reserved05
[(0x080)-5];
252 U032 MonochromeData1C
;
253 U032 reserved06
[(0x080)+121];
261 U032 WidthHeightOutD
;
263 U032 MonochromeData1D
;
264 U032 reserved07
[(0x080)+120];
273 U032 WidthHeightOutE
;
275 U032 MonochromeData01E
;
278 * 3D textured, Z buffered triangle.
280 typedef volatile struct
289 U032 reserved01
[0x0BC];
294 /* This is a problem on LynxOS */
300 U032 reserved02
[0x339];
309 } RivaTexturedTriangle03
;
310 typedef volatile struct
319 U032 reserved01
[0x0BB];
325 /* This is a problem on LynxOS */
331 U032 reserved02
[0x39];
344 } RivaTexturedTriangle05
;
348 typedef volatile struct
357 U032 reserved01
[0x0BC];
358 U032 Color
; /* source color 0304-0307*/
359 U032 Reserved02
[0x03e];
360 struct { /* start aliased methods in array 0400- */
361 U032 point0
; /* y_x S16_S16 in pixels 0- 3*/
362 U032 point1
; /* y_x S16_S16 in pixels 4- 7*/
363 } Lin
[16]; /* end of aliased methods in array -047f*/
364 struct { /* start aliased methods in array 0480- */
365 U032 point0X
; /* in pixels, 0 at left 0- 3*/
366 U032 point0Y
; /* in pixels, 0 at top 4- 7*/
367 U032 point1X
; /* in pixels, 0 at left 8- b*/
368 U032 point1Y
; /* in pixels, 0 at top c- f*/
369 } Lin32
[8]; /* end of aliased methods in array -04ff*/
370 U032 PolyLin
[32]; /* y_x S16_S16 in pixels 0500-057f*/
371 struct { /* start aliased methods in array 0580- */
372 U032 x
; /* in pixels, 0 at left 0- 3*/
373 U032 y
; /* in pixels, 0 at top 4- 7*/
374 } PolyLin32
[16]; /* end of aliased methods in array -05ff*/
375 struct { /* start aliased methods in array 0600- */
376 U032 color
; /* source color 0- 3*/
377 U032 point
; /* y_x S16_S16 in pixels 4- 7*/
378 } ColorPolyLin
[16]; /* end of aliased methods in array -067f*/
383 typedef volatile struct
392 U032 reserved01
[0x0BE];
395 typedef volatile struct
404 U032 reserved01
[0x0BD];
406 U032 RenderBufferOffset
;
410 /***************************************************************************\
412 * Virtualized RIVA H/W interface. *
414 \***************************************************************************/
419 struct _riva_hw_inst
;
420 struct _riva_hw_state
;
422 * Virtialized chip interface. Makes RIVA 128 and TNT look alike.
424 typedef struct _riva_hw_inst
427 * Chip specific settings.
433 U032 RamAmountKBytes
;
434 U032 MaxVClockFreqKHz
;
435 U032 RamBandwidthKBytesPerSec
;
445 * Non-FIFO registers.
447 volatile U032
*PCRTC0
;
448 volatile U032
*PCRTC
;
449 volatile U032
*PRAMDAC0
;
451 volatile U032
*PFIFO
;
452 volatile U032
*PGRAPH
;
453 volatile U032
*PEXTDEV
;
454 volatile U032
*PTIMER
;
456 volatile U032
*PRAMIN
;
458 volatile U032
*CURSOR
;
459 volatile U008
*PCIO0
;
462 volatile U008
*PDIO0
;
464 volatile U032
*PRAMDAC
;
466 * Common chip functions.
468 int (*Busy
)(struct _riva_hw_inst
*);
469 void (*CalcStateExt
)(struct _riva_hw_inst
*,struct _riva_hw_state
*,int,int,int,int,int);
470 void (*LoadStateExt
)(struct _riva_hw_inst
*,struct _riva_hw_state
*);
471 void (*UnloadStateExt
)(struct _riva_hw_inst
*,struct _riva_hw_state
*);
472 void (*SetStartAddress
)(struct _riva_hw_inst
*,U032
);
473 void (*SetSurfaces2D
)(struct _riva_hw_inst
*,U032
,U032
);
474 void (*SetSurfaces3D
)(struct _riva_hw_inst
*,U032
,U032
);
475 int (*ShowHideCursor
)(struct _riva_hw_inst
*,int);
476 void (*LockUnlock
)(struct _riva_hw_inst
*, int);
478 * Current extended mode settings.
480 struct _riva_hw_state
*CurrentState
;
491 RivaTexturedTriangle03
*Tri03
;
492 RivaTexturedTriangle05
*Tri05
;
495 * Extended mode state information.
497 typedef struct _riva_hw_state
537 int RivaGetConfig(RIVA_HW_INST
*, unsigned int);
539 * FIFO Free Count. Should attempt to yield processor if RIVA is busy.
542 #define RIVA_FIFO_FREE(hwinst,hwptr,cnt) \
544 while ((hwinst).FifoFreeCount < (cnt)) \
545 (hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2; \
546 (hwinst).FifoFreeCount -= (cnt); \
548 #endif /* __RIVA_HW_H__ */