2 * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
4 * Maintained by Ani Joshi <ajoshi@shell.unixbox.com>
6 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
8 * Based on radeonfb-i2c.c
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive
15 #include <linux/config.h>
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/sched.h>
19 #include <linux/delay.h>
20 #include <linux/pci.h>
30 static void riva_gpio_setscl(void* data
, int state
)
32 struct riva_i2c_chan
*chan
= (struct riva_i2c_chan
*)data
;
33 struct riva_par
*par
= chan
->par
;
36 VGA_WR08(par
->riva
.PCIO
, 0x3d4, chan
->ddc_base
+ 1);
37 val
= VGA_RD08(par
->riva
.PCIO
, 0x3d5) & 0xf0;
44 VGA_WR08(par
->riva
.PCIO
, 0x3d4, chan
->ddc_base
+ 1);
45 VGA_WR08(par
->riva
.PCIO
, 0x3d5, val
| 0x1);
48 static void riva_gpio_setsda(void* data
, int state
)
50 struct riva_i2c_chan
*chan
= (struct riva_i2c_chan
*)data
;
51 struct riva_par
*par
= chan
->par
;
54 VGA_WR08(par
->riva
.PCIO
, 0x3d4, chan
->ddc_base
+ 1);
55 val
= VGA_RD08(par
->riva
.PCIO
, 0x3d5) & 0xf0;
62 VGA_WR08(par
->riva
.PCIO
, 0x3d4, chan
->ddc_base
+ 1);
63 VGA_WR08(par
->riva
.PCIO
, 0x3d5, val
| 0x1);
66 static int riva_gpio_getscl(void* data
)
68 struct riva_i2c_chan
*chan
= (struct riva_i2c_chan
*)data
;
69 struct riva_par
*par
= chan
->par
;
72 VGA_WR08(par
->riva
.PCIO
, 0x3d4, chan
->ddc_base
);
73 if (VGA_RD08(par
->riva
.PCIO
, 0x3d5) & 0x04)
76 val
= VGA_RD08(par
->riva
.PCIO
, 0x3d5);
81 static int riva_gpio_getsda(void* data
)
83 struct riva_i2c_chan
*chan
= (struct riva_i2c_chan
*)data
;
84 struct riva_par
*par
= chan
->par
;
87 VGA_WR08(par
->riva
.PCIO
, 0x3d4, chan
->ddc_base
);
88 if (VGA_RD08(par
->riva
.PCIO
, 0x3d5) & 0x08)
94 #define I2C_ALGO_RIVA 0x0e0000
95 static int riva_setup_i2c_bus(struct riva_i2c_chan
*chan
, const char *name
)
99 strcpy(chan
->adapter
.name
, name
);
100 chan
->adapter
.owner
= THIS_MODULE
;
101 chan
->adapter
.id
= I2C_ALGO_RIVA
;
102 chan
->adapter
.algo_data
= &chan
->algo
;
103 chan
->adapter
.dev
.parent
= &chan
->par
->pdev
->dev
;
104 chan
->algo
.setsda
= riva_gpio_setsda
;
105 chan
->algo
.setscl
= riva_gpio_setscl
;
106 chan
->algo
.getsda
= riva_gpio_getsda
;
107 chan
->algo
.getscl
= riva_gpio_getscl
;
108 chan
->algo
.udelay
= 40;
109 chan
->algo
.mdelay
= 5;
110 chan
->algo
.timeout
= 20;
111 chan
->algo
.data
= chan
;
113 i2c_set_adapdata(&chan
->adapter
, chan
);
115 /* Raise SCL and SDA */
116 riva_gpio_setsda(chan
, 1);
117 riva_gpio_setscl(chan
, 1);
120 rc
= i2c_bit_add_bus(&chan
->adapter
);
122 dev_dbg(&chan
->par
->pdev
->dev
, "I2C bus %s registered.\n", name
);
124 dev_warn(&chan
->par
->pdev
->dev
, "Failed to register I2C bus %s.\n", name
);
128 void riva_create_i2c_busses(struct riva_par
*par
)
130 par
->chan
[0].par
= par
;
131 par
->chan
[1].par
= par
;
132 par
->chan
[2].par
= par
;
136 switch ((par
->pdev
->device
>> 4) & 0xff) {
146 par
->chan
[2].ddc_base
= 0x50;
148 riva_setup_i2c_bus(&par
->chan
[2], "BUS3");
155 par
->chan
[1].ddc_base
= 0x36;
157 riva_setup_i2c_bus(&par
->chan
[1], "BUS2");
159 par
->chan
[0].ddc_base
= 0x3e;
161 riva_setup_i2c_bus(&par
->chan
[0], "BUS1");
165 void riva_delete_i2c_busses(struct riva_par
*par
)
167 if (par
->chan
[0].par
)
168 i2c_bit_del_bus(&par
->chan
[0].adapter
);
169 par
->chan
[0].par
= NULL
;
171 if (par
->chan
[1].par
)
172 i2c_bit_del_bus(&par
->chan
[1].adapter
);
173 par
->chan
[1].par
= NULL
;
177 static u8
*riva_do_probe_i2c_edid(struct riva_i2c_chan
*chan
)
180 struct i2c_msg msgs
[] = {
193 buf
= kmalloc(EDID_LENGTH
, GFP_KERNEL
);
195 dev_warn(&chan
->par
->pdev
->dev
, "Out of memory!\n");
200 if (i2c_transfer(&chan
->adapter
, msgs
, 2) == 2)
202 dev_dbg(&chan
->par
->pdev
->dev
, "Unable to read EDID block.\n");
207 int riva_probe_i2c_connector(struct riva_par
*par
, int conn
, u8
**out_edid
)
212 for (i
= 0; i
< 3; i
++) {
213 /* Do the real work */
214 edid
= riva_do_probe_i2c_edid(&par
->chan
[conn
-1]);