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[linux-2.6.9-moxart.git] / include / asm-arm / arch-ixp2000 / irqs.h
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1 /*
2 * linux/include/asm-arm/arch-ixp2000/irqs.h
4 * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
5 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
7 * Copyright (C) 2002 Intel Corp.
8 * Copyright (C) 2003-2004 MontaVista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #ifndef _IRQS_H
16 #define _IRQS_H
19 * Do NOT add #ifdef MACHINE_FOO in here.
20 * Simpy add your machine IRQs here and increase NR_IRQS if needed to
21 * hold your machine's IRQ table.
25 * Some interrupt numbers go unused b/c the IRQ mask/ummask/status
26 * register has those bit reserved. We just mark those interrupts
27 * as invalid and this allows us to do mask/unmask with a single
28 * shift operation instead of having to map the IRQ number to
29 * a HW IRQ number.
31 #define IRQ_IXP2000_SWI 0 /* soft interrupt */
32 #define IRQ_IXP2000_ERRSUM 1 /* OR of all bits in ErrorStatus reg*/
33 #define IRQ_IXP2000_UART 2
34 #define IRQ_IXP2000_GPIO 3
35 #define IRQ_IXP2000_TIMER1 4
36 #define IRQ_IXP2000_TIMER2 5
37 #define IRQ_IXP2000_TIMER3 6
38 #define IRQ_IXP2000_TIMER4 7
39 #define IRQ_IXP2000_PMU 8
40 #define IRQ_IXP2000_SPF 9 /* Slow port framer IRQ */
41 #define IRQ_IXP2000_DMA1 10
42 #define IRQ_IXP2000_DMA2 11
43 #define IRQ_IXP2000_DMA3 12
44 #define IRQ_IXP2000_PCI_DOORBELL 13
45 #define IRQ_IXP2000_ME_ATTN 14
46 #define IRQ_IXP2000_PCI 15 /* PCI INTA or INTB */
47 #define IRQ_IXP2000_THDA0 16 /* thread 0-31A */
48 #define IRQ_IXP2000_THDA1 17 /* thread 32-63A */
49 #define IRQ_IXP2000_THDA2 18 /* thread 64-95A */
50 #define IRQ_IXP2000_THDA3 19 /* thread 96-127A */
51 #define IRQ_IXP2000_THDB0 24 /* thread 0-31 B */
52 #define IRQ_IXP2000_THDB1 25 /* thread 32-63B */
53 /* only 64 threads supported for IXP2400, rest or for IXP2800*/
54 #define IRQ_IXP2000_THDB2 26 /* thread 64-95B */
55 #define IRQ_IXP2000_THDB3 27 /* thread 96-127B */
57 /* define generic GPIOs */
58 #define IRQ_IXP2000_GPIO0 32
59 #define IRQ_IXP2000_GPIO1 33
60 #define IRQ_IXP2000_GPIO2 34
61 #define IRQ_IXP2000_GPIO3 35
62 #define IRQ_IXP2000_GPIO4 36
63 #define IRQ_IXP2000_GPIO5 37
64 #define IRQ_IXP2000_GPIO6 38
65 #define IRQ_IXP2000_GPIO7 39
67 /* split off the 2 PCI sources */
68 #define IRQ_IXP2000_PCIA 40
69 #define IRQ_IXP2000_PCIB 41
71 /* Int sources from IRQ_ERROR_STATUS */
72 #define IRQ_IXP2000_DRAM0_MIN_ERR 42
73 #define IRQ_IXP2000_DRAM0_MAJ_ERR 43
74 #define IRQ_IXP2000_DRAM1_MIN_ERR 44
75 #define IRQ_IXP2000_DRAM1_MAJ_ERR 45
76 #define IRQ_IXP2000_DRAM2_MIN_ERR 46
77 #define IRQ_IXP2000_DRAM2_MAJ_ERR 47
78 #define IRQ_IXP2000_SRAM0_ERR 48
79 #define IRQ_IXP2000_SRAM1_ERR 49
80 #define IRQ_IXP2000_SRAM2_ERR 50
81 #define IRQ_IXP2000_SRAM3_ERR 51
82 #define IRQ_IXP2000_MEDIA_ERR 52
83 #define IRQ_IXP2000_PCI_ERR 53
84 #define IRQ_IXP2000_SP_INT 54
86 #define NR_IXP2000_IRQS 55
88 #define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x))
90 #define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS))
93 * This allows for all the on-chip sources plus up to 32 CPLD based
94 * IRQs. Should be more than enough.
96 #define IXP2000_BOARD_IRQS 32
97 #define NR_IRQS (NR_IXP2000_IRQS + IXP2000_BOARD_IRQS)
101 * IXDP2400 specific IRQs
103 #define IRQ_IXDP2400_INGRESS_NPU IXP2000_BOARD_IRQ(0)
104 #define IRQ_IXDP2400_ENET IXP2000_BOARD_IRQ(1)
105 #define IRQ_IXDP2400_MEDIA_PCI IXP2000_BOARD_IRQ(2)
106 #define IRQ_IXDP2400_MEDIA_SP IXP2000_BOARD_IRQ(3)
107 #define IRQ_IXDP2400_SF_PCI IXP2000_BOARD_IRQ(4)
108 #define IRQ_IXDP2400_SF_SP IXP2000_BOARD_IRQ(5)
109 #define IRQ_IXDP2400_PMC IXP2000_BOARD_IRQ(6)
110 #define IRQ_IXDP2400_TVM IXP2000_BOARD_IRQ(7)
112 #define NR_IXDP2400_IRQS ((IRQ_IXDP2400_TVM)+1)
113 #define IXDP2400_NR_IRQS NR_IXDP2400_IRQS - NR_IXP2000_IRQS
115 /* IXDP2800 specific IRQs */
116 #define IRQ_IXDP2800_EGRESS_ENET IXP2000_BOARD_IRQ(0)
117 #define IRQ_IXDP2800_INGRESS_NPU IXP2000_BOARD_IRQ(1)
118 #define IRQ_IXDP2800_PMC IXP2000_BOARD_IRQ(2)
119 #define IRQ_IXDP2800_FABRIC_PCI IXP2000_BOARD_IRQ(3)
120 #define IRQ_IXDP2800_FABRIC IXP2000_BOARD_IRQ(4)
121 #define IRQ_IXDP2800_MEDIA IXP2000_BOARD_IRQ(5)
123 #define NR_IXDP2800_IRQS ((IRQ_IXDP2800_MEDIA)+1)
124 #define IXDP2800_NR_IRQS NR_IXDP2800_IRQS - NR_IXP2000_IRQS
127 * IRQs on both IXDP2x01 boards
129 #define IRQ_IXDP2X01_SPCI_DB_0 IXP2000_BOARD_IRQ(2)
130 #define IRQ_IXDP2X01_SPCI_DB_1 IXP2000_BOARD_IRQ(3)
131 #define IRQ_IXDP2X01_SPCI_PMC_INTA IXP2000_BOARD_IRQ(4)
132 #define IRQ_IXDP2X01_SPCI_PMC_INTB IXP2000_BOARD_IRQ(5)
133 #define IRQ_IXDP2X01_SPCI_PMC_INTC IXP2000_BOARD_IRQ(6)
134 #define IRQ_IXDP2X01_SPCI_PMC_INTD IXP2000_BOARD_IRQ(7)
135 #define IRQ_IXDP2X01_SPCI_FIC_INT IXP2000_BOARD_IRQ(8)
136 #define IRQ_IXDP2X01_IPMI_FROM IXP2000_BOARD_IRQ(16)
137 #define IRQ_IXDP2X01_125US IXP2000_BOARD_IRQ(17)
138 #define IRQ_IXDP2X01_DB_0_ADD IXP2000_BOARD_IRQ(18)
139 #define IRQ_IXDP2X01_DB_1_ADD IXP2000_BOARD_IRQ(19)
140 #define IRQ_IXDP2X01_UART1 IXP2000_BOARD_IRQ(21)
141 #define IRQ_IXDP2X01_UART2 IXP2000_BOARD_IRQ(22)
142 #define IRQ_IXDP2X01_FIC_ADD_INT IXP2000_BOARD_IRQ(24)
143 #define IRQ_IXDP2X01_CS8900 IXP2000_BOARD_IRQ(25)
144 #define IRQ_IXDP2X01_BBSRAM IXP2000_BOARD_IRQ(26)
146 #define IXDP2X01_VALID_IRQ_MASK ( \
147 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_0) | \
148 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_1) | \
149 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTA) | \
150 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTB) | \
151 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTC) | \
152 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTD) | \
153 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_FIC_INT) | \
154 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_IPMI_FROM) | \
155 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_125US) | \
156 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_0_ADD) | \
157 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_1_ADD) | \
158 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART1) | \
159 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART2) | \
160 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_FIC_ADD_INT) | \
161 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_CS8900) | \
162 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_BBSRAM) )
165 * IXDP2401 specific IRQs
167 #define IRQ_IXDP2401_INTA_82546 IXP2000_BOARD_IRQ(0)
168 #define IRQ_IXDP2401_INTB_82546 IXP2000_BOARD_IRQ(1)
170 #define IXDP2401_VALID_IRQ_MASK ( \
171 IXDP2X01_VALID_IRQ_MASK | \
172 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTA_82546) |\
173 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTB_82546))
176 * IXDP2801-specific IRQs
178 #define IRQ_IXDP2801_RIV IXP2000_BOARD_IRQ(0)
179 #define IRQ_IXDP2801_CNFG_MEDIA IXP2000_BOARD_IRQ(27)
180 #define IRQ_IXDP2801_CLOCK_REF IXP2000_BOARD_IRQ(28)
182 #define IXDP2801_VALID_IRQ_MASK ( \
183 IXDP2X01_VALID_IRQ_MASK | \
184 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_RIV) |\
185 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CNFG_MEDIA) |\
186 IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CLOCK_REF))
188 #define NR_IXDP2X01_IRQS ((IRQ_IXDP2801_CLOCK_REF) + 1)
190 #endif /*_IRQS_H*/