include/asm-ia64/sal.h

   1 #ifndef _ASM_IA64_SAL_H
   2 #define _ASM_IA64_SAL_H
   3
   4 /*
   5  * System Abstraction Layer definitions.
   6  *
   7  * This is based on version 2.5 of the manual "IA-64 System
   8  * Abstraction Layer".
   9  *
  10  * Copyright (C) 2001 Intel
  11  * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
  12  * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
  13  * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
  14  *      David Mosberger-Tang <davidm@hpl.hp.com>
  15  * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
  16  *
  17  * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
  18  *                  revision of the SAL spec.
  19  * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
  20  *                  revision of the SAL spec.
  21  * 99/09/29 davidm      Updated for SAL 2.6.
  22  * 00/03/29 cfleck      Updated SAL Error Logging info for processor (SAL 2.6)
  23  *                      (plus examples of platform error info structures from smariset @ Intel)
  24  */
  25
  26 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT          0
  27 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT    1
  28 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT    2
  29 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT         3
  30
  31 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK        (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
  32 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
  33 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
  34 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT       (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
  35
  36 #ifndef __ASSEMBLY__
  37
  38 #include <linux/bcd.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/efi.h>
  41
  42 #include <asm/pal.h>
  43 #include <asm/system.h>
  44 #include <asm/fpu.h>
  45
  46 extern spinlock_t sal_lock;
  47
  48 /* SAL spec _requires_ eight args for each call. */
  49 #define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7)      \
  50         result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
  51
  52 # define SAL_CALL(result,args...) do {                          \
  53         unsigned long __ia64_sc_flags;                          \
  54         struct ia64_fpreg __ia64_sc_fr[6];                      \
  55         ia64_save_scratch_fpregs(__ia64_sc_fr);                 \
  56         spin_lock_irqsave(&sal_lock, __ia64_sc_flags);          \
  57         __SAL_CALL(result, args);                               \
  58         spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags);     \
  59         ia64_load_scratch_fpregs(__ia64_sc_fr);                 \
  60 } while (0)
  61
  62 # define SAL_CALL_NOLOCK(result,args...) do {           \
  63         unsigned long __ia64_scn_flags;                 \
  64         struct ia64_fpreg __ia64_scn_fr[6];             \
  65         ia64_save_scratch_fpregs(__ia64_scn_fr);        \
  66         local_irq_save(__ia64_scn_flags);               \
  67         __SAL_CALL(result, args);                       \
  68         local_irq_restore(__ia64_scn_flags);            \
  69         ia64_load_scratch_fpregs(__ia64_scn_fr);        \
  70 } while (0)
  71
  72 # define SAL_CALL_REENTRANT(result,args...) do {        \
  73         struct ia64_fpreg __ia64_scs_fr[6];             \
  74         ia64_save_scratch_fpregs(__ia64_scs_fr);        \
  75         preempt_disable();                              \
  76         __SAL_CALL(result, args);                       \
  77         preempt_enable();                               \
  78         ia64_load_scratch_fpregs(__ia64_scs_fr);        \
  79 } while (0)
  80
  81 #define SAL_SET_VECTORS                 0x01000000
  82 #define SAL_GET_STATE_INFO              0x01000001
  83 #define SAL_GET_STATE_INFO_SIZE         0x01000002
  84 #define SAL_CLEAR_STATE_INFO            0x01000003
  85 #define SAL_MC_RENDEZ                   0x01000004
  86 #define SAL_MC_SET_PARAMS               0x01000005
  87 #define SAL_REGISTER_PHYSICAL_ADDR      0x01000006
  88
  89 #define SAL_CACHE_FLUSH                 0x01000008
  90 #define SAL_CACHE_INIT                  0x01000009
  91 #define SAL_PCI_CONFIG_READ             0x01000010
  92 #define SAL_PCI_CONFIG_WRITE            0x01000011
  93 #define SAL_FREQ_BASE                   0x01000012
  94
  95 #define SAL_UPDATE_PAL                  0x01000020
  96
  97 struct ia64_sal_retval {
  98         /*
  99          * A zero status value indicates call completed without error.
 100          * A negative status value indicates reason of call failure.
 101          * A positive status value indicates success but an
 102          * informational value should be printed (e.g., "reboot for
 103          * change to take effect").
 104          */
 105         s64 status;
 106         u64 v0;
 107         u64 v1;
 108         u64 v2;
 109 };
 110
 111 typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
 112
 113 enum {
 114         SAL_FREQ_BASE_PLATFORM = 0,
 115         SAL_FREQ_BASE_INTERVAL_TIMER = 1,
 116         SAL_FREQ_BASE_REALTIME_CLOCK = 2
 117 };
 118
 119 /*
 120  * The SAL system table is followed by a variable number of variable
 121  * length descriptors.  The structure of these descriptors follows
 122  * below.
 123  * The defininition follows SAL specs from July 2000
 124  */
 125 struct ia64_sal_systab {
 126         u8 signature[4];        /* should be "SST_" */
 127         u32 size;               /* size of this table in bytes */
 128         u8 sal_rev_minor;
 129         u8 sal_rev_major;
 130         u16 entry_count;        /* # of entries in variable portion */
 131         u8 checksum;
 132         u8 reserved1[7];
 133         u8 sal_a_rev_minor;
 134         u8 sal_a_rev_major;
 135         u8 sal_b_rev_minor;
 136         u8 sal_b_rev_major;
 137         /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
 138         u8 oem_id[32];
 139         u8 product_id[32];      /* ASCII product id  */
 140         u8 reserved2[8];
 141 };
 142
 143 enum sal_systab_entry_type {
 144         SAL_DESC_ENTRY_POINT = 0,
 145         SAL_DESC_MEMORY = 1,
 146         SAL_DESC_PLATFORM_FEATURE = 2,
 147         SAL_DESC_TR = 3,
 148         SAL_DESC_PTC = 4,
 149         SAL_DESC_AP_WAKEUP = 5
 150 };
 151
 152 /*
 153  * Entry type:  Size:
 154  *      0       48
 155  *      1       32
 156  *      2       16
 157  *      3       32
 158  *      4       16
 159  *      5       16
 160  */
 161 #define SAL_DESC_SIZE(type)     "\060\040\020\040\020\020"[(unsigned) type]
 162
 163 typedef struct ia64_sal_desc_entry_point {
 164         u8 type;
 165         u8 reserved1[7];
 166         u64 pal_proc;
 167         u64 sal_proc;
 168         u64 gp;
 169         u8 reserved2[16];
 170 }ia64_sal_desc_entry_point_t;
 171
 172 typedef struct ia64_sal_desc_memory {
 173         u8 type;
 174         u8 used_by_sal; /* needs to be mapped for SAL? */
 175         u8 mem_attr;            /* current memory attribute setting */
 176         u8 access_rights;       /* access rights set up by SAL */
 177         u8 mem_attr_mask;       /* mask of supported memory attributes */
 178         u8 reserved1;
 179         u8 mem_type;            /* memory type */
 180         u8 mem_usage;           /* memory usage */
 181         u64 addr;               /* physical address of memory */
 182         u32 length;     /* length (multiple of 4KB pages) */
 183         u32 reserved2;
 184         u8 oem_reserved[8];
 185 } ia64_sal_desc_memory_t;
 186
 187 typedef struct ia64_sal_desc_platform_feature {
 188         u8 type;
 189         u8 feature_mask;
 190         u8 reserved1[14];
 191 } ia64_sal_desc_platform_feature_t;
 192
 193 typedef struct ia64_sal_desc_tr {
 194         u8 type;
 195         u8 tr_type;             /* 0 == instruction, 1 == data */
 196         u8 regnum;              /* translation register number */
 197         u8 reserved1[5];
 198         u64 addr;               /* virtual address of area covered */
 199         u64 page_size;          /* encoded page size */
 200         u8 reserved2[8];
 201 } ia64_sal_desc_tr_t;
 202
 203 typedef struct ia64_sal_desc_ptc {
 204         u8 type;
 205         u8 reserved1[3];
 206         u32 num_domains;        /* # of coherence domains */
 207         u64 domain_info;        /* physical address of domain info table */
 208 } ia64_sal_desc_ptc_t;
 209
 210 typedef struct ia64_sal_ptc_domain_info {
 211         u64 proc_count;         /* number of processors in domain */
 212         u64 proc_list;          /* physical address of LID array */
 213 } ia64_sal_ptc_domain_info_t;
 214
 215 typedef struct ia64_sal_ptc_domain_proc_entry {
 216         u64 id  : 8;            /* id of processor */
 217         u64 eid : 8;            /* eid of processor */
 218 } ia64_sal_ptc_domain_proc_entry_t;
 219
 220
 221 #define IA64_SAL_AP_EXTERNAL_INT 0
 222
 223 typedef struct ia64_sal_desc_ap_wakeup {
 224         u8 type;
 225         u8 mechanism;           /* 0 == external interrupt */
 226         u8 reserved1[6];
 227         u64 vector;             /* interrupt vector in range 0x10-0xff */
 228 } ia64_sal_desc_ap_wakeup_t ;
 229
 230 extern ia64_sal_handler ia64_sal;
 231 extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
 232
 233 extern unsigned short sal_revision;     /* supported SAL spec revision */
 234 extern unsigned short sal_version;      /* SAL version; OEM dependent */
 235 #define SAL_VERSION_CODE(major, minor) ((BIN2BCD(major) << 8) | BIN2BCD(minor))
 236
 237 extern const char *ia64_sal_strerror (long status);
 238 extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
 239
 240 /* SAL information type encodings */
 241 enum {
 242         SAL_INFO_TYPE_MCA  = 0,         /* Machine check abort information */
 243         SAL_INFO_TYPE_INIT = 1,         /* Init information */
 244         SAL_INFO_TYPE_CMC  = 2,         /* Corrected machine check information */
 245         SAL_INFO_TYPE_CPE  = 3          /* Corrected platform error information */
 246 };
 247
 248 /* Encodings for machine check parameter types */
 249 enum {
 250         SAL_MC_PARAM_RENDEZ_INT    = 1, /* Rendezvous interrupt */
 251         SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
 252         SAL_MC_PARAM_CPE_INT       = 3  /* Corrected Platform Error Int */
 253 };
 254
 255 /* Encodings for rendezvous mechanisms */
 256 enum {
 257         SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
 258         SAL_MC_PARAM_MECHANISM_MEM = 2  /* Use memory synchronization variable*/
 259 };
 260
 261 /* Encodings for vectors which can be registered by the OS with SAL */
 262 enum {
 263         SAL_VECTOR_OS_MCA         = 0,
 264         SAL_VECTOR_OS_INIT        = 1,
 265         SAL_VECTOR_OS_BOOT_RENDEZ = 2
 266 };
 267
 268 /* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
 269 #define SAL_MC_PARAM_RZ_ALWAYS          0x1
 270 #define SAL_MC_PARAM_BINIT_ESCALATE     0x10
 271
 272 /*
 273  * Definition of the SAL Error Log from the SAL spec
 274  */
 275
 276 /* SAL Error Record Section GUID Definitions */
 277 #define SAL_PROC_DEV_ERR_SECT_GUID  \
 278     EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 279 #define SAL_PLAT_MEM_DEV_ERR_SECT_GUID  \
 280     EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 281 #define SAL_PLAT_SEL_DEV_ERR_SECT_GUID  \
 282     EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 283 #define SAL_PLAT_PCI_BUS_ERR_SECT_GUID  \
 284     EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 285 #define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID  \
 286     EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 287 #define SAL_PLAT_PCI_COMP_ERR_SECT_GUID  \
 288     EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 289 #define SAL_PLAT_SPECIFIC_ERR_SECT_GUID  \
 290     EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 291 #define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID  \
 292     EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 293 #define SAL_PLAT_BUS_ERR_SECT_GUID  \
 294     EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
 295
 296 #define MAX_CACHE_ERRORS        6
 297 #define MAX_TLB_ERRORS          6
 298 #define MAX_BUS_ERRORS          1
 299
 300 /* Definition of version  according to SAL spec for logging purposes */
 301 typedef struct sal_log_revision {
 302         u8 minor;               /* BCD (0..99) */
 303         u8 major;               /* BCD (0..99) */
 304 } sal_log_revision_t;
 305
 306 /* Definition of timestamp according to SAL spec for logging purposes */
 307 typedef struct sal_log_timestamp {
 308         u8 slh_second;          /* Second (0..59) */
 309         u8 slh_minute;          /* Minute (0..59) */
 310         u8 slh_hour;            /* Hour (0..23) */
 311         u8 slh_reserved;
 312         u8 slh_day;             /* Day (1..31) */
 313         u8 slh_month;           /* Month (1..12) */
 314         u8 slh_year;            /* Year (00..99) */
 315         u8 slh_century;         /* Century (19, 20, 21, ...) */
 316 } sal_log_timestamp_t;
 317
 318 /* Definition of log record  header structures */
 319 typedef struct sal_log_record_header {
 320         u64 id;                         /* Unique monotonically increasing ID */
 321         sal_log_revision_t revision;    /* Major and Minor revision of header */
 322         u16 severity;                   /* Error Severity */
 323         u32 len;                        /* Length of this error log in bytes */
 324         sal_log_timestamp_t timestamp;  /* Timestamp */
 325         efi_guid_t platform_guid;       /* Unique OEM Platform ID */
 326 } sal_log_record_header_t;
 327
 328 /* Definition of log section header structures */
 329 typedef struct sal_log_sec_header {
 330     efi_guid_t guid;                    /* Unique Section ID */
 331     sal_log_revision_t revision;        /* Major and Minor revision of Section */
 332     u16 reserved;
 333     u32 len;                            /* Section length */
 334 } sal_log_section_hdr_t;
 335
 336 typedef struct sal_log_mod_error_info {
 337         struct {
 338                 u64 check_info              : 1,
 339                     requestor_identifier    : 1,
 340                     responder_identifier    : 1,
 341                     target_identifier       : 1,
 342                     precise_ip              : 1,
 343                     reserved                : 59;
 344         } valid;
 345         u64 check_info;
 346         u64 requestor_identifier;
 347         u64 responder_identifier;
 348         u64 target_identifier;
 349         u64 precise_ip;
 350 } sal_log_mod_error_info_t;
 351
 352 typedef struct sal_processor_static_info {
 353         struct {
 354                 u64 minstate        : 1,
 355                     br              : 1,
 356                     cr              : 1,
 357                     ar              : 1,
 358                     rr              : 1,
 359                     fr              : 1,
 360                     reserved        : 58;
 361         } valid;
 362         pal_min_state_area_t min_state_area;
 363         u64 br[8];
 364         u64 cr[128];
 365         u64 ar[128];
 366         u64 rr[8];
 367         struct ia64_fpreg __attribute__ ((packed)) fr[128];
 368 } sal_processor_static_info_t;
 369
 370 struct sal_cpuid_info {
 371         u64 regs[5];
 372         u64 reserved;
 373 };
 374
 375 typedef struct sal_log_processor_info {
 376         sal_log_section_hdr_t header;
 377         struct {
 378                 u64 proc_error_map      : 1,
 379                     proc_state_param    : 1,
 380                     proc_cr_lid         : 1,
 381                     psi_static_struct   : 1,
 382                     num_cache_check     : 4,
 383                     num_tlb_check       : 4,
 384                     num_bus_check       : 4,
 385                     num_reg_file_check  : 4,
 386                     num_ms_check        : 4,
 387                     cpuid_info          : 1,
 388                     reserved1           : 39;
 389         } valid;
 390         u64 proc_error_map;
 391         u64 proc_state_parameter;
 392         u64 proc_cr_lid;
 393         /*
 394          * The rest of this structure consists of variable-length arrays, which can't be
 395          * expressed in C.
 396          */
 397         sal_log_mod_error_info_t info[0];
 398         /*
 399          * This is what the rest looked like if C supported variable-length arrays:
 400          *
 401          * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
 402          * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
 403          * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
 404          * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
 405          * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
 406          * struct sal_cpuid_info cpuid_info;
 407          * sal_processor_static_info_t processor_static_info;
 408          */
 409 } sal_log_processor_info_t;
 410
 411 /* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
 412 #define SAL_LPI_PSI_INFO(l)                                                                     \
 413 ({      sal_log_processor_info_t *_l = (l);                                                     \
 414         ((sal_processor_static_info_t *)                                                        \
 415          ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check             \
 416                                 + _l->valid.num_bus_check + _l->valid.num_reg_file_check        \
 417                                 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t)    \
 418                                + sizeof(struct sal_cpuid_info))));                              \
 419 })
 420
 421 /* platform error log structures */
 422
 423 typedef struct sal_log_mem_dev_err_info {
 424         sal_log_section_hdr_t header;
 425         struct {
 426                 u64 error_status    : 1,
 427                     physical_addr   : 1,
 428                     addr_mask       : 1,
 429                     node            : 1,
 430                     card            : 1,
 431                     module          : 1,
 432                     bank            : 1,
 433                     device          : 1,
 434                     row             : 1,
 435                     column          : 1,
 436                     bit_position    : 1,
 437                     requestor_id    : 1,
 438                     responder_id    : 1,
 439                     target_id       : 1,
 440                     bus_spec_data   : 1,
 441                     oem_id          : 1,
 442                     oem_data        : 1,
 443                     reserved        : 47;
 444         } valid;
 445         u64 error_status;
 446         u64 physical_addr;
 447         u64 addr_mask;
 448         u16 node;
 449         u16 card;
 450         u16 module;
 451         u16 bank;
 452         u16 device;
 453         u16 row;
 454         u16 column;
 455         u16 bit_position;
 456         u64 requestor_id;
 457         u64 responder_id;
 458         u64 target_id;
 459         u64 bus_spec_data;
 460         u8 oem_id[16];
 461         u8 oem_data[1];                 /* Variable length data */
 462 } sal_log_mem_dev_err_info_t;
 463
 464 typedef struct sal_log_sel_dev_err_info {
 465         sal_log_section_hdr_t header;
 466         struct {
 467                 u64 record_id       : 1,
 468                     record_type     : 1,
 469                     generator_id    : 1,
 470                     evm_rev         : 1,
 471                     sensor_type     : 1,
 472                     sensor_num      : 1,
 473                     event_dir       : 1,
 474                     event_data1     : 1,
 475                     event_data2     : 1,
 476                     event_data3     : 1,
 477                     reserved        : 54;
 478         } valid;
 479         u16 record_id;
 480         u8 record_type;
 481         u8 timestamp[4];
 482         u16 generator_id;
 483         u8 evm_rev;
 484         u8 sensor_type;
 485         u8 sensor_num;
 486         u8 event_dir;
 487         u8 event_data1;
 488         u8 event_data2;
 489         u8 event_data3;
 490 } sal_log_sel_dev_err_info_t;
 491
 492 typedef struct sal_log_pci_bus_err_info {
 493         sal_log_section_hdr_t header;
 494         struct {
 495                 u64 err_status      : 1,
 496                     err_type        : 1,
 497                     bus_id          : 1,
 498                     bus_address     : 1,
 499                     bus_data        : 1,
 500                     bus_cmd         : 1,
 501                     requestor_id    : 1,
 502                     responder_id    : 1,
 503                     target_id       : 1,
 504                     oem_data        : 1,
 505                     reserved        : 54;
 506         } valid;
 507         u64 err_status;
 508         u16 err_type;
 509         u16 bus_id;
 510         u32 reserved;
 511         u64 bus_address;
 512         u64 bus_data;
 513         u64 bus_cmd;
 514         u64 requestor_id;
 515         u64 responder_id;
 516         u64 target_id;
 517         u8 oem_data[1];                 /* Variable length data */
 518 } sal_log_pci_bus_err_info_t;
 519
 520 typedef struct sal_log_smbios_dev_err_info {
 521         sal_log_section_hdr_t header;
 522         struct {
 523                 u64 event_type      : 1,
 524                     length          : 1,
 525                     time_stamp      : 1,
 526                     data            : 1,
 527                     reserved1       : 60;
 528         } valid;
 529         u8 event_type;
 530         u8 length;
 531         u8 time_stamp[6];
 532         u8 data[1];                     /* data of variable length, length == slsmb_length */
 533 } sal_log_smbios_dev_err_info_t;
 534
 535 typedef struct sal_log_pci_comp_err_info {
 536         sal_log_section_hdr_t header;
 537         struct {
 538                 u64 err_status      : 1,
 539                     comp_info       : 1,
 540                     num_mem_regs    : 1,
 541                     num_io_regs     : 1,
 542                     reg_data_pairs  : 1,
 543                     oem_data        : 1,
 544                     reserved        : 58;
 545         } valid;
 546         u64 err_status;
 547         struct {
 548                 u16 vendor_id;
 549                 u16 device_id;
 550                 u8 class_code[3];
 551                 u8 func_num;
 552                 u8 dev_num;
 553                 u8 bus_num;
 554                 u8 seg_num;
 555                 u8 reserved[5];
 556         } comp_info;
 557         u32 num_mem_regs;
 558         u32 num_io_regs;
 559         u64 reg_data_pairs[1];
 560         /*
 561          * array of address/data register pairs is num_mem_regs + num_io_regs elements
 562          * long.  Each array element consists of a u64 address followed by a u64 data
 563          * value.  The oem_data array immediately follows the reg_data_pairs array
 564          */
 565         u8 oem_data[1];                 /* Variable length data */
 566 } sal_log_pci_comp_err_info_t;
 567
 568 typedef struct sal_log_plat_specific_err_info {
 569         sal_log_section_hdr_t header;
 570         struct {
 571                 u64 err_status      : 1,
 572                     guid            : 1,
 573                     oem_data        : 1,
 574                     reserved        : 61;
 575         } valid;
 576         u64 err_status;
 577         efi_guid_t guid;
 578         u8 oem_data[1];                 /* platform specific variable length data */
 579 } sal_log_plat_specific_err_info_t;
 580
 581 typedef struct sal_log_host_ctlr_err_info {
 582         sal_log_section_hdr_t header;
 583         struct {
 584                 u64 err_status      : 1,
 585                     requestor_id    : 1,
 586                     responder_id    : 1,
 587                     target_id       : 1,
 588                     bus_spec_data   : 1,
 589                     oem_data        : 1,
 590                     reserved        : 58;
 591         } valid;
 592         u64 err_status;
 593         u64 requestor_id;
 594         u64 responder_id;
 595         u64 target_id;
 596         u64 bus_spec_data;
 597         u8 oem_data[1];                 /* Variable length OEM data */
 598 } sal_log_host_ctlr_err_info_t;
 599
 600 typedef struct sal_log_plat_bus_err_info {
 601         sal_log_section_hdr_t header;
 602         struct {
 603                 u64 err_status      : 1,
 604                     requestor_id    : 1,
 605                     responder_id    : 1,
 606                     target_id       : 1,
 607                     bus_spec_data   : 1,
 608                     oem_data        : 1,
 609                     reserved        : 58;
 610         } valid;
 611         u64 err_status;
 612         u64 requestor_id;
 613         u64 responder_id;
 614         u64 target_id;
 615         u64 bus_spec_data;
 616         u8 oem_data[1];                 /* Variable length OEM data */
 617 } sal_log_plat_bus_err_info_t;
 618
 619 /* Overall platform error section structure */
 620 typedef union sal_log_platform_err_info {
 621         sal_log_mem_dev_err_info_t mem_dev_err;
 622         sal_log_sel_dev_err_info_t sel_dev_err;
 623         sal_log_pci_bus_err_info_t pci_bus_err;
 624         sal_log_smbios_dev_err_info_t smbios_dev_err;
 625         sal_log_pci_comp_err_info_t pci_comp_err;
 626         sal_log_plat_specific_err_info_t plat_specific_err;
 627         sal_log_host_ctlr_err_info_t host_ctlr_err;
 628         sal_log_plat_bus_err_info_t plat_bus_err;
 629 } sal_log_platform_err_info_t;
 630
 631 /* SAL log over-all, multi-section error record structure (processor+platform) */
 632 typedef struct err_rec {
 633         sal_log_record_header_t sal_elog_header;
 634         sal_log_processor_info_t proc_err;
 635         sal_log_platform_err_info_t plat_err;
 636         u8 oem_data_pad[1024];
 637 } ia64_err_rec_t;
 638
 639 /*
 640  * Now define a couple of inline functions for improved type checking
 641  * and convenience.
 642  */
 643 static inline long
 644 ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
 645                     unsigned long *drift_info)
 646 {
 647         struct ia64_sal_retval isrv;
 648
 649         SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
 650         *ticks_per_second = isrv.v0;
 651         *drift_info = isrv.v1;
 652         return isrv.status;
 653 }
 654
 655 /* Flush all the processor and platform level instruction and/or data caches */
 656 static inline s64
 657 ia64_sal_cache_flush (u64 cache_type)
 658 {
 659         struct ia64_sal_retval isrv;
 660         SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
 661         return isrv.status;
 662 }
 663
 664
 665 /* Initialize all the processor and platform level instruction and data caches */
 666 static inline s64
 667 ia64_sal_cache_init (void)
 668 {
 669         struct ia64_sal_retval isrv;
 670         SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
 671         return isrv.status;
 672 }
 673
 674 /*
 675  * Clear the processor and platform information logged by SAL with respect to the machine
 676  * state at the time of MCA's, INITs, CMCs, or CPEs.
 677  */
 678 static inline s64
 679 ia64_sal_clear_state_info (u64 sal_info_type)
 680 {
 681         struct ia64_sal_retval isrv;
 682         SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
 683                       0, 0, 0, 0, 0);
 684         return isrv.status;
 685 }
 686
 687
 688 /* Get the processor and platform information logged by SAL with respect to the machine
 689  * state at the time of the MCAs, INITs, CMCs, or CPEs.
 690  */
 691 static inline u64
 692 ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
 693 {
 694         struct ia64_sal_retval isrv;
 695         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
 696                       sal_info, 0, 0, 0, 0);
 697         if (isrv.status)
 698                 return 0;
 699
 700         return isrv.v0;
 701 }
 702
 703 /*
 704  * Get the maximum size of the information logged by SAL with respect to the machine state
 705  * at the time of MCAs, INITs, CMCs, or CPEs.
 706  */
 707 static inline u64
 708 ia64_sal_get_state_info_size (u64 sal_info_type)
 709 {
 710         struct ia64_sal_retval isrv;
 711         SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
 712                       0, 0, 0, 0, 0);
 713         if (isrv.status)
 714                 return 0;
 715         return isrv.v0;
 716 }
 717
 718 /*
 719  * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
 720  * the monarch processor.  Must not lock, because it will not return on any cpu until the
 721  * monarch processor sends a wake up.
 722  */
 723 static inline s64
 724 ia64_sal_mc_rendez (void)
 725 {
 726         struct ia64_sal_retval isrv;
 727         SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
 728         return isrv.status;
 729 }
 730
 731 /*
 732  * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
 733  * the machine check rendezvous sequence as well as the mechanism to wake up the
 734  * non-monarch processor at the end of machine check processing.
 735  * Returns the complete ia64_sal_retval because some calls return more than just a status
 736  * value.
 737  */
 738 static inline struct ia64_sal_retval
 739 ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
 740 {
 741         struct ia64_sal_retval isrv;
 742         SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
 743                  timeout, rz_always, 0, 0);
 744         return isrv;
 745 }
 746
 747 /* Read from PCI configuration space */
 748 static inline s64
 749 ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
 750 {
 751         struct ia64_sal_retval isrv;
 752         SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
 753         if (value)
 754                 *value = isrv.v0;
 755         return isrv.status;
 756 }
 757
 758 /* Write to PCI configuration space */
 759 static inline s64
 760 ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
 761 {
 762         struct ia64_sal_retval isrv;
 763         SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
 764                  type, 0, 0, 0);
 765         return isrv.status;
 766 }
 767
 768 /*
 769  * Register physical addresses of locations needed by SAL when SAL procedures are invoked
 770  * in virtual mode.
 771  */
 772 static inline s64
 773 ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
 774 {
 775         struct ia64_sal_retval isrv;
 776         SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
 777                  0, 0, 0, 0, 0);
 778         return isrv.status;
 779 }
 780
 781 /*
 782  * Register software dependent code locations within SAL. These locations are handlers or
 783  * entry points where SAL will pass control for the specified event. These event handlers
 784  * are for the bott rendezvous, MCAs and INIT scenarios.
 785  */
 786 static inline s64
 787 ia64_sal_set_vectors (u64 vector_type,
 788                       u64 handler_addr1, u64 gp1, u64 handler_len1,
 789                       u64 handler_addr2, u64 gp2, u64 handler_len2)
 790 {
 791         struct ia64_sal_retval isrv;
 792         SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
 793                         handler_addr1, gp1, handler_len1,
 794                         handler_addr2, gp2, handler_len2);
 795
 796         return isrv.status;
 797 }
 798
 799 /* Update the contents of PAL block in the non-volatile storage device */
 800 static inline s64
 801 ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
 802                      u64 *error_code, u64 *scratch_buf_size_needed)
 803 {
 804         struct ia64_sal_retval isrv;
 805         SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
 806                  0, 0, 0, 0);
 807         if (error_code)
 808                 *error_code = isrv.v0;
 809         if (scratch_buf_size_needed)
 810                 *scratch_buf_size_needed = isrv.v1;
 811         return isrv.status;
 812 }
 813
 814 extern unsigned long sal_platform_features;
 815
 816 extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
 817
 818 struct sal_ret_values {
 819         long r8; long r9; long r10; long r11;
 820 };
 821
 822 #define IA64_SAL_OEMFUNC_MIN            0x02000000
 823 #define IA64_SAL_OEMFUNC_MAX            0x03ffffff
 824
 825 extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
 826                             u64, u64, u64);
 827 extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
 828                                    u64, u64, u64, u64, u64);
 829 extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
 830                                       u64, u64, u64, u64, u64);
 831
 832 #endif /* __ASSEMBLY__ */
 833
 834 #endif /* _ASM_IA64_SAL_H */