include/asm-m68k/pgtable.h

   1 #ifndef _M68K_PGTABLE_H
   2 #define _M68K_PGTABLE_H
   3
   4 #include <linux/config.h>
   5 #include <asm/setup.h>
   6
   7 #ifndef __ASSEMBLY__
   8 #include <asm/processor.h>
   9 #include <linux/sched.h>
  10 #include <linux/threads.h>
  11
  12 /*
  13  * This file contains the functions and defines necessary to modify and use
  14  * the m68k page table tree.
  15  */
  16
  17 #include <asm/virtconvert.h>
  18
  19 /* Certain architectures need to do special things when pte's
  20  * within a page table are directly modified.  Thus, the following
  21  * hook is made available.
  22  */
  23 #define set_pte(pteptr, pteval)                                 \
  24         do{                                                     \
  25                 *(pteptr) = (pteval);                           \
  26         } while(0)
  27
  28
  29 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  30 #ifdef CONFIG_SUN3
  31 #define PMD_SHIFT       17
  32 #else
  33 #define PMD_SHIFT       22
  34 #endif
  35 #define PMD_SIZE        (1UL << PMD_SHIFT)
  36 #define PMD_MASK        (~(PMD_SIZE-1))
  37
  38 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  39 #ifdef CONFIG_SUN3
  40 #define PGDIR_SHIFT     17
  41 #else
  42 #define PGDIR_SHIFT     25
  43 #endif
  44 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  45 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  46
  47 /*
  48  * entries per page directory level: the m68k is configured as three-level,
  49  * so we do have PMD level physically.
  50  */
  51 #ifdef CONFIG_SUN3
  52 #define PTRS_PER_PTE   16
  53 #define PTRS_PER_PMD   1
  54 #define PTRS_PER_PGD   2048
  55 #else
  56 #define PTRS_PER_PTE    1024
  57 #define PTRS_PER_PMD    8
  58 #define PTRS_PER_PGD    128
  59 #endif
  60 #define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
  61 #define FIRST_USER_PGD_NR       0
  62
  63 /* Virtual address region for use by kernel_map() */
  64 #ifdef CONFIG_SUN3
  65 #define KMAP_START     0x0DC00000
  66 #define KMAP_END       0x0E000000
  67 #else
  68 #define KMAP_START      0xd0000000
  69 #define KMAP_END        0xf0000000
  70 #endif
  71
  72 #ifndef CONFIG_SUN3
  73 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  74  * current 8MB value just means that there will be a 8MB "hole" after the
  75  * physical memory until the kernel virtual memory starts.  That means that
  76  * any out-of-bounds memory accesses will hopefully be caught.
  77  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  78  * area for the same reason. ;)
  79  */
  80 #define VMALLOC_OFFSET  (8*1024*1024)
  81 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
  82 #define VMALLOC_END KMAP_START
  83 #else
  84 extern unsigned long vmalloc_end;
  85 #define VMALLOC_START 0x0f800000
  86 #define VMALLOC_END vmalloc_end
  87 #endif /* CONFIG_SUN3 */
  88
  89 /* zero page used for uninitialized stuff */
  90 extern void *empty_zero_page;
  91
  92 /*
  93  * ZERO_PAGE is a global shared page that is always zero: used
  94  * for zero-mapped memory areas etc..
  95  */
  96 #define ZERO_PAGE(vaddr)        (virt_to_page(empty_zero_page))
  97
  98 /* number of bits that fit into a memory pointer */
  99 #define BITS_PER_PTR                    (8*sizeof(unsigned long))
 100
 101 /* to align the pointer to a pointer address */
 102 #define PTR_MASK                        (~(sizeof(void*)-1))
 103
 104 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
 105 /* 64-bit machines, beware!  SRB. */
 106 #define SIZEOF_PTR_LOG2                        2
 107
 108 /*
 109  * Check if the addr/len goes up to the end of a physical
 110  * memory chunk.  Used for DMA functions.
 111  */
 112 #ifdef CONFIG_SINGLE_MEMORY_CHUNK
 113 /*
 114  * It makes no sense to consider whether we cross a memory boundary if
 115  * we support just one physical chunk of memory.
 116  */
 117 static inline int mm_end_of_chunk(unsigned long addr, int len)
 118 {
 119         return 0;
 120 }
 121 #else
 122 int mm_end_of_chunk (unsigned long addr, int len);
 123 #endif
 124
 125 extern void kernel_set_cachemode(void *addr, unsigned long size, int cmode);
 126
 127 /*
 128  * The m68k doesn't have any external MMU info: the kernel page
 129  * tables contain all the necessary information.  The Sun3 does, but
 130  * they are updated on demand.
 131  */
 132 static inline void update_mmu_cache(struct vm_area_struct *vma,
 133                                     unsigned long address, pte_t pte)
 134 {
 135 }
 136
 137 #endif /* !__ASSEMBLY__ */
 138
 139 #define kern_addr_valid(addr)   (1)
 140
 141 #define io_remap_page_range remap_page_range
 142
 143 /* MMU-specific headers */
 144
 145 #ifdef CONFIG_SUN3
 146 #include <asm/sun3_pgtable.h>
 147 #else
 148 #include <asm/motorola_pgtable.h>
 149 #endif
 150
 151 #ifndef __ASSEMBLY__
 152 #include <asm-generic/pgtable.h>
 153
 154 /*
 155  * Macro to mark a page protection value as "uncacheable".
 156  */
 157 #ifdef SUN3_PAGE_NOCACHE
 158 # define __SUN3_PAGE_NOCACHE    SUN3_PAGE_NOCACHE
 159 #else
 160 # define __SUN3_PAGE_NOCACHE    0
 161 #endif
 162 #define pgprot_noncached(prot)                                                  \
 163         (MMU_IS_SUN3                                                            \
 164          ? (__pgprot(pgprot_val(prot) | __SUN3_PAGE_NOCACHE))                   \
 165          : ((MMU_IS_851 || MMU_IS_030)                                          \
 166             ? (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE030))                   \
 167             : (MMU_IS_040 || MMU_IS_060)                                        \
 168             ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S))  \
 169             : (prot)))
 170
 171 #endif /* !__ASSEMBLY__ */
 172
 173 /*
 174  * No page table caches to initialise
 175  */
 176 #define pgtable_cache_init()    do { } while (0)
 177
 178 #define check_pgt_cache()       do { } while (0)
 179
 180 #endif /* _M68K_PGTABLE_H */