2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1999 by Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
12 #include <linux/config.h>
15 * This assumes you have a 1.8432 MHz clock for your UART.
17 * It'd be nice if someone built a serial card with a 24.576 MHz
18 * clock, since the 16550A is capable of handling a top speed of 1.5
19 * megabits/second; but this requires the faster clock.
21 #define BASE_BAUD (1843200 / 16)
23 /* Standard COM flags (except for COM4, because of the 8514 problem) */
24 #ifdef CONFIG_SERIAL_DETECT_IRQ
25 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
26 #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
28 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
29 #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
32 #ifdef CONFIG_SERIAL_MANY_PORTS
33 #define FOURPORT_FLAGS ASYNC_FOURPORT
34 #define ACCENT_FLAGS 0
37 #define RS_TABLE_SIZE 64
43 * The following define the access methods for the HUB6 card. All
44 * access is through two ports for all 24 possible chips. The card is
45 * selected through the high 2 bits, the port on that card with the
46 * "middle" 3 bits, and the register on that port with the bottom
49 * While the access port and interrupt is configurable, the default
50 * port locations are 0x302 for the port control register, and 0x303
51 * for the data read/write register. Normally, the interrupt is at irq3
52 * but can be anything from 3 to 7 inclusive. Note that using 3 will
53 * require disabling com2.
56 #define C_P(card,port) (((card)<<6|(port)<<3) + 1)
58 #ifdef CONFIG_MIPS_JAZZ
61 #ifndef CONFIG_OLIVETTI_M700
62 /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
63 exactly which ones ... XXX */
64 #define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
66 /* but the M700 isn't such a strange beast */
67 #define JAZZ_BASE_BAUD BASE_BAUD
70 #define _JAZZ_SERIAL_INIT(int, base) \
71 { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
72 .iomem_base = (u8 *) base, .iomem_reg_shift = 0, \
73 .io_type = SERIAL_IO_MEM }
74 #define JAZZ_SERIAL_PORT_DEFNS \
75 _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \
76 _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
78 #define JAZZ_SERIAL_PORT_DEFNS
81 #ifdef CONFIG_MIPS_COBALT
82 #include <asm/cobalt/cobalt.h>
83 #define COBALT_BASE_BAUD (18432000 / 16)
84 #define COBALT_SERIAL_PORT_DEFNS \
85 /* UART CLK PORT IRQ FLAGS */ \
86 { 0, COBALT_BASE_BAUD, 0xc800000, COBALT_SERIAL_IRQ, STD_COM_FLAGS }, /* ttyS0 */
88 #define COBALT_SERIAL_PORT_DEFNS
92 * Both Galileo boards have the same UART mappings.
94 #if defined (CONFIG_MIPS_EV96100) || defined (CONFIG_MIPS_EV64120)
95 #include <asm/galileo-boards/ev96100.h>
96 #include <asm/galileo-boards/ev96100int.h>
97 #define EV96100_SERIAL_PORT_DEFNS \
98 { .baud_base = EV96100_BASE_BAUD, .irq = EV96100INT_UART_0, \
99 .flags = STD_COM_FLAGS, \
100 .iomem_base = EV96100_UART0_REGS_BASE, .iomem_reg_shift = 2, \
101 .io_type = SERIAL_IO_MEM }, \
102 { .baud_base = EV96100_BASE_BAUD, .irq = EV96100INT_UART_0, \
103 .flags = STD_COM_FLAGS, \
104 .iomem_base = EV96100_UART1_REGS_BASE, .iomem_reg_shift = 2, \
105 .io_type = SERIAL_IO_MEM },
107 #define EV96100_SERIAL_PORT_DEFNS
110 #ifdef CONFIG_MIPS_ITE8172
111 #include <asm/it8172/it8172.h>
112 #include <asm/it8172/it8172_int.h>
113 #include <asm/it8712.h>
114 #define ITE_SERIAL_PORT_DEFNS \
115 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
116 .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \
117 { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
118 .irq = IT8172_SERIRQ_4, .flags = STD_COM_FLAGS, .type = 0x3 }, \
119 /* Smart Card Reader 0 */ \
120 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
121 .irq = IT8172_SCR0_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \
122 /* Smart Card Reader 1 */ \
123 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
124 .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 },
126 #define ITE_SERIAL_PORT_DEFNS
129 #ifdef CONFIG_MIPS_IVR
130 #include <asm/it8172/it8172.h>
131 #include <asm/it8172/it8172_int.h>
132 #define IVR_SERIAL_PORT_DEFNS \
133 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
134 .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 }, \
135 /* Smart Card Reader 1 */ \
136 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
137 .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .type = 0x3 },
139 #define IVR_SERIAL_PORT_DEFNS
142 #ifdef CONFIG_TOSHIBA_JMR3927
143 #include <asm/jmr3927/jmr3927.h>
144 #define TXX927_SERIAL_PORT_DEFNS \
145 { .baud_base = JMR3927_BASE_BAUD, .port = UART0_ADDR, .irq = UART0_INT, \
146 .flags = UART0_FLAGS, .type = 1 }, \
147 { .baud_base = JMR3927_BASE_BAUD, .port = UART1_ADDR, .irq = UART1_INT, \
148 .flags = UART1_FLAGS, .type = 1 },
150 #define TXX927_SERIAL_PORT_DEFNS
153 #ifdef CONFIG_SERIAL_AU1X00
154 #include <asm/mach-au1x00/au1000.h>
155 #define AU1000_SERIAL_PORT_DEFNS \
156 { .baud_base = 0, .port = UART0_ADDR, .irq = AU1000_UART0_INT, \
157 .flags = STD_COM_FLAGS, .type = 1 }, \
158 { .baud_base = 0, .port = UART1_ADDR, .irq = AU1000_UART1_INT, \
159 .flags = STD_COM_FLAGS, .type = 1 }, \
160 { .baud_base = 0, .port = UART2_ADDR, .irq = AU1000_UART2_INT, \
161 .flags = STD_COM_FLAGS, .type = 1 }, \
162 { .baud_base = 0, .port = UART3_ADDR, .irq = AU1000_UART3_INT, \
163 .flags = STD_COM_FLAGS, .type = 1 },
165 #define AU1000_SERIAL_PORT_DEFNS
168 #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
169 #define STD_SERIAL_PORT_DEFNS \
170 /* UART CLK PORT IRQ FLAGS */ \
171 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
172 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
173 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
174 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
176 #ifdef CONFIG_SERIAL_MANY_PORTS
177 #define EXTRA_SERIAL_PORT_DEFNS \
178 { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \
179 { 0, BASE_BAUD, 0x1A8, 9, FOURPORT_FLAGS }, /* ttyS5 */ \
180 { 0, BASE_BAUD, 0x1B0, 9, FOURPORT_FLAGS }, /* ttyS6 */ \
181 { 0, BASE_BAUD, 0x1B8, 9, FOURPORT_FLAGS }, /* ttyS7 */ \
182 { 0, BASE_BAUD, 0x2A0, 5, FOURPORT_FLAGS }, /* ttyS8 */ \
183 { 0, BASE_BAUD, 0x2A8, 5, FOURPORT_FLAGS }, /* ttyS9 */ \
184 { 0, BASE_BAUD, 0x2B0, 5, FOURPORT_FLAGS }, /* ttyS10 */ \
185 { 0, BASE_BAUD, 0x2B8, 5, FOURPORT_FLAGS }, /* ttyS11 */ \
186 { 0, BASE_BAUD, 0x330, 4, ACCENT_FLAGS }, /* ttyS12 */ \
187 { 0, BASE_BAUD, 0x338, 4, ACCENT_FLAGS }, /* ttyS13 */ \
188 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS14 (spare) */ \
189 { 0, BASE_BAUD, 0x000, 0, 0 }, /* ttyS15 (spare) */ \
190 { 0, BASE_BAUD, 0x100, 12, BOCA_FLAGS }, /* ttyS16 */ \
191 { 0, BASE_BAUD, 0x108, 12, BOCA_FLAGS }, /* ttyS17 */ \
192 { 0, BASE_BAUD, 0x110, 12, BOCA_FLAGS }, /* ttyS18 */ \
193 { 0, BASE_BAUD, 0x118, 12, BOCA_FLAGS }, /* ttyS19 */ \
194 { 0, BASE_BAUD, 0x120, 12, BOCA_FLAGS }, /* ttyS20 */ \
195 { 0, BASE_BAUD, 0x128, 12, BOCA_FLAGS }, /* ttyS21 */ \
196 { 0, BASE_BAUD, 0x130, 12, BOCA_FLAGS }, /* ttyS22 */ \
197 { 0, BASE_BAUD, 0x138, 12, BOCA_FLAGS }, /* ttyS23 */ \
198 { 0, BASE_BAUD, 0x140, 12, BOCA_FLAGS }, /* ttyS24 */ \
199 { 0, BASE_BAUD, 0x148, 12, BOCA_FLAGS }, /* ttyS25 */ \
200 { 0, BASE_BAUD, 0x150, 12, BOCA_FLAGS }, /* ttyS26 */ \
201 { 0, BASE_BAUD, 0x158, 12, BOCA_FLAGS }, /* ttyS27 */ \
202 { 0, BASE_BAUD, 0x160, 12, BOCA_FLAGS }, /* ttyS28 */ \
203 { 0, BASE_BAUD, 0x168, 12, BOCA_FLAGS }, /* ttyS29 */ \
204 { 0, BASE_BAUD, 0x170, 12, BOCA_FLAGS }, /* ttyS30 */ \
205 { 0, BASE_BAUD, 0x178, 12, BOCA_FLAGS }, /* ttyS31 */
206 #else /* CONFIG_SERIAL_MANY_PORTS */
207 #define EXTRA_SERIAL_PORT_DEFNS
208 #endif /* CONFIG_SERIAL_MANY_PORTS */
210 #else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
211 #define STD_SERIAL_PORT_DEFNS
212 #define EXTRA_SERIAL_PORT_DEFNS
213 #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
215 /* You can have up to four HUB6's in the system, but I've only
216 * included two cards here for a total of twelve ports.
218 #if (defined(CONFIG_HUB6) && defined(CONFIG_SERIAL_MANY_PORTS))
219 #define HUB6_SERIAL_PORT_DFNS \
220 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,0) }, /* ttyS32 */ \
221 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,1) }, /* ttyS33 */ \
222 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,2) }, /* ttyS34 */ \
223 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,3) }, /* ttyS35 */ \
224 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,4) }, /* ttyS36 */ \
225 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(0,5) }, /* ttyS37 */ \
226 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,0) }, /* ttyS38 */ \
227 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,1) }, /* ttyS39 */ \
228 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,2) }, /* ttyS40 */ \
229 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,3) }, /* ttyS41 */ \
230 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,4) }, /* ttyS42 */ \
231 { 0, BASE_BAUD, 0x302, 3, HUB6_FLAGS, C_P(1,5) }, /* ttyS43 */
233 #define HUB6_SERIAL_PORT_DFNS
236 #ifdef CONFIG_MOMENCO_JAGUAR_ATX
237 /* Ordinary NS16552 duart with a 20MHz crystal. */
238 #define JAGUAR_ATX_UART_CLK 20000000
239 #define JAGUAR_ATX_BASE_BAUD (JAGUAR_ATX_UART_CLK / 16)
241 #define JAGUAR_ATX_SERIAL1_IRQ 6
242 #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
244 #define _JAGUAR_ATX_SERIAL_INIT(int, base) \
245 { baud_base: JAGUAR_ATX_BASE_BAUD, irq: int, \
246 flags: (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
247 iomem_base: (u8 *) base, iomem_reg_shift: 2, \
248 io_type: SERIAL_IO_MEM }
249 #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
250 _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
252 #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS
255 #ifdef CONFIG_MOMENCO_OCELOT
256 /* Ordinary NS16552 duart with a 20MHz crystal. */
257 #define OCELOT_BASE_BAUD ( 20000000 / 16 )
259 #define OCELOT_SERIAL1_IRQ 4
260 #define OCELOT_SERIAL1_BASE 0xe0001020
262 #define _OCELOT_SERIAL_INIT(int, base) \
263 { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
264 .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
265 .io_type = SERIAL_IO_MEM }
266 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
267 _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
269 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
272 #ifdef CONFIG_MOMENCO_OCELOT_G
273 /* Ordinary NS16552 duart with a 20MHz crystal. */
274 #define OCELOT_G_BASE_BAUD ( 20000000 / 16 )
276 #define OCELOT_G_SERIAL1_IRQ 4
278 #define OCELOT_G_SERIAL1_BASE 0xe0001020
280 #define OCELOT_G_SERIAL1_BASE 0xfd000020
283 #define _OCELOT_G_SERIAL_INIT(int, base) \
284 { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\
285 .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
286 .io_type = SERIAL_IO_MEM }
287 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
288 _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE)
290 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS
293 #ifdef CONFIG_MOMENCO_OCELOT_C
294 /* Ordinary NS16552 duart with a 20MHz crystal. */
295 #define OCELOT_C_BASE_BAUD ( 20000000 / 16 )
297 #define OCELOT_C_SERIAL1_IRQ 80
298 #define OCELOT_C_SERIAL1_BASE 0xfd000020
300 #define OCELOT_C_SERIAL2_IRQ 81
301 #define OCELOT_C_SERIAL2_BASE 0xfd000000
303 #define _OCELOT_C_SERIAL_INIT(int, base) \
304 { .baud_base = OCELOT_C_BASE_BAUD, \
306 .flags = STD_COM_FLAGS, \
307 .iomem_base = (u8 *) base, \
308 .iomem_reg_shift = 2, \
309 .io_type = SERIAL_IO_MEM \
311 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
312 _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \
313 _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE)
315 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS
318 #ifdef CONFIG_DDB5477
319 #include <asm/ddb5xxx/ddb5477.h>
320 #define DDB5477_SERIAL_PORT_DEFNS \
321 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \
322 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \
323 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \
324 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \
325 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \
326 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
328 #define DDB5477_SERIAL_PORT_DEFNS
331 #ifdef CONFIG_SGI_IP32
333 * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
334 * They are initialized in ip32_setup
336 #define IP32_SERIAL_PORT_DEFNS \
339 #define IP32_SERIAL_PORT_DEFNS
340 #endif /* CONFIG_SGI_IP32 */
342 #define SERIAL_PORT_DFNS \
343 COBALT_SERIAL_PORT_DEFNS \
344 DDB5477_SERIAL_PORT_DEFNS \
345 EV96100_SERIAL_PORT_DEFNS \
346 EXTRA_SERIAL_PORT_DEFNS \
347 HUB6_SERIAL_PORT_DFNS \
348 IP32_SERIAL_PORT_DEFNS \
349 ITE_SERIAL_PORT_DEFNS \
350 IVR_SERIAL_PORT_DEFNS \
351 JAZZ_SERIAL_PORT_DEFNS \
352 STD_SERIAL_PORT_DEFNS \
353 MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
354 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
355 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
356 TXX927_SERIAL_PORT_DEFNS \
357 AU1000_SERIAL_PORT_DEFNS
359 #endif /* _ASM_SERIAL_H */