include/asm-mips/spinlock.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1999, 2000 by Ralf Baechle
   7  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   8  */
   9 #ifndef _ASM_SPINLOCK_H
  10 #define _ASM_SPINLOCK_H
  11
  12 /*
  13  * Your basic SMP spinlocks, allowing only a single CPU anywhere
  14  */
  15
  16 typedef struct {
  17         volatile unsigned int lock;
  18 } spinlock_t;
  19
  20 #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
  21
  22 #define spin_lock_init(x)       do { (x)->lock = 0; } while(0)
  23
  24 #define spin_is_locked(x)       ((x)->lock != 0)
  25 #define spin_unlock_wait(x)     do { barrier(); } while ((x)->lock)
  26 #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
  27
  28 /*
  29  * Simple spin lock operations.  There are two variants, one clears IRQ's
  30  * on the local processor, one does not.
  31  *
  32  * We make no fairness assumptions.  They have a cost.
  33  */
  34
  35 static inline void _raw_spin_lock(spinlock_t *lock)
  36 {
  37         unsigned int tmp;
  38
  39         __asm__ __volatile__(
  40         ".set\tnoreorder\t\t\t# _raw_spin_lock\n"
  41         "1:\tll\t%1, %2\n\t"
  42         "bnez\t%1, 1b\n\t"
  43         " li\t%1, 1\n\t"
  44         "sc\t%1, %0\n\t"
  45         "beqz\t%1, 1b\n\t"
  46         " sync\n\t"
  47         ".set\treorder"
  48         : "=m" (lock->lock), "=&r" (tmp)
  49         : "m" (lock->lock)
  50         : "memory");
  51 }
  52
  53 static inline void _raw_spin_unlock(spinlock_t *lock)
  54 {
  55         __asm__ __volatile__(
  56         ".set\tnoreorder\t\t\t# _raw_spin_unlock\n\t"
  57         "sync\n\t"
  58         "sw\t$0, %0\n\t"
  59         ".set\treorder"
  60         : "=m" (lock->lock)
  61         : "m" (lock->lock)
  62         : "memory");
  63 }
  64
  65 static inline unsigned int _raw_spin_trylock(spinlock_t *lock)
  66 {
  67         unsigned int temp, res;
  68
  69         __asm__ __volatile__(
  70         ".set\tnoreorder\t\t\t# _raw_spin_trylock\n\t"
  71         "1:\tll\t%0, %3\n\t"
  72         "ori\t%2, %0, 1\n\t"
  73         "sc\t%2, %1\n\t"
  74         "beqz\t%2, 1b\n\t"
  75         " andi\t%2, %0, 1\n\t"
  76         ".set\treorder"
  77         : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
  78         : "m" (lock->lock)
  79         : "memory");
  80
  81         return res == 0;
  82 }
  83
  84 /*
  85  * Read-write spinlocks, allowing multiple readers but only one writer.
  86  *
  87  * NOTE! it is quite common to have readers in interrupts but no interrupt
  88  * writers. For those circumstances we can "mix" irq-safe locks - any writer
  89  * needs to get a irq-safe write-lock, but readers can get non-irqsafe
  90  * read-locks.
  91  */
  92
  93 typedef struct {
  94         volatile unsigned int lock;
  95 } rwlock_t;
  96
  97 #define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
  98
  99 #define rwlock_init(x)  do { *(x) = RW_LOCK_UNLOCKED; } while(0)
 100
 101 #define rwlock_is_locked(x) ((x)->lock)
 102
 103 static inline void _raw_read_lock(rwlock_t *rw)
 104 {
 105         unsigned int tmp;
 106
 107         __asm__ __volatile__(
 108         ".set\tnoreorder\t\t\t# _raw_read_lock\n"
 109         "1:\tll\t%1, %2\n\t"
 110         "bltz\t%1, 1b\n\t"
 111         " addu\t%1, 1\n\t"
 112         "sc\t%1, %0\n\t"
 113         "beqz\t%1, 1b\n\t"
 114         " sync\n\t"
 115         ".set\treorder"
 116         : "=m" (rw->lock), "=&r" (tmp)
 117         : "m" (rw->lock)
 118         : "memory");
 119 }
 120
 121 /* Note the use of sub, not subu which will make the kernel die with an
 122    overflow exception if we ever try to unlock an rwlock that is already
 123    unlocked or is being held by a writer.  */
 124 static inline void _raw_read_unlock(rwlock_t *rw)
 125 {
 126         unsigned int tmp;
 127
 128         __asm__ __volatile__(
 129         ".set\tnoreorder\t\t\t# _raw_read_unlock\n"
 130         "1:\tll\t%1, %2\n\t"
 131         "sub\t%1, 1\n\t"
 132         "sc\t%1, %0\n\t"
 133         "beqz\t%1, 1b\n\t"
 134         " sync\n\t"
 135         ".set\treorder"
 136         : "=m" (rw->lock), "=&r" (tmp)
 137         : "m" (rw->lock)
 138         : "memory");
 139 }
 140
 141 static inline void _raw_write_lock(rwlock_t *rw)
 142 {
 143         unsigned int tmp;
 144
 145         __asm__ __volatile__(
 146         ".set\tnoreorder\t\t\t# _raw_write_lock\n"
 147         "1:\tll\t%1, %2\n\t"
 148         "bnez\t%1, 1b\n\t"
 149         " lui\t%1, 0x8000\n\t"
 150         "sc\t%1, %0\n\t"
 151         "beqz\t%1, 1b\n\t"
 152         " sync\n\t"
 153         ".set\treorder"
 154         : "=m" (rw->lock), "=&r" (tmp)
 155         : "m" (rw->lock)
 156         : "memory");
 157 }
 158
 159 static inline void _raw_write_unlock(rwlock_t *rw)
 160 {
 161         __asm__ __volatile__(
 162         ".set\tnoreorder\t\t\t# _raw_write_unlock\n\t"
 163         "sync\n\t"
 164         "sw\t$0, %0\n\t"
 165         ".set\treorder"
 166         : "=m" (rw->lock)
 167         : "m" (rw->lock)
 168         : "memory");
 169 }
 170
 171 static inline int _raw_write_trylock(rwlock_t *rw)
 172 {
 173         unsigned int tmp;
 174         int ret;
 175
 176         __asm__ __volatile__(
 177         ".set\tnoreorder\t\t\t# _raw_write_trylock\n"
 178         "li\t%2, 0\n\t"
 179         "1:\tll\t%1, %3\n\t"
 180         "bnez\t%1, 2f\n\t"
 181         "lui\t%1, 0x8000\n\t"
 182         "sc\t%1, %0\n\t"
 183         "beqz\t%1, 1b\n\t"
 184         "sync\n\t"
 185         "li\t%2, 1\n\t"
 186         ".set\treorder\n"
 187         "2:"
 188         : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
 189         : "m" (rw->lock)
 190         : "memory");
 191
 192         return ret;
 193 }
 194
 195 #endif /* _ASM_SPINLOCK_H */