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[linux-2.6.9-moxart.git] / include / asm-mips / stackframe.h
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1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
7 * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
8 * Copyright (C) 1999 Silicon Graphics, Inc.
9 */
10 #ifndef _ASM_STACKFRAME_H
11 #define _ASM_STACKFRAME_H
13 #include <linux/config.h>
14 #include <linux/threads.h>
16 #include <asm/asm.h>
17 #include <asm/mipsregs.h>
18 #include <asm/offset.h>
20 .macro SAVE_AT
21 .set push
22 .set noat
23 LONG_S $1, PT_R1(sp)
24 .set pop
25 .endm
27 .macro SAVE_TEMP
28 mfhi v1
29 #ifdef CONFIG_MIPS32
30 LONG_S $8, PT_R8(sp)
31 LONG_S $9, PT_R9(sp)
32 #endif
33 LONG_S v1, PT_HI(sp)
34 mflo v1
35 LONG_S $10, PT_R10(sp)
36 LONG_S $11, PT_R11(sp)
37 LONG_S v1, PT_LO(sp)
38 LONG_S $12, PT_R12(sp)
39 LONG_S $13, PT_R13(sp)
40 LONG_S $14, PT_R14(sp)
41 LONG_S $15, PT_R15(sp)
42 LONG_S $24, PT_R24(sp)
43 .endm
45 .macro SAVE_STATIC
46 LONG_S $16, PT_R16(sp)
47 LONG_S $17, PT_R17(sp)
48 LONG_S $18, PT_R18(sp)
49 LONG_S $19, PT_R19(sp)
50 LONG_S $20, PT_R20(sp)
51 LONG_S $21, PT_R21(sp)
52 LONG_S $22, PT_R22(sp)
53 LONG_S $23, PT_R23(sp)
54 LONG_S $30, PT_R30(sp)
55 .endm
57 #ifdef CONFIG_SMP
58 .macro get_saved_sp /* SMP variation */
59 #ifdef CONFIG_MIPS32
60 mfc0 k0, CP0_CONTEXT
61 lui k1, %hi(kernelsp)
62 srl k0, k0, 23
63 sll k0, k0, 2
64 addu k1, k0
65 LONG_L k1, %lo(kernelsp)(k1)
66 #endif
67 #ifdef CONFIG_MIPS64
68 MFC0 k1, CP0_CONTEXT
69 dsra k1, 23
70 lui k0, %hi(pgd_current)
71 daddiu k0, %lo(pgd_current)
72 dsubu k1, k0
73 lui k0, %hi(kernelsp)
74 daddu k1, k0
75 LONG_L k1, %lo(kernelsp)(k1)
76 #endif
77 .endm
79 .macro set_saved_sp stackp temp temp2
80 #ifdef CONFIG_MIPS32
81 mfc0 \temp, CP0_CONTEXT
82 srl \temp, 23
83 sll \temp, 2
84 LONG_S \stackp, kernelsp(\temp)
85 #endif
86 #ifdef CONFIG_MIPS64
87 lw \temp, TI_CPU(gp)
88 dsll \temp, 3
89 lui \temp2, %hi(kernelsp)
90 daddu \temp, \temp2
91 LONG_S \stackp, %lo(kernelsp)(\temp)
92 #endif
93 .endm
94 #else
95 .macro get_saved_sp /* Uniprocessor variation */
96 lui k1, %hi(kernelsp)
97 LONG_L k1, %lo(kernelsp)(k1)
98 .endm
100 .macro set_saved_sp stackp temp temp2
101 LONG_S \stackp, kernelsp
102 .endm
103 #endif
105 .macro SAVE_SOME
106 .set push
107 .set reorder
108 mfc0 k0, CP0_STATUS
109 sll k0, 3 /* extract cu0 bit */
110 .set noreorder
111 bltz k0, 8f
112 move k1, sp
113 .set reorder
114 /* Called from user mode, new stack. */
115 get_saved_sp
116 8: move k0, sp
117 PTR_SUBU sp, k1, PT_SIZE
118 LONG_S k0, PT_R29(sp)
119 LONG_S $3, PT_R3(sp)
120 LONG_S $0, PT_R0(sp)
121 mfc0 v1, CP0_STATUS
122 LONG_S $2, PT_R2(sp)
123 LONG_S v1, PT_STATUS(sp)
124 LONG_S $4, PT_R4(sp)
125 mfc0 v1, CP0_CAUSE
126 LONG_S $5, PT_R5(sp)
127 LONG_S v1, PT_CAUSE(sp)
128 LONG_S $6, PT_R6(sp)
129 MFC0 v1, CP0_EPC
130 LONG_S $7, PT_R7(sp)
131 #ifdef CONFIG_MIPS64
132 LONG_S $8, PT_R8(sp)
133 LONG_S $9, PT_R9(sp)
134 #endif
135 LONG_S v1, PT_EPC(sp)
136 LONG_S $25, PT_R25(sp)
137 LONG_S $28, PT_R28(sp)
138 LONG_S $31, PT_R31(sp)
139 ori $28, sp, _THREAD_MASK
140 xori $28, _THREAD_MASK
141 .set pop
142 .endm
144 .macro SAVE_ALL
145 SAVE_SOME
146 SAVE_AT
147 SAVE_TEMP
148 SAVE_STATIC
149 .endm
151 .macro RESTORE_AT
152 .set push
153 .set noat
154 LONG_L $1, PT_R1(sp)
155 .set pop
156 .endm
158 .macro RESTORE_TEMP
159 LONG_L $24, PT_LO(sp)
160 #ifdef CONFIG_MIPS32
161 LONG_L $8, PT_R8(sp)
162 LONG_L $9, PT_R9(sp)
163 #endif
164 mtlo $24
165 LONG_L $24, PT_HI(sp)
166 LONG_L $10, PT_R10(sp)
167 LONG_L $11, PT_R11(sp)
168 mthi $24
169 LONG_L $12, PT_R12(sp)
170 LONG_L $13, PT_R13(sp)
171 LONG_L $14, PT_R14(sp)
172 LONG_L $15, PT_R15(sp)
173 LONG_L $24, PT_R24(sp)
174 .endm
176 .macro RESTORE_STATIC
177 LONG_L $16, PT_R16(sp)
178 LONG_L $17, PT_R17(sp)
179 LONG_L $18, PT_R18(sp)
180 LONG_L $19, PT_R19(sp)
181 LONG_L $20, PT_R20(sp)
182 LONG_L $21, PT_R21(sp)
183 LONG_L $22, PT_R22(sp)
184 LONG_L $23, PT_R23(sp)
185 LONG_L $30, PT_R30(sp)
186 .endm
188 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
190 .macro RESTORE_SOME
191 .set push
192 .set reorder
193 .set noat
194 mfc0 a0, CP0_STATUS
195 ori a0, 0x1f
196 xori a0, 0x1f
197 mtc0 a0, CP0_STATUS
198 li v1, 0xff00
199 and a0, v1
200 LONG_L v0, PT_STATUS(sp)
201 nor v1, $0, v1
202 and v0, v1
203 or v0, a0
204 mtc0 v0, CP0_STATUS
205 LONG_L $31, PT_R31(sp)
206 LONG_L $28, PT_R28(sp)
207 LONG_L $25, PT_R25(sp)
208 #ifdef CONFIG_MIPS64
209 LONG_L $8, PT_R8(sp)
210 LONG_L $9, PT_R9(sp)
211 #endif
212 LONG_L $7, PT_R7(sp)
213 LONG_L $6, PT_R6(sp)
214 LONG_L $5, PT_R5(sp)
215 LONG_L $4, PT_R4(sp)
216 LONG_L $3, PT_R3(sp)
217 LONG_L $2, PT_R2(sp)
218 .set pop
219 .endm
221 .macro RESTORE_SP_AND_RET
222 .set push
223 .set noreorder
224 LONG_L k0, PT_EPC(sp)
225 LONG_L sp, PT_R29(sp)
226 jr k0
228 .set pop
229 .endm
231 #else
233 .macro RESTORE_SOME
234 .set push
235 .set reorder
236 .set noat
237 mfc0 a0, CP0_STATUS
238 ori a0, 0x1f
239 xori a0, 0x1f
240 mtc0 a0, CP0_STATUS
241 li v1, 0xff00
242 and a0, v1
243 LONG_L v0, PT_STATUS(sp)
244 nor v1, $0, v1
245 and v0, v1
246 or v0, a0
247 mtc0 v0, CP0_STATUS
248 LONG_L v1, PT_EPC(sp)
249 MTC0 v1, CP0_EPC
250 LONG_L $31, PT_R31(sp)
251 LONG_L $28, PT_R28(sp)
252 LONG_L $25, PT_R25(sp)
253 #ifdef CONFIG_MIPS64
254 LONG_L $8, PT_R8(sp)
255 LONG_L $9, PT_R9(sp)
256 #endif
257 LONG_L $7, PT_R7(sp)
258 LONG_L $6, PT_R6(sp)
259 LONG_L $5, PT_R5(sp)
260 LONG_L $4, PT_R4(sp)
261 LONG_L $3, PT_R3(sp)
262 LONG_L $2, PT_R2(sp)
263 .set pop
264 .endm
266 .macro RESTORE_SP_AND_RET
267 LONG_L sp, PT_R29(sp)
268 .set mips3
269 eret
270 .set mips0
271 .endm
273 #endif
275 .macro RESTORE_SP
276 LONG_L sp, PT_R29(sp)
277 .endm
279 .macro RESTORE_ALL
280 RESTORE_TEMP
281 RESTORE_AT
282 RESTORE_STATIC
283 RESTORE_SOME
284 RESTORE_SP
285 .endm
287 .macro RESTORE_ALL_AND_RET
288 RESTORE_TEMP
289 RESTORE_AT
290 RESTORE_STATIC
291 RESTORE_SOME
292 RESTORE_SP_AND_RET
293 .endm
296 * Move to kernel mode and disable interrupts.
297 * Set cp0 enable bit as sign that we're running on the kernel stack
299 .macro CLI
300 mfc0 t0, CP0_STATUS
301 li t1, ST0_CU0 | 0x1f
302 or t0, t1
303 xori t0, 0x1f
304 mtc0 t0, CP0_STATUS
305 irq_disable_hazard
306 .endm
309 * Move to kernel mode and enable interrupts.
310 * Set cp0 enable bit as sign that we're running on the kernel stack
312 .macro STI
313 mfc0 t0, CP0_STATUS
314 li t1, ST0_CU0 | 0x1f
315 or t0, t1
316 xori t0, 0x1e
317 mtc0 t0, CP0_STATUS
318 irq_enable_hazard
319 .endm
322 * Just move to kernel mode and leave interrupts as they are.
323 * Set cp0 enable bit as sign that we're running on the kernel stack
325 .macro KMODE
326 mfc0 t0, CP0_STATUS
327 li t1, ST0_CU0 | 0x1e
328 or t0, t1
329 xori t0, 0x1e
330 mtc0 t0, CP0_STATUS
331 irq_disable_hazard
332 .endm
334 #endif /* _ASM_STACKFRAME_H */