MOXA linux-2.6.x / linux-2.6.9-uc0 from sdlinux-moxaart.tgz
[linux-2.6.9-moxart.git] / include / asm-parisc / eisa_eeprom.h
blob5ba85370533e20e80d6d1798cecb1b9914e469a5
1 /*
2 * eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Copyright (c) 2001, 2002 Daniel Engstrom <5116@telia.com>
13 #ifndef ASM_EISA_EEPROM_H
14 #define ASM_EISA_EEPROM_H
16 #define HPEE_MAX_LENGTH 0x2000 /* maximum eeprom length */
18 #define HPEE_SLOT_INFO(slot) (20+(48*slot))
20 struct eeprom_header
23 u_int32_t num_writes; /* number of writes */
24 u_int8_t flags; /* flags, usage? */
25 u_int8_t ver_maj;
26 u_int8_t ver_min;
27 u_int8_t num_slots; /* number of EISA slots in system */
28 u_int16_t csum; /* checksum, I don't know how to calulate this */
29 u_int8_t pad[10];
30 } __attribute__ ((packed));
33 struct eeprom_eisa_slot_info
35 u_int32_t eisa_slot_id;
36 u_int32_t config_data_offset;
37 u_int32_t num_writes;
38 u_int16_t csum;
39 u_int16_t num_functions;
40 u_int16_t config_data_length;
42 /* bits 0..3 are the duplicate slot id */
43 #define HPEE_SLOT_INFO_EMBEDDED 0x10
44 #define HPEE_SLOT_INFO_VIRTUAL 0x20
45 #define HPEE_SLOT_INFO_NO_READID 0x40
46 #define HPEE_SLOT_INFO_DUPLICATE 0x80
47 u_int8_t slot_info;
49 #define HPEE_SLOT_FEATURES_ENABLE 0x01
50 #define HPEE_SLOT_FEATURES_IOCHK 0x02
51 #define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80
52 u_int8_t slot_features;
54 u_int8_t ver_min;
55 u_int8_t ver_maj;
57 #define HPEE_FUNCTION_INFO_HAVE_TYPE 0x01
58 #define HPEE_FUNCTION_INFO_HAVE_MEMORY 0x02
59 #define HPEE_FUNCTION_INFO_HAVE_IRQ 0x04
60 #define HPEE_FUNCTION_INFO_HAVE_DMA 0x08
61 #define HPEE_FUNCTION_INFO_HAVE_PORT 0x10
62 #define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20
63 /* I think there are two slighty different
64 * versions of the function_info field
65 * one int the fixed header and one optional
66 * in the parsed slot data area */
67 #define HPEE_FUNCTION_INFO_HAVE_FUNCTION 0x01
68 #define HPEE_FUNCTION_INFO_F_DISABLED 0x80
69 #define HPEE_FUNCTION_INFO_CFG_FREE_FORM 0x40
70 u_int8_t function_info;
72 #define HPEE_FLAG_BOARD_IS_ISA 0x01 /* flag and minor version for isa board */
73 u_int8_t flags;
74 u_int8_t pad[24];
75 } __attribute__ ((packed));
78 #define HPEE_MEMORY_MAX_ENT 9
79 /* memory descriptor: byte 0 */
80 #define HPEE_MEMORY_WRITABLE 0x01
81 #define HPEE_MEMORY_CACHABLE 0x02
82 #define HPEE_MEMORY_TYPE_MASK 0x18
83 #define HPEE_MEMORY_TYPE_SYS 0x00
84 #define HPEE_MEMORY_TYPE_EXP 0x08
85 #define HPEE_MEMORY_TYPE_VIR 0x10
86 #define HPEE_MEMORY_TYPE_OTH 0x18
87 #define HPEE_MEMORY_SHARED 0x20
88 #define HPEE_MEMORY_MORE 0x80
90 /* memory descriptor: byte 1 */
91 #define HPEE_MEMORY_WIDTH_MASK 0x03
92 #define HPEE_MEMORY_WIDTH_BYTE 0x00
93 #define HPEE_MEMORY_WIDTH_WORD 0x01
94 #define HPEE_MEMORY_WIDTH_DWORD 0x02
95 #define HPEE_MEMORY_DECODE_MASK 0x0c
96 #define HPEE_MEMORY_DECODE_20BITS 0x00
97 #define HPEE_MEMORY_DECODE_24BITS 0x04
98 #define HPEE_MEMORY_DECODE_32BITS 0x08
99 /* byte 2 and 3 are a 16bit LE value
100 * containging the memory size in kilobytes */
101 /* byte 4,5,6 are a 24bit LE value
102 * containing the memory base address */
105 #define HPEE_IRQ_MAX_ENT 7
106 /* Interrupt entry: byte 0 */
107 #define HPEE_IRQ_CHANNEL_MASK 0xf
108 #define HPEE_IRQ_TRIG_LEVEL 0x20
109 #define HPEE_IRQ_MORE 0x80
110 /* byte 1 seems to be unused */
112 #define HPEE_DMA_MAX_ENT 4
114 /* dma entry: byte 0 */
115 #define HPEE_DMA_CHANNEL_MASK 7
116 #define HPEE_DMA_SIZE_MASK 0xc
117 #define HPEE_DMA_SIZE_BYTE 0x0
118 #define HPEE_DMA_SIZE_WORD 0x4
119 #define HPEE_DMA_SIZE_DWORD 0x8
120 #define HPEE_DMA_SHARED 0x40
121 #define HPEE_DMA_MORE 0x80
123 /* dma entry: byte 1 */
124 #define HPEE_DMA_TIMING_MASK 0x30
125 #define HPEE_DMA_TIMING_ISA 0x0
126 #define HPEE_DMA_TIMING_TYPEA 0x10
127 #define HPEE_DMA_TIMING_TYPEB 0x20
128 #define HPEE_DMA_TIMING_TYPEC 0x30
130 #define HPEE_PORT_MAX_ENT 20
131 /* port entry byte 0 */
132 #define HPEE_PORT_SIZE_MASK 0x1f
133 #define HPEE_PORT_SHARED 0x40
134 #define HPEE_PORT_MORE 0x80
135 /* byte 1 and 2 is a 16bit LE value
136 * conating the start port number */
138 #define HPEE_PORT_INIT_MAX_LEN 60 /* in bytes here */
139 /* port init entry byte 0 */
140 #define HPEE_PORT_INIT_WIDTH_MASK 0x3
141 #define HPEE_PORT_INIT_WIDTH_BYTE 0x0
142 #define HPEE_PORT_INIT_WIDTH_WORD 0x1
143 #define HPEE_PORT_INIT_WIDTH_DWORD 0x2
144 #define HPEE_PORT_INIT_MASK 0x4
145 #define HPEE_PORT_INIT_MORE 0x80
147 #define HPEE_SELECTION_MAX_ENT 26
149 #define HPEE_TYPE_MAX_LEN 80
151 #endif