include/asm-ppc64/iommu.h

   1 /*
   2  * iommu.h
   3  * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
   4  * Rewrite, cleanup:
   5  * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  */
  21
  22 #ifndef _ASM_IOMMU_H
  23 #define _ASM_IOMMU_H
  24
  25 #include <asm/types.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/device.h>
  28 #include <linux/dma-mapping.h>
  29
  30 /*
  31  * IOMAP_MAX_ORDER defines the largest contiguous block
  32  * of dma (tce) space we can get.  IOMAP_MAX_ORDER = 13
  33  * allows up to 2**12 pages (4096 * 4096) = 16 MB
  34  */
  35 #define IOMAP_MAX_ORDER 13
  36
  37 /*
  38  * Tces come in two formats, one for the virtual bus and a different
  39  * format for PCI
  40  */
  41 #define TCE_VB  0
  42 #define TCE_PCI 1
  43
  44 /* tce_entry
  45  * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's
  46  * abstracted so layout is irrelevant.
  47  */
  48 union tce_entry {
  49         unsigned long te_word;
  50         struct {
  51                 unsigned int  tb_cacheBits :6;  /* Cache hash bits - not used */
  52                 unsigned int  tb_rsvd      :6;
  53                 unsigned long tb_rpn       :40; /* Real page number */
  54                 unsigned int  tb_valid     :1;  /* Tce is valid (vb only) */
  55                 unsigned int  tb_allio     :1;  /* Tce is valid for all lps (vb only) */
  56                 unsigned int  tb_lpindex   :8;  /* LpIndex for user of TCE (vb only) */
  57                 unsigned int  tb_pciwr     :1;  /* Write allowed (pci only) */
  58                 unsigned int  tb_rdwr      :1;  /* Read allowed  (pci), Write allowed (vb) */
  59         } te_bits;
  60 #define te_cacheBits te_bits.tb_cacheBits
  61 #define te_rpn       te_bits.tb_rpn
  62 #define te_valid     te_bits.tb_valid
  63 #define te_allio     te_bits.tb_allio
  64 #define te_lpindex   te_bits.tb_lpindex
  65 #define te_pciwr     te_bits.tb_pciwr
  66 #define te_rdwr      te_bits.tb_rdwr
  67 };
  68
  69
  70 struct iommu_table {
  71         unsigned long  it_busno;     /* Bus number this table belongs to */
  72         unsigned long  it_size;      /* Size in pages of iommu table */
  73         unsigned long  it_offset;    /* Offset into global table */
  74         unsigned long  it_base;      /* mapped address of tce table */
  75         unsigned long  it_index;     /* which iommu table this is */
  76         unsigned long  it_type;      /* type: PCI or Virtual Bus */
  77         unsigned long  it_entrysize; /* Size of an entry in bytes */
  78         unsigned long  it_blocksize; /* Entries in each block (cacheline) */
  79         unsigned long  it_hint;      /* Hint for next alloc */
  80         unsigned long  it_largehint; /* Hint for large allocs */
  81         unsigned long  it_halfpoint; /* Breaking point for small/large allocs */
  82         spinlock_t     it_lock;      /* Protects it_map */
  83         unsigned long  it_mapsize;   /* Size of map in # of entries (bits) */
  84         unsigned long *it_map;       /* A simple allocation bitmap for now */
  85 };
  86
  87 #ifdef CONFIG_PPC_ISERIES
  88 struct iommu_table_cb {
  89         unsigned long   itc_busno;      /* Bus number for this tce table */
  90         unsigned long   itc_start;      /* Will be NULL for secondary */
  91         unsigned long   itc_totalsize;  /* Size (in pages) of whole table */
  92         unsigned long   itc_offset;     /* Index into real tce table of the
  93                                            start of our section */
  94         unsigned long   itc_size;       /* Size (in pages) of our section */
  95         unsigned long   itc_index;      /* Index of this tce table */
  96         unsigned short  itc_maxtables;  /* Max num of tables for partition */
  97         unsigned char   itc_virtbus;    /* Flag to indicate virtual bus */
  98         unsigned char   itc_slotno;     /* IOA Tce Slot Index */
  99         unsigned char   itc_rsvd[4];
 100 };
 101
 102 extern struct iommu_table vio_tce_table;      /* Tce table for virtual bus */
 103 #endif /* CONFIG_PPC_ISERIES */
 104
 105 struct scatterlist;
 106
 107 #ifdef CONFIG_PPC_MULTIPLATFORM
 108
 109 /* Walks all buses and creates iommu tables */
 110 extern void iommu_setup_pSeries(void);
 111 extern void iommu_setup_u3(void);
 112
 113 /* Creates table for an individual device node */
 114 extern void iommu_devnode_init(struct device_node *dn);
 115
 116 #endif /* CONFIG_PPC_MULTIPLATFORM */
 117
 118 #ifdef CONFIG_PPC_ISERIES
 119
 120 /* Walks all buses and creates iommu tables */
 121 extern void iommu_setup_iSeries(void);
 122
 123 /* Initializes tables for bio buses */
 124 extern void __init iommu_vio_init(void);
 125
 126 struct iSeries_Device_Node;
 127 /* Creates table for an individual device node */
 128 extern void iommu_devnode_init(struct iSeries_Device_Node *dn);
 129
 130 #endif /* CONFIG_PPC_ISERIES */
 131
 132 /* Initializes an iommu_table based in values set in the passed-in
 133  * structure
 134  */
 135 extern struct iommu_table *iommu_init_table(struct iommu_table * tbl);
 136
 137 extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
 138                 struct scatterlist *sglist, int nelems,
 139                 enum dma_data_direction direction);
 140 extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
 141                 int nelems, enum dma_data_direction direction);
 142
 143 extern void *iommu_alloc_consistent(struct iommu_table *tbl, size_t size,
 144                 dma_addr_t *dma_handle);
 145 extern void iommu_free_consistent(struct iommu_table *tbl, size_t size,
 146                 void *vaddr, dma_addr_t dma_handle);
 147 extern dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr,
 148                 size_t size, enum dma_data_direction direction);
 149 extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
 150                 size_t size, enum dma_data_direction direction);
 151
 152 extern void tce_init_pSeries(void);
 153 extern void tce_init_iSeries(void);
 154
 155 extern void pci_iommu_init(void);
 156 extern void pci_dma_init_direct(void);
 157
 158 extern void alloc_u3_dart_table(void);
 159
 160 extern int ppc64_iommu_off;
 161
 162 #endif /* _ASM_IOMMU_H */