include/asm-sparc64/pgtable.h

   1 /* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $
   2  * pgtable.h: SpitFire page table operations.
   3  *
   4  * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   6  */
   7
   8 #ifndef _SPARC64_PGTABLE_H
   9 #define _SPARC64_PGTABLE_H
  10
  11 /* This file contains the functions and defines necessary to modify and use
  12  * the SpitFire page tables.
  13  */
  14
  15 #include <linux/config.h>
  16 #include <asm/spitfire.h>
  17 #include <asm/asi.h>
  18 #include <asm/system.h>
  19 #include <asm/page.h>
  20 #include <asm/processor.h>
  21 #include <asm/const.h>
  22
  23 /* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 16MB).
  24  * The page copy blockops use 0x1000000 to 0x18000000 (16MB --> 24MB).
  25  * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
  26  * The vmalloc area spans 0x140000000 to 0x200000000.
  27  * There is a single static kernel PMD which maps from 0x0 to address
  28  * 0x400000000.
  29  */
  30 #define TLBTEMP_BASE            _AC(0x0000000001000000,UL)
  31 #define MODULES_VADDR           _AC(0x0000000002000000,UL)
  32 #define MODULES_LEN             _AC(0x000000007e000000,UL)
  33 #define MODULES_END             _AC(0x0000000080000000,UL)
  34 #define VMALLOC_START           _AC(0x0000000140000000,UL)
  35 #define VMALLOC_END             _AC(0x0000000200000000,UL)
  36 #define LOW_OBP_ADDRESS         _AC(0x00000000f0000000,UL)
  37 #define HI_OBP_ADDRESS          _AC(0x0000000100000000,UL)
  38
  39 /* XXX All of this needs to be rethought so we can take advantage
  40  * XXX cheetah's full 64-bit virtual address space, ie. no more hole
  41  * XXX in the middle like on spitfire. -DaveM
  42  */
  43 /*
  44  * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
  45  * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
  46  * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
  47  * table is a single page long). The next higher PMD_BITS determine pmd#
  48  * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
  49  * since the pmd entries are 4 bytes, and each pmd page is a single page
  50  * long). Finally, the higher few bits determine pgde#.
  51  */
  52
  53 /* PMD_SHIFT determines the size of the area a second-level page
  54  * table can map
  55  */
  56 #define PMD_SHIFT       (PAGE_SHIFT + (PAGE_SHIFT-3))
  57 #define PMD_SIZE        (1UL << PMD_SHIFT)
  58 #define PMD_MASK        (~(PMD_SIZE-1))
  59 #define PMD_BITS        11
  60
  61 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  62 #define PGDIR_SHIFT     (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
  63 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  64 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  65
  66 #ifndef __ASSEMBLY__
  67
  68 #include <linux/sched.h>
  69
  70 /* Entries per page directory level. */
  71 #define PTRS_PER_PTE            (1UL << (PAGE_SHIFT-3))
  72
  73 /* We the first one in this file, what we export to the kernel
  74  * is different so we can optimize correctly for 32-bit tasks.
  75  */
  76 #define REAL_PTRS_PER_PMD       (1UL << PMD_BITS)
  77
  78 /* This is gross, but unless we do this gcc retests the
  79  * thread flag every interation in pmd traversal loops.
  80  */
  81 extern unsigned long __ptrs_per_pmd(void) __attribute_const__;
  82 #define PTRS_PER_PMD            __ptrs_per_pmd()
  83
  84 /*
  85  * We cannot use the top address range because VPTE table lives there. This
  86  * formula finds the total legal virtual space in the processor, subtracts the
  87  * vpte size, then aligns it to the number of bytes mapped by one pgde, and
  88  * thus calculates the number of pgdes needed.
  89  */
  90 #define PTRS_PER_PGD (((1UL << VA_BITS) - VPTE_SIZE + (1UL << (PAGE_SHIFT + \
  91                       (PAGE_SHIFT-3) + PMD_BITS)) - 1) / (1UL << (PAGE_SHIFT + \
  92                       (PAGE_SHIFT-3) + PMD_BITS)))
  93
  94 /* Kernel has a separate 44bit address space. */
  95 #define USER_PTRS_PER_PGD       ((const int)(test_thread_flag(TIF_32BIT)) ? \
  96                                  (1) : (PTRS_PER_PGD))
  97 #define FIRST_USER_PGD_NR       0
  98
  99 #define pte_ERROR(e)    __builtin_trap()
 100 #define pmd_ERROR(e)    __builtin_trap()
 101 #define pgd_ERROR(e)    __builtin_trap()
 102
 103 #endif /* !(__ASSEMBLY__) */
 104
 105 /* Spitfire/Cheetah TTE bits. */
 106 #define _PAGE_VALID     _AC(0x8000000000000000,UL) /* Valid TTE              */
 107 #define _PAGE_R         _AC(0x8000000000000000,UL) /* Keep ref bit up to date*/
 108 #define _PAGE_SZ4MB     _AC(0x6000000000000000,UL) /* 4MB Page               */
 109 #define _PAGE_SZ512K    _AC(0x4000000000000000,UL) /* 512K Page              */
 110 #define _PAGE_SZ64K     _AC(0x2000000000000000,UL) /* 64K Page               */
 111 #define _PAGE_SZ8K      _AC(0x0000000000000000,UL) /* 8K Page                */
 112 #define _PAGE_NFO       _AC(0x1000000000000000,UL) /* No Fault Only          */
 113 #define _PAGE_IE        _AC(0x0800000000000000,UL) /* Invert Endianness      */
 114 #define _PAGE_SOFT2     _AC(0x07FC000000000000,UL) /* Software bits, set 2   */
 115 #define _PAGE_RES1      _AC(0x0003000000000000,UL) /* Reserved               */
 116 #define _PAGE_SN        _AC(0x0000800000000000,UL) /* (Cheetah) Snoop        */
 117 #define _PAGE_RES2      _AC(0x0000780000000000,UL) /* Reserved               */
 118 #define _PAGE_PADDR_SF  _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr[40:13]*/
 119 #define _PAGE_PADDR     _AC(0x000007FFFFFFE000,UL) /* (Cheetah) paddr[42:13] */
 120 #define _PAGE_SOFT      _AC(0x0000000000001F80,UL) /* Software bits          */
 121 #define _PAGE_L         _AC(0x0000000000000040,UL) /* Locked TTE             */
 122 #define _PAGE_CP        _AC(0x0000000000000020,UL) /* Cacheable in P-Cache   */
 123 #define _PAGE_CV        _AC(0x0000000000000010,UL) /* Cacheable in V-Cache   */
 124 #define _PAGE_E         _AC(0x0000000000000008,UL) /* side-Effect            */
 125 #define _PAGE_P         _AC(0x0000000000000004,UL) /* Privileged Page        */
 126 #define _PAGE_W         _AC(0x0000000000000002,UL) /* Writable               */
 127 #define _PAGE_G         _AC(0x0000000000000001,UL) /* Global                 */
 128
 129 /* Here are the SpitFire software bits we use in the TTE's.
 130  *
 131  * WARNING: If you are going to try and start using some
 132  *          of the soft2 bits, you will need to make
 133  *          modifications to the swap entry implementation.
 134  *          For example, one thing that could happen is that
 135  *          swp_entry_to_pte() would BUG_ON() if you tried
 136  *          to use one of the soft2 bits for _PAGE_FILE.
 137  *
 138  * Like other architectures, I have aliased _PAGE_FILE with
 139  * _PAGE_MODIFIED.  This works because _PAGE_FILE is never
 140  * interpreted that way unless _PAGE_PRESENT is clear.
 141  */
 142 #define _PAGE_EXEC      _AC(0x0000000000001000,UL)      /* Executable SW bit */
 143 #define _PAGE_MODIFIED  _AC(0x0000000000000800,UL)      /* Modified (dirty)  */
 144 #define _PAGE_FILE      _AC(0x0000000000000800,UL)      /* Pagecache page    */
 145 #define _PAGE_ACCESSED  _AC(0x0000000000000400,UL)      /* Accessed (ref'd)  */
 146 #define _PAGE_READ      _AC(0x0000000000000200,UL)      /* Readable SW Bit   */
 147 #define _PAGE_WRITE     _AC(0x0000000000000100,UL)      /* Writable SW Bit   */
 148 #define _PAGE_PRESENT   _AC(0x0000000000000080,UL)      /* Present           */
 149
 150 #if PAGE_SHIFT == 13
 151 #define _PAGE_SZBITS    _PAGE_SZ8K
 152 #elif PAGE_SHIFT == 16
 153 #define _PAGE_SZBITS    _PAGE_SZ64K
 154 #elif PAGE_SHIFT == 19
 155 #define _PAGE_SZBITS    _PAGE_SZ512K
 156 #elif PAGE_SHIFT == 22
 157 #define _PAGE_SZBITS    _PAGE_SZ4MB
 158 #else
 159 #error Wrong PAGE_SHIFT specified
 160 #endif
 161
 162 #if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
 163 #define _PAGE_SZHUGE    _PAGE_SZ4MB
 164 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
 165 #define _PAGE_SZHUGE    _PAGE_SZ512K
 166 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
 167 #define _PAGE_SZHUGE    _PAGE_SZ64K
 168 #endif
 169
 170 #define _PAGE_CACHE     (_PAGE_CP | _PAGE_CV)
 171
 172 #define __DIRTY_BITS    (_PAGE_MODIFIED | _PAGE_WRITE | _PAGE_W)
 173 #define __ACCESS_BITS   (_PAGE_ACCESSED | _PAGE_READ | _PAGE_R)
 174 #define __PRIV_BITS     _PAGE_P
 175
 176 #define PAGE_NONE       __pgprot (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_CACHE)
 177
 178 /* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */
 179 #define PAGE_SHARED     __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 180                                   __ACCESS_BITS | _PAGE_WRITE | _PAGE_EXEC)
 181
 182 #define PAGE_COPY       __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 183                                   __ACCESS_BITS | _PAGE_EXEC)
 184
 185 #define PAGE_READONLY   __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 186                                   __ACCESS_BITS | _PAGE_EXEC)
 187
 188 #define PAGE_KERNEL     __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 189                                   __PRIV_BITS | \
 190                                   __ACCESS_BITS | __DIRTY_BITS | _PAGE_EXEC)
 191
 192 #define PAGE_SHARED_NOEXEC      __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
 193                                           _PAGE_CACHE | \
 194                                           __ACCESS_BITS | _PAGE_WRITE)
 195
 196 #define PAGE_COPY_NOEXEC        __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
 197                                           _PAGE_CACHE | __ACCESS_BITS)
 198
 199 #define PAGE_READONLY_NOEXEC    __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
 200                                           _PAGE_CACHE | __ACCESS_BITS)
 201
 202 #define _PFN_MASK       _PAGE_PADDR
 203
 204 #define pg_iobits (_PAGE_VALID | _PAGE_PRESENT | __DIRTY_BITS | \
 205                    __ACCESS_BITS | _PAGE_E)
 206
 207 #define __P000  PAGE_NONE
 208 #define __P001  PAGE_READONLY_NOEXEC
 209 #define __P010  PAGE_COPY_NOEXEC
 210 #define __P011  PAGE_COPY_NOEXEC
 211 #define __P100  PAGE_READONLY
 212 #define __P101  PAGE_READONLY
 213 #define __P110  PAGE_COPY
 214 #define __P111  PAGE_COPY
 215
 216 #define __S000  PAGE_NONE
 217 #define __S001  PAGE_READONLY_NOEXEC
 218 #define __S010  PAGE_SHARED_NOEXEC
 219 #define __S011  PAGE_SHARED_NOEXEC
 220 #define __S100  PAGE_READONLY
 221 #define __S101  PAGE_READONLY
 222 #define __S110  PAGE_SHARED
 223 #define __S111  PAGE_SHARED
 224
 225 #ifndef __ASSEMBLY__
 226
 227 extern unsigned long phys_base;
 228 extern unsigned long pfn_base;
 229
 230 extern struct page *mem_map_zero;
 231 #define ZERO_PAGE(vaddr)        (mem_map_zero)
 232
 233 /* PFNs are real physical page numbers.  However, mem_map only begins to record
 234  * per-page information starting at pfn_base.  This is to handle systems where
 235  * the first physical page in the machine is at some huge physical address, such
 236  * as 4GB.   This is common on a partitioned E10000, for example.
 237  */
 238
 239 #define pfn_pte(pfn, prot)      \
 240         __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot) | _PAGE_SZBITS)
 241 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 242
 243 #define pte_pfn(x)              ((pte_val(x) & _PAGE_PADDR)>>PAGE_SHIFT)
 244 #define pte_page(x)             pfn_to_page(pte_pfn(x))
 245
 246 #define page_pte_prot(page, prot)       mk_pte(page, prot)
 247 #define page_pte(page)                  page_pte_prot(page, __pgprot(0))
 248
 249 static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
 250 {
 251         pte_t __pte;
 252         const unsigned long preserve_mask = (_PFN_MASK |
 253                                              _PAGE_MODIFIED | _PAGE_ACCESSED |
 254                                              _PAGE_CACHE | _PAGE_E |
 255                                              _PAGE_PRESENT | _PAGE_SZBITS);
 256
 257         pte_val(__pte) = (pte_val(orig_pte) & preserve_mask) |
 258                 (pgprot_val(new_prot) & ~preserve_mask);
 259
 260         return __pte;
 261 }
 262 #define pmd_set(pmdp, ptep)     \
 263         (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
 264 #define pgd_set(pgdp, pmdp)     \
 265         (pgd_val(*(pgdp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
 266 #define __pmd_page(pmd)         \
 267         ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
 268 #define pmd_page(pmd)                   virt_to_page((void *)__pmd_page(pmd))
 269 #define pgd_page(pgd)           \
 270         ((unsigned long) __va((((unsigned long)pgd_val(pgd))<<11UL)))
 271 #define pte_none(pte)                   (!pte_val(pte))
 272 #define pte_present(pte)                (pte_val(pte) & _PAGE_PRESENT)
 273 #define pmd_none(pmd)                   (!pmd_val(pmd))
 274 #define pmd_bad(pmd)                    (0)
 275 #define pmd_present(pmd)                (pmd_val(pmd) != 0U)
 276 #define pmd_clear(pmdp)                 (pmd_val(*(pmdp)) = 0U)
 277 #define pgd_none(pgd)                   (!pgd_val(pgd))
 278 #define pgd_bad(pgd)                    (0)
 279 #define pgd_present(pgd)                (pgd_val(pgd) != 0U)
 280 #define pgd_clear(pgdp)                 (pgd_val(*(pgdp)) = 0U)
 281
 282 /* The following only work if pte_present() is true.
 283  * Undefined behaviour if not..
 284  */
 285 #define pte_read(pte)           (pte_val(pte) & _PAGE_READ)
 286 #define pte_exec(pte)           (pte_val(pte) & _PAGE_EXEC)
 287 #define pte_write(pte)          (pte_val(pte) & _PAGE_WRITE)
 288 #define pte_dirty(pte)          (pte_val(pte) & _PAGE_MODIFIED)
 289 #define pte_young(pte)          (pte_val(pte) & _PAGE_ACCESSED)
 290 #define pte_wrprotect(pte)      (__pte(pte_val(pte) & ~(_PAGE_WRITE|_PAGE_W)))
 291 #define pte_rdprotect(pte)      \
 292         (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_READ))
 293 #define pte_mkclean(pte)        \
 294         (__pte(pte_val(pte) & ~(_PAGE_MODIFIED|_PAGE_W)))
 295 #define pte_mkold(pte)          \
 296         (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_ACCESSED))
 297
 298 /* Permanent address of a page. */
 299 #define __page_address(page)    page_address(page)
 300
 301 /* Be very careful when you change these three, they are delicate. */
 302 #define pte_mkyoung(pte)        (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
 303 #define pte_mkwrite(pte)        (__pte(pte_val(pte) | _PAGE_WRITE))
 304 #define pte_mkdirty(pte)        (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
 305
 306 /* to find an entry in a page-table-directory. */
 307 #define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD))
 308 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
 309
 310 /* to find an entry in a kernel page-table-directory */
 311 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 312
 313 /* Find an entry in the second-level page table.. */
 314 #define pmd_offset(dir, address)        \
 315         ((pmd_t *) pgd_page(*(dir)) + \
 316          ((address >> PMD_SHIFT) & (REAL_PTRS_PER_PMD-1)))
 317
 318 /* Find an entry in the third-level page table.. */
 319 #define pte_index(dir, address) \
 320         ((pte_t *) __pmd_page(*(dir)) + \
 321          ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
 322 #define pte_offset_kernel               pte_index
 323 #define pte_offset_map                  pte_index
 324 #define pte_offset_map_nested           pte_index
 325 #define pte_unmap(pte)                  do { } while (0)
 326 #define pte_unmap_nested(pte)           do { } while (0)
 327
 328 /* Actual page table PTE updates.  */
 329 extern void tlb_batch_add(pte_t *ptep, pte_t orig);
 330
 331 static inline void set_pte(pte_t *ptep, pte_t pte)
 332 {
 333         pte_t orig = *ptep;
 334
 335         *ptep = pte;
 336         if (pte_present(orig))
 337                 tlb_batch_add(ptep, orig);
 338 }
 339
 340 #define pte_clear(ptep)         set_pte((ptep), __pte(0UL))
 341
 342 extern pgd_t swapper_pg_dir[1];
 343
 344 /* These do nothing with the way I have things setup. */
 345 #define mmu_lockarea(vaddr, len)                (vaddr)
 346 #define mmu_unlockarea(vaddr, len)              do { } while(0)
 347
 348 struct vm_area_struct;
 349 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
 350
 351 /* Make a non-present pseudo-TTE. */
 352 static inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
 353 {
 354         pte_t pte;
 355         pte_val(pte) = (((page) | pgprot_val(prot) | _PAGE_E) &
 356                         ~(unsigned long)_PAGE_CACHE);
 357         pte_val(pte) |= (((unsigned long)space) << 32);
 358         return pte;
 359 }
 360
 361 /* Encode and de-code a swap entry */
 362 #define __swp_type(entry)       (((entry).val >> PAGE_SHIFT) & 0xffUL)
 363 #define __swp_offset(entry)     ((entry).val >> (PAGE_SHIFT + 8UL))
 364 #define __swp_entry(type, offset)       \
 365         ( (swp_entry_t) \
 366           { \
 367                 (((long)(type) << PAGE_SHIFT) | \
 368                  ((long)(offset) << (PAGE_SHIFT + 8UL))) \
 369           } )
 370 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val(pte) })
 371 #define __swp_entry_to_pte(x)           ((pte_t) { (x).val })
 372
 373 /* File offset in PTE support. */
 374 #define pte_file(pte)           (pte_val(pte) & _PAGE_FILE)
 375 #define pte_to_pgoff(pte)       (pte_val(pte) >> PAGE_SHIFT)
 376 #define pgoff_to_pte(off)       (__pte(((off) << PAGE_SHIFT) | _PAGE_FILE))
 377 #define PTE_FILE_MAX_BITS       (64UL - PAGE_SHIFT - 1UL)
 378
 379 extern unsigned long prom_virt_to_phys(unsigned long, int *);
 380
 381 static __inline__ unsigned long
 382 sun4u_get_pte (unsigned long addr)
 383 {
 384         pgd_t *pgdp;
 385         pmd_t *pmdp;
 386         pte_t *ptep;
 387
 388         if (addr >= PAGE_OFFSET)
 389                 return addr & _PAGE_PADDR;
 390         if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
 391                 return prom_virt_to_phys(addr, NULL);
 392         pgdp = pgd_offset_k(addr);
 393         pmdp = pmd_offset(pgdp, addr);
 394         ptep = pte_offset_kernel(pmdp, addr);
 395         return pte_val(*ptep) & _PAGE_PADDR;
 396 }
 397
 398 static __inline__ unsigned long
 399 __get_phys (unsigned long addr)
 400 {
 401         return sun4u_get_pte (addr);
 402 }
 403
 404 static __inline__ int
 405 __get_iospace (unsigned long addr)
 406 {
 407         return ((sun4u_get_pte (addr) & 0xf0000000) >> 28);
 408 }
 409
 410 extern unsigned long *sparc64_valid_addr_bitmap;
 411
 412 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
 413 #define kern_addr_valid(addr)   \
 414         (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
 415
 416 extern int io_remap_page_range(struct vm_area_struct *vma, unsigned long from,
 417                                unsigned long offset,
 418                                unsigned long size, pgprot_t prot, int space);
 419
 420 #include <asm-generic/pgtable.h>
 421
 422 /* We provide our own get_unmapped_area to cope with VA holes for userland */
 423 #define HAVE_ARCH_UNMAPPED_AREA
 424
 425 /* We provide a special get_unmapped_area for framebuffer mmaps to try and use
 426  * the largest alignment possible such that larget PTEs can be used.
 427  */
 428 extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
 429                                           unsigned long, unsigned long,
 430                                           unsigned long);
 431 #define HAVE_ARCH_FB_UNMAPPED_AREA
 432
 433 /*
 434  * No page table caches to initialise
 435  */
 436 #define pgtable_cache_init()    do { } while (0)
 437
 438 extern void check_pgt_cache(void);
 439
 440 #endif /* !(__ASSEMBLY__) */
 441
 442 #endif /* !(_SPARC64_PGTABLE_H) */